/*1* Copyright 2010 Tilera Corporation. All Rights Reserved.2*3* This program is free software; you can redistribute it and/or4* modify it under the terms of the GNU General Public License5* as published by the Free Software Foundation, version 2.6*7* This program is distributed in the hope that it will be useful, but8* WITHOUT ANY WARRANTY; without even the implied warranty of9* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or10* NON INFRINGEMENT. See the GNU General Public License for11* more details.12*/1314#include <arch/chip.h>151617/*18* This file shares the implementation of the userspace memcpy and19* the kernel's memcpy, copy_to_user and copy_from_user.20*/2122#include <linux/linkage.h>2324/* On TILE64, we wrap these functions via arch/tile/lib/memcpy_tile64.c */25#if !CHIP_HAS_COHERENT_LOCAL_CACHE()26#define memcpy __memcpy_asm27#define __copy_to_user_inatomic __copy_to_user_inatomic_asm28#define __copy_from_user_inatomic __copy_from_user_inatomic_asm29#define __copy_from_user_zeroing __copy_from_user_zeroing_asm30#endif3132#define IS_MEMCPY 033#define IS_COPY_FROM_USER 134#define IS_COPY_FROM_USER_ZEROING 235#define IS_COPY_TO_USER -13637.section .text.memcpy_common, "ax"38.align 643940/* Use this to preface each bundle that can cause an exception so41* the kernel can clean up properly. The special cleanup code should42* not use these, since it knows what it is doing.43*/44#define EX \45.pushsection __ex_table, "a"; \46.word 9f, memcpy_common_fixup; \47.popsection; \489495051/* __copy_from_user_inatomic takes the kernel target address in r0,52* the user source in r1, and the bytes to copy in r2.53* It returns the number of uncopiable bytes (hopefully zero) in r0.54*/55ENTRY(__copy_from_user_inatomic)56.type __copy_from_user_inatomic, @function57FEEDBACK_ENTER_EXPLICIT(__copy_from_user_inatomic, \58.text.memcpy_common, \59.Lend_memcpy_common - __copy_from_user_inatomic)60{ movei r29, IS_COPY_FROM_USER; j memcpy_common }61.size __copy_from_user_inatomic, . - __copy_from_user_inatomic6263/* __copy_from_user_zeroing is like __copy_from_user_inatomic, but64* any uncopiable bytes are zeroed in the target.65*/66ENTRY(__copy_from_user_zeroing)67.type __copy_from_user_zeroing, @function68FEEDBACK_REENTER(__copy_from_user_inatomic)69{ movei r29, IS_COPY_FROM_USER_ZEROING; j memcpy_common }70.size __copy_from_user_zeroing, . - __copy_from_user_zeroing7172/* __copy_to_user_inatomic takes the user target address in r0,73* the kernel source in r1, and the bytes to copy in r2.74* It returns the number of uncopiable bytes (hopefully zero) in r0.75*/76ENTRY(__copy_to_user_inatomic)77.type __copy_to_user_inatomic, @function78FEEDBACK_REENTER(__copy_from_user_inatomic)79{ movei r29, IS_COPY_TO_USER; j memcpy_common }80.size __copy_to_user_inatomic, . - __copy_to_user_inatomic8182ENTRY(memcpy)83.type memcpy, @function84FEEDBACK_REENTER(__copy_from_user_inatomic)85{ movei r29, IS_MEMCPY }86.size memcpy, . - memcpy87/* Fall through */8889.type memcpy_common, @function90memcpy_common:91/* On entry, r29 holds one of the IS_* macro values from above. */929394/* r0 is the dest, r1 is the source, r2 is the size. */9596/* Save aside original dest so we can return it at the end. */97{ sw sp, lr; move r23, r0; or r4, r0, r1 }9899/* Check for an empty size. */100{ bz r2, .Ldone; andi r4, r4, 3 }101102/* Save aside original values in case of a fault. */103{ move r24, r1; move r25, r2 }104move r27, lr105106/* Check for an unaligned source or dest. */107{ bnz r4, .Lcopy_unaligned_maybe_many; addli r4, r2, -256 }108109.Lcheck_aligned_copy_size:110/* If we are copying < 256 bytes, branch to simple case. */111{ blzt r4, .Lcopy_8_check; slti_u r8, r2, 8 }112113/* Copying >= 256 bytes, so jump to complex prefetching loop. */114{ andi r6, r1, 63; j .Lcopy_many }115116/*117*118* Aligned 4 byte at a time copy loop119*120*/121122.Lcopy_8_loop:123/* Copy two words at a time to hide load latency. */124EX: { lw r3, r1; addi r1, r1, 4; slti_u r8, r2, 16 }125EX: { lw r4, r1; addi r1, r1, 4 }126EX: { sw r0, r3; addi r0, r0, 4; addi r2, r2, -4 }127EX: { sw r0, r4; addi r0, r0, 4; addi r2, r2, -4 }128.Lcopy_8_check:129{ bzt r8, .Lcopy_8_loop; slti_u r4, r2, 4 }130131/* Copy odd leftover word, if any. */132{ bnzt r4, .Lcheck_odd_stragglers }133EX: { lw r3, r1; addi r1, r1, 4 }134EX: { sw r0, r3; addi r0, r0, 4; addi r2, r2, -4 }135136.Lcheck_odd_stragglers:137{ bnz r2, .Lcopy_unaligned_few }138139.Ldone:140/* For memcpy return original dest address, else zero. */141{ mz r0, r29, r23; jrp lr }142143144/*145*146* Prefetching multiple cache line copy handler (for large transfers).147*148*/149150/* Copy words until r1 is cache-line-aligned. */151.Lalign_loop:152EX: { lw r3, r1; addi r1, r1, 4 }153{ andi r6, r1, 63 }154EX: { sw r0, r3; addi r0, r0, 4; addi r2, r2, -4 }155.Lcopy_many:156{ bnzt r6, .Lalign_loop; addi r9, r0, 63 }157158{ addi r3, r1, 60; andi r9, r9, -64 }159160#if CHIP_HAS_WH64()161/* No need to prefetch dst, we'll just do the wh64162* right before we copy a line.163*/164#endif165166EX: { lw r5, r3; addi r3, r3, 64; movei r4, 1 }167/* Intentionally stall for a few cycles to leave L2 cache alone. */168{ bnzt zero, .; move r27, lr }169EX: { lw r6, r3; addi r3, r3, 64 }170/* Intentionally stall for a few cycles to leave L2 cache alone. */171{ bnzt zero, . }172EX: { lw r7, r3; addi r3, r3, 64 }173#if !CHIP_HAS_WH64()174/* Prefetch the dest */175/* Intentionally stall for a few cycles to leave L2 cache alone. */176{ bnzt zero, . }177/* Use a real load to cause a TLB miss if necessary. We aren't using178* r28, so this should be fine.179*/180EX: { lw r28, r9; addi r9, r9, 64 }181/* Intentionally stall for a few cycles to leave L2 cache alone. */182{ bnzt zero, . }183{ prefetch r9; addi r9, r9, 64 }184/* Intentionally stall for a few cycles to leave L2 cache alone. */185{ bnzt zero, . }186{ prefetch r9; addi r9, r9, 64 }187#endif188/* Intentionally stall for a few cycles to leave L2 cache alone. */189{ bz zero, .Lbig_loop2 }190191/* On entry to this loop:192* - r0 points to the start of dst line 0193* - r1 points to start of src line 0194* - r2 >= (256 - 60), only the first time the loop trips.195* - r3 contains r1 + 128 + 60 [pointer to end of source line 2]196* This is our prefetch address. When we get near the end197* rather than prefetching off the end this is changed to point198* to some "safe" recently loaded address.199* - r5 contains *(r1 + 60) [i.e. last word of source line 0]200* - r6 contains *(r1 + 64 + 60) [i.e. last word of source line 1]201* - r9 contains ((r0 + 63) & -64)202* [start of next dst cache line.]203*/204205.Lbig_loop:206{ jal .Lcopy_line2; add r15, r1, r2 }207208.Lbig_loop2:209/* Copy line 0, first stalling until r5 is ready. */210EX: { move r12, r5; lw r16, r1 }211{ bz r4, .Lcopy_8_check; slti_u r8, r2, 8 }212/* Prefetch several lines ahead. */213EX: { lw r5, r3; addi r3, r3, 64 }214{ jal .Lcopy_line }215216/* Copy line 1, first stalling until r6 is ready. */217EX: { move r12, r6; lw r16, r1 }218{ bz r4, .Lcopy_8_check; slti_u r8, r2, 8 }219/* Prefetch several lines ahead. */220EX: { lw r6, r3; addi r3, r3, 64 }221{ jal .Lcopy_line }222223/* Copy line 2, first stalling until r7 is ready. */224EX: { move r12, r7; lw r16, r1 }225{ bz r4, .Lcopy_8_check; slti_u r8, r2, 8 }226/* Prefetch several lines ahead. */227EX: { lw r7, r3; addi r3, r3, 64 }228/* Use up a caches-busy cycle by jumping back to the top of the229* loop. Might as well get it out of the way now.230*/231{ j .Lbig_loop }232233234/* On entry:235* - r0 points to the destination line.236* - r1 points to the source line.237* - r3 is the next prefetch address.238* - r9 holds the last address used for wh64.239* - r12 = WORD_15240* - r16 = WORD_0.241* - r17 == r1 + 16.242* - r27 holds saved lr to restore.243*244* On exit:245* - r0 is incremented by 64.246* - r1 is incremented by 64, unless that would point to a word247* beyond the end of the source array, in which case it is redirected248* to point to an arbitrary word already in the cache.249* - r2 is decremented by 64.250* - r3 is unchanged, unless it points to a word beyond the251* end of the source array, in which case it is redirected252* to point to an arbitrary word already in the cache.253* Redirecting is OK since if we are that close to the end254* of the array we will not come back to this subroutine255* and use the contents of the prefetched address.256* - r4 is nonzero iff r2 >= 64.257* - r9 is incremented by 64, unless it points beyond the258* end of the last full destination cache line, in which259* case it is redirected to a "safe address" that can be260* clobbered (sp - 64)261* - lr contains the value in r27.262*/263264/* r26 unused */265266.Lcopy_line:267/* TODO: when r3 goes past the end, we would like to redirect it268* to prefetch the last partial cache line (if any) just once, for the269* benefit of the final cleanup loop. But we don't want to270* prefetch that line more than once, or subsequent prefetches271* will go into the RTF. But then .Lbig_loop should unconditionally272* branch to top of loop to execute final prefetch, and its273* nop should become a conditional branch.274*/275276/* We need two non-memory cycles here to cover the resources277* used by the loads initiated by the caller.278*/279{ add r15, r1, r2 }280.Lcopy_line2:281{ slt_u r13, r3, r15; addi r17, r1, 16 }282283/* NOTE: this will stall for one cycle as L1 is busy. */284285/* Fill second L1D line. */286EX: { lw r17, r17; addi r1, r1, 48; mvz r3, r13, r1 } /* r17 = WORD_4 */287288#if CHIP_HAS_WH64()289/* Prepare destination line for writing. */290EX: { wh64 r9; addi r9, r9, 64 }291#else292/* Prefetch dest line */293{ prefetch r9; addi r9, r9, 64 }294#endif295/* Load seven words that are L1D hits to cover wh64 L2 usage. */296297/* Load the three remaining words from the last L1D line, which298* we know has already filled the L1D.299*/300EX: { lw r4, r1; addi r1, r1, 4; addi r20, r1, 16 } /* r4 = WORD_12 */301EX: { lw r8, r1; addi r1, r1, 4; slt_u r13, r20, r15 }/* r8 = WORD_13 */302EX: { lw r11, r1; addi r1, r1, -52; mvz r20, r13, r1 } /* r11 = WORD_14 */303304/* Load the three remaining words from the first L1D line, first305* stalling until it has filled by "looking at" r16.306*/307EX: { lw r13, r1; addi r1, r1, 4; move zero, r16 } /* r13 = WORD_1 */308EX: { lw r14, r1; addi r1, r1, 4 } /* r14 = WORD_2 */309EX: { lw r15, r1; addi r1, r1, 8; addi r10, r0, 60 } /* r15 = WORD_3 */310311/* Load second word from the second L1D line, first312* stalling until it has filled by "looking at" r17.313*/314EX: { lw r19, r1; addi r1, r1, 4; move zero, r17 } /* r19 = WORD_5 */315316/* Store last word to the destination line, potentially dirtying it317* for the first time, which keeps the L2 busy for two cycles.318*/319EX: { sw r10, r12 } /* store(WORD_15) */320321/* Use two L1D hits to cover the sw L2 access above. */322EX: { lw r10, r1; addi r1, r1, 4 } /* r10 = WORD_6 */323EX: { lw r12, r1; addi r1, r1, 4 } /* r12 = WORD_7 */324325/* Fill third L1D line. */326EX: { lw r18, r1; addi r1, r1, 4 } /* r18 = WORD_8 */327328/* Store first L1D line. */329EX: { sw r0, r16; addi r0, r0, 4; add r16, r0, r2 } /* store(WORD_0) */330EX: { sw r0, r13; addi r0, r0, 4; andi r16, r16, -64 } /* store(WORD_1) */331EX: { sw r0, r14; addi r0, r0, 4; slt_u r16, r9, r16 } /* store(WORD_2) */332#if CHIP_HAS_WH64()333EX: { sw r0, r15; addi r0, r0, 4; addi r13, sp, -64 } /* store(WORD_3) */334#else335/* Back up the r9 to a cache line we are already storing to336* if it gets past the end of the dest vector. Strictly speaking,337* we don't need to back up to the start of a cache line, but it's free338* and tidy, so why not?339*/340EX: { sw r0, r15; addi r0, r0, 4; andi r13, r0, -64 } /* store(WORD_3) */341#endif342/* Store second L1D line. */343EX: { sw r0, r17; addi r0, r0, 4; mvz r9, r16, r13 }/* store(WORD_4) */344EX: { sw r0, r19; addi r0, r0, 4 } /* store(WORD_5) */345EX: { sw r0, r10; addi r0, r0, 4 } /* store(WORD_6) */346EX: { sw r0, r12; addi r0, r0, 4 } /* store(WORD_7) */347348EX: { lw r13, r1; addi r1, r1, 4; move zero, r18 } /* r13 = WORD_9 */349EX: { lw r14, r1; addi r1, r1, 4 } /* r14 = WORD_10 */350EX: { lw r15, r1; move r1, r20 } /* r15 = WORD_11 */351352/* Store third L1D line. */353EX: { sw r0, r18; addi r0, r0, 4 } /* store(WORD_8) */354EX: { sw r0, r13; addi r0, r0, 4 } /* store(WORD_9) */355EX: { sw r0, r14; addi r0, r0, 4 } /* store(WORD_10) */356EX: { sw r0, r15; addi r0, r0, 4 } /* store(WORD_11) */357358/* Store rest of fourth L1D line. */359EX: { sw r0, r4; addi r0, r0, 4 } /* store(WORD_12) */360{361EX: sw r0, r8 /* store(WORD_13) */362addi r0, r0, 4363/* Will r2 be > 64 after we subtract 64 below? */364shri r4, r2, 7365}366{367EX: sw r0, r11 /* store(WORD_14) */368addi r0, r0, 8369/* Record 64 bytes successfully copied. */370addi r2, r2, -64371}372373{ jrp lr; move lr, r27 }374375/* Convey to the backtrace library that the stack frame is size376* zero, and the real return address is on the stack rather than377* in 'lr'.378*/379{ info 8 }380381.align 64382.Lcopy_unaligned_maybe_many:383/* Skip the setup overhead if we aren't copying many bytes. */384{ slti_u r8, r2, 20; sub r4, zero, r0 }385{ bnzt r8, .Lcopy_unaligned_few; andi r4, r4, 3 }386{ bz r4, .Ldest_is_word_aligned; add r18, r1, r2 }387388/*389*390* unaligned 4 byte at a time copy handler.391*392*/393394/* Copy single bytes until r0 == 0 mod 4, so we can store words. */395.Lalign_dest_loop:396EX: { lb_u r3, r1; addi r1, r1, 1; addi r4, r4, -1 }397EX: { sb r0, r3; addi r0, r0, 1; addi r2, r2, -1 }398{ bnzt r4, .Lalign_dest_loop; andi r3, r1, 3 }399400/* If source and dest are now *both* aligned, do an aligned copy. */401{ bz r3, .Lcheck_aligned_copy_size; addli r4, r2, -256 }402403.Ldest_is_word_aligned:404405#if CHIP_HAS_DWORD_ALIGN()406EX: { andi r8, r0, 63; lwadd_na r6, r1, 4}407{ slti_u r9, r2, 64; bz r8, .Ldest_is_L2_line_aligned }408409/* This copies unaligned words until either there are fewer410* than 4 bytes left to copy, or until the destination pointer411* is cache-aligned, whichever comes first.412*413* On entry:414* - r0 is the next store address.415* - r1 points 4 bytes past the load address corresponding to r0.416* - r2 >= 4417* - r6 is the next aligned word loaded.418*/419.Lcopy_unaligned_src_words:420EX: { lwadd_na r7, r1, 4; slti_u r8, r2, 4 + 4 }421/* stall */422{ dword_align r6, r7, r1; slti_u r9, r2, 64 + 4 }423EX: { swadd r0, r6, 4; addi r2, r2, -4 }424{ bnz r8, .Lcleanup_unaligned_words; andi r8, r0, 63 }425{ bnzt r8, .Lcopy_unaligned_src_words; move r6, r7 }426427/* On entry:428* - r0 is the next store address.429* - r1 points 4 bytes past the load address corresponding to r0.430* - r2 >= 4 (# of bytes left to store).431* - r6 is the next aligned src word value.432* - r9 = (r2 < 64U).433* - r18 points one byte past the end of source memory.434*/435.Ldest_is_L2_line_aligned:436437{438/* Not a full cache line remains. */439bnz r9, .Lcleanup_unaligned_words440move r7, r6441}442443/* r2 >= 64 */444445/* Kick off two prefetches, but don't go past the end. */446{ addi r3, r1, 63 - 4; addi r8, r1, 64 + 63 - 4 }447{ prefetch r3; move r3, r8; slt_u r8, r8, r18 }448{ mvz r3, r8, r1; addi r8, r3, 64 }449{ prefetch r3; move r3, r8; slt_u r8, r8, r18 }450{ mvz r3, r8, r1; movei r17, 0 }451452.Lcopy_unaligned_line:453/* Prefetch another line. */454{ prefetch r3; addi r15, r1, 60; addi r3, r3, 64 }455/* Fire off a load of the last word we are about to copy. */456EX: { lw_na r15, r15; slt_u r8, r3, r18 }457458EX: { mvz r3, r8, r1; wh64 r0 }459460/* This loop runs twice.461*462* On entry:463* - r17 is even before the first iteration, and odd before464* the second. It is incremented inside the loop. Encountering465* an even value at the end of the loop makes it stop.466*/467.Lcopy_half_an_unaligned_line:468EX: {469/* Stall until the last byte is ready. In the steady state this470* guarantees all words to load below will be in the L2 cache, which471* avoids shunting the loads to the RTF.472*/473move zero, r15474lwadd_na r7, r1, 16475}476EX: { lwadd_na r11, r1, 12 }477EX: { lwadd_na r14, r1, -24 }478EX: { lwadd_na r8, r1, 4 }479EX: { lwadd_na r9, r1, 4 }480EX: {481lwadd_na r10, r1, 8482/* r16 = (r2 < 64), after we subtract 32 from r2 below. */483slti_u r16, r2, 64 + 32484}485EX: { lwadd_na r12, r1, 4; addi r17, r17, 1 }486EX: { lwadd_na r13, r1, 8; dword_align r6, r7, r1 }487EX: { swadd r0, r6, 4; dword_align r7, r8, r1 }488EX: { swadd r0, r7, 4; dword_align r8, r9, r1 }489EX: { swadd r0, r8, 4; dword_align r9, r10, r1 }490EX: { swadd r0, r9, 4; dword_align r10, r11, r1 }491EX: { swadd r0, r10, 4; dword_align r11, r12, r1 }492EX: { swadd r0, r11, 4; dword_align r12, r13, r1 }493EX: { swadd r0, r12, 4; dword_align r13, r14, r1 }494EX: { swadd r0, r13, 4; addi r2, r2, -32 }495{ move r6, r14; bbst r17, .Lcopy_half_an_unaligned_line }496497{ bzt r16, .Lcopy_unaligned_line; move r7, r6 }498499/* On entry:500* - r0 is the next store address.501* - r1 points 4 bytes past the load address corresponding to r0.502* - r2 >= 0 (# of bytes left to store).503* - r7 is the next aligned src word value.504*/505.Lcleanup_unaligned_words:506/* Handle any trailing bytes. */507{ bz r2, .Lcopy_unaligned_done; slti_u r8, r2, 4 }508{ bzt r8, .Lcopy_unaligned_src_words; move r6, r7 }509510/* Move r1 back to the point where it corresponds to r0. */511{ addi r1, r1, -4 }512513#else /* !CHIP_HAS_DWORD_ALIGN() */514515/* Compute right/left shift counts and load initial source words. */516{ andi r5, r1, -4; andi r3, r1, 3 }517EX: { lw r6, r5; addi r5, r5, 4; shli r3, r3, 3 }518EX: { lw r7, r5; addi r5, r5, 4; sub r4, zero, r3 }519520/* Load and store one word at a time, using shifts and ORs521* to correct for the misaligned src.522*/523.Lcopy_unaligned_src_loop:524{ shr r6, r6, r3; shl r8, r7, r4 }525EX: { lw r7, r5; or r8, r8, r6; move r6, r7 }526EX: { sw r0, r8; addi r0, r0, 4; addi r2, r2, -4 }527{ addi r5, r5, 4; slti_u r8, r2, 8 }528{ bzt r8, .Lcopy_unaligned_src_loop; addi r1, r1, 4 }529530{ bz r2, .Lcopy_unaligned_done }531#endif /* !CHIP_HAS_DWORD_ALIGN() */532533/* Fall through */534535/*536*537* 1 byte at a time copy handler.538*539*/540541.Lcopy_unaligned_few:542EX: { lb_u r3, r1; addi r1, r1, 1 }543EX: { sb r0, r3; addi r0, r0, 1; addi r2, r2, -1 }544{ bnzt r2, .Lcopy_unaligned_few }545546.Lcopy_unaligned_done:547548/* For memcpy return original dest address, else zero. */549{ mz r0, r29, r23; jrp lr }550551.Lend_memcpy_common:552.size memcpy_common, .Lend_memcpy_common - memcpy_common553554.section .fixup,"ax"555memcpy_common_fixup:556.type memcpy_common_fixup, @function557558/* Skip any bytes we already successfully copied.559* r2 (num remaining) is correct, but r0 (dst) and r1 (src)560* may not be quite right because of unrolling and prefetching.561* So we need to recompute their values as the address just562* after the last byte we are sure was successfully loaded and563* then stored.564*/565566/* Determine how many bytes we successfully copied. */567{ sub r3, r25, r2 }568569/* Add this to the original r0 and r1 to get their new values. */570{ add r0, r23, r3; add r1, r24, r3 }571572{ bzt r29, memcpy_fixup_loop }573{ blzt r29, copy_to_user_fixup_loop }574575copy_from_user_fixup_loop:576/* Try copying the rest one byte at a time, expecting a load fault. */577.Lcfu: { lb_u r3, r1; addi r1, r1, 1 }578{ sb r0, r3; addi r0, r0, 1; addi r2, r2, -1 }579{ bnzt r2, copy_from_user_fixup_loop }580581.Lcopy_from_user_fixup_zero_remainder:582{ bbs r29, 2f } /* low bit set means IS_COPY_FROM_USER */583/* byte-at-a-time loop faulted, so zero the rest. */584{ move r3, r2; bz r2, 2f /* should be impossible, but handle it. */ }5851: { sb r0, zero; addi r0, r0, 1; addi r3, r3, -1 }586{ bnzt r3, 1b }5872: move lr, r27588{ move r0, r2; jrp lr }589590copy_to_user_fixup_loop:591/* Try copying the rest one byte at a time, expecting a store fault. */592{ lb_u r3, r1; addi r1, r1, 1 }593.Lctu: { sb r0, r3; addi r0, r0, 1; addi r2, r2, -1 }594{ bnzt r2, copy_to_user_fixup_loop }595.Lcopy_to_user_fixup_done:596move lr, r27597{ move r0, r2; jrp lr }598599memcpy_fixup_loop:600/* Try copying the rest one byte at a time. We expect a disastrous601* fault to happen since we are in fixup code, but let it happen.602*/603{ lb_u r3, r1; addi r1, r1, 1 }604{ sb r0, r3; addi r0, r0, 1; addi r2, r2, -1 }605{ bnzt r2, memcpy_fixup_loop }606/* This should be unreachable, we should have faulted again.607* But be paranoid and handle it in case some interrupt changed608* the TLB or something.609*/610move lr, r27611{ move r0, r23; jrp lr }612613.size memcpy_common_fixup, . - memcpy_common_fixup614615.section __ex_table,"a"616.word .Lcfu, .Lcopy_from_user_fixup_zero_remainder617.word .Lctu, .Lcopy_to_user_fixup_done618619620