Path: blob/master/arch/unicore32/include/asm/pgtable.h
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/*1* linux/arch/unicore32/include/asm/pgtable.h2*3* Code specific to PKUnity SoC and UniCore ISA4*5* Copyright (C) 2001-2010 GUAN Xue-tao6*7* This program is free software; you can redistribute it and/or modify8* it under the terms of the GNU General Public License version 2 as9* published by the Free Software Foundation.10*/11#ifndef __UNICORE_PGTABLE_H__12#define __UNICORE_PGTABLE_H__1314#include <asm-generic/pgtable-nopmd.h>15#include <asm/cpu-single.h>1617#include <asm/memory.h>18#include <asm/pgtable-hwdef.h>1920/*21* Just any arbitrary offset to the start of the vmalloc VM area: the22* current 8MB value just means that there will be a 8MB "hole" after the23* physical memory until the kernel virtual memory starts. That means that24* any out-of-bounds memory accesses will hopefully be caught.25* The vmalloc() routines leaves a hole of 4kB between each vmalloced26* area for the same reason. ;)27*28* Note that platforms may override VMALLOC_START, but they must provide29* VMALLOC_END. VMALLOC_END defines the (exclusive) limit of this space,30* which may not overlap IO space.31*/32#ifndef VMALLOC_START33#define VMALLOC_OFFSET SZ_8M34#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) \35& ~(VMALLOC_OFFSET-1))36#define VMALLOC_END (0xff000000UL)37#endif3839#define PTRS_PER_PTE 102440#define PTRS_PER_PGD 10244142/*43* PGDIR_SHIFT determines what a third-level page table entry can map44*/45#define PGDIR_SHIFT 224647#ifndef __ASSEMBLY__48extern void __pte_error(const char *file, int line, unsigned long val);49extern void __pgd_error(const char *file, int line, unsigned long val);5051#define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte_val(pte))52#define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd))53#endif /* !__ASSEMBLY__ */5455#define PGDIR_SIZE (1UL << PGDIR_SHIFT)56#define PGDIR_MASK (~(PGDIR_SIZE-1))5758/*59* This is the lowest virtual address we can permit any user space60* mapping to be mapped at. This is particularly important for61* non-high vector CPUs.62*/63#define FIRST_USER_ADDRESS PAGE_SIZE6465#define FIRST_USER_PGD_NR 166#define USER_PTRS_PER_PGD ((TASK_SIZE/PGDIR_SIZE) - FIRST_USER_PGD_NR)6768/*69* section address mask and size definitions.70*/71#define SECTION_SHIFT 2272#define SECTION_SIZE (1UL << SECTION_SHIFT)73#define SECTION_MASK (~(SECTION_SIZE-1))7475#ifndef __ASSEMBLY__7677/*78* The pgprot_* and protection_map entries will be fixed up in runtime79* to include the cachable bits based on memory policy, as well as any80* architecture dependent bits.81*/82#define _PTE_DEFAULT (PTE_PRESENT | PTE_YOUNG | PTE_CACHEABLE)8384extern pgprot_t pgprot_user;85extern pgprot_t pgprot_kernel;8687#define PAGE_NONE pgprot_user88#define PAGE_SHARED __pgprot(pgprot_val(pgprot_user | PTE_READ \89| PTE_WRITE)90#define PAGE_SHARED_EXEC __pgprot(pgprot_val(pgprot_user | PTE_READ \91| PTE_WRITE \92| PTE_EXEC)93#define PAGE_COPY __pgprot(pgprot_val(pgprot_user | PTE_READ)94#define PAGE_COPY_EXEC __pgprot(pgprot_val(pgprot_user | PTE_READ \95| PTE_EXEC)96#define PAGE_READONLY __pgprot(pgprot_val(pgprot_user | PTE_READ)97#define PAGE_READONLY_EXEC __pgprot(pgprot_val(pgprot_user | PTE_READ \98| PTE_EXEC)99#define PAGE_KERNEL pgprot_kernel100#define PAGE_KERNEL_EXEC __pgprot(pgprot_val(pgprot_kernel | PTE_EXEC))101102#define __PAGE_NONE __pgprot(_PTE_DEFAULT)103#define __PAGE_SHARED __pgprot(_PTE_DEFAULT | PTE_READ \104| PTE_WRITE)105#define __PAGE_SHARED_EXEC __pgprot(_PTE_DEFAULT | PTE_READ \106| PTE_WRITE \107| PTE_EXEC)108#define __PAGE_COPY __pgprot(_PTE_DEFAULT | PTE_READ)109#define __PAGE_COPY_EXEC __pgprot(_PTE_DEFAULT | PTE_READ \110| PTE_EXEC)111#define __PAGE_READONLY __pgprot(_PTE_DEFAULT | PTE_READ)112#define __PAGE_READONLY_EXEC __pgprot(_PTE_DEFAULT | PTE_READ \113| PTE_EXEC)114115#endif /* __ASSEMBLY__ */116117/*118* The table below defines the page protection levels that we insert into our119* Linux page table version. These get translated into the best that the120* architecture can perform. Note that on UniCore hardware:121* 1) We cannot do execute protection122* 2) If we could do execute protection, then read is implied123* 3) write implies read permissions124*/125#define __P000 __PAGE_NONE126#define __P001 __PAGE_READONLY127#define __P010 __PAGE_COPY128#define __P011 __PAGE_COPY129#define __P100 __PAGE_READONLY_EXEC130#define __P101 __PAGE_READONLY_EXEC131#define __P110 __PAGE_COPY_EXEC132#define __P111 __PAGE_COPY_EXEC133134#define __S000 __PAGE_NONE135#define __S001 __PAGE_READONLY136#define __S010 __PAGE_SHARED137#define __S011 __PAGE_SHARED138#define __S100 __PAGE_READONLY_EXEC139#define __S101 __PAGE_READONLY_EXEC140#define __S110 __PAGE_SHARED_EXEC141#define __S111 __PAGE_SHARED_EXEC142143#ifndef __ASSEMBLY__144/*145* ZERO_PAGE is a global shared page that is always zero: used146* for zero-mapped memory areas etc..147*/148extern struct page *empty_zero_page;149#define ZERO_PAGE(vaddr) (empty_zero_page)150151#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)152#define pfn_pte(pfn, prot) (__pte(((pfn) << PAGE_SHIFT) \153| pgprot_val(prot)))154155#define pte_none(pte) (!pte_val(pte))156#define pte_clear(mm, addr, ptep) set_pte(ptep, __pte(0))157#define pte_page(pte) (pfn_to_page(pte_pfn(pte)))158#define pte_offset_kernel(dir, addr) (pmd_page_vaddr(*(dir)) \159+ __pte_index(addr))160161#define pte_offset_map(dir, addr) (pmd_page_vaddr(*(dir)) \162+ __pte_index(addr))163#define pte_unmap(pte) do { } while (0)164165#define set_pte(ptep, pte) cpu_set_pte(ptep, pte)166167#define set_pte_at(mm, addr, ptep, pteval) \168do { \169set_pte(ptep, pteval); \170} while (0)171172/*173* The following only work if pte_present() is true.174* Undefined behaviour if not..175*/176#define pte_present(pte) (pte_val(pte) & PTE_PRESENT)177#define pte_write(pte) (pte_val(pte) & PTE_WRITE)178#define pte_dirty(pte) (pte_val(pte) & PTE_DIRTY)179#define pte_young(pte) (pte_val(pte) & PTE_YOUNG)180#define pte_exec(pte) (pte_val(pte) & PTE_EXEC)181#define pte_special(pte) (0)182183#define PTE_BIT_FUNC(fn, op) \184static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; }185186PTE_BIT_FUNC(wrprotect, &= ~PTE_WRITE);187PTE_BIT_FUNC(mkwrite, |= PTE_WRITE);188PTE_BIT_FUNC(mkclean, &= ~PTE_DIRTY);189PTE_BIT_FUNC(mkdirty, |= PTE_DIRTY);190PTE_BIT_FUNC(mkold, &= ~PTE_YOUNG);191PTE_BIT_FUNC(mkyoung, |= PTE_YOUNG);192193static inline pte_t pte_mkspecial(pte_t pte) { return pte; }194195/*196* Mark the prot value as uncacheable.197*/198#define pgprot_noncached(prot) \199__pgprot(pgprot_val(prot) & ~PTE_CACHEABLE)200#define pgprot_writecombine(prot) \201__pgprot(pgprot_val(prot) & ~PTE_CACHEABLE)202#define pgprot_dmacoherent(prot) \203__pgprot(pgprot_val(prot) & ~PTE_CACHEABLE)204205#define pmd_none(pmd) (!pmd_val(pmd))206#define pmd_present(pmd) (pmd_val(pmd) & PMD_PRESENT)207#define pmd_bad(pmd) (((pmd_val(pmd) & \208(PMD_PRESENT | PMD_TYPE_MASK)) \209!= (PMD_PRESENT | PMD_TYPE_TABLE)))210211#define set_pmd(pmdpd, pmdval) \212do { \213*(pmdpd) = pmdval; \214} while (0)215216#define pmd_clear(pmdp) \217do { \218set_pmd(pmdp, __pmd(0));\219clean_pmd_entry(pmdp); \220} while (0)221222#define pmd_page_vaddr(pmd) ((pte_t *)__va(pmd_val(pmd) & PAGE_MASK))223#define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd)))224225/*226* Conversion functions: convert a page and protection to a page entry,227* and a page entry and page directory to the page they refer to.228*/229#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)230231/* to find an entry in a page-table-directory */232#define pgd_index(addr) ((addr) >> PGDIR_SHIFT)233234#define pgd_offset(mm, addr) ((mm)->pgd+pgd_index(addr))235236/* to find an entry in a kernel page-table-directory */237#define pgd_offset_k(addr) pgd_offset(&init_mm, addr)238239/* Find an entry in the third-level page table.. */240#define __pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))241242static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)243{244const unsigned long mask = PTE_EXEC | PTE_WRITE | PTE_READ;245pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);246return pte;247}248249extern pgd_t swapper_pg_dir[PTRS_PER_PGD];250251/*252* Encode and decode a swap entry. Swap entries are stored in the Linux253* page tables as follows:254*255* 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1256* 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0257* <--------------- offset --------------> <--- type --> 0 0 0 0 0258*259* This gives us up to 127 swap files and 32GB per swap file. Note that260* the offset field is always non-zero.261*/262#define __SWP_TYPE_SHIFT 5263#define __SWP_TYPE_BITS 7264#define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1)265#define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)266267#define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) \268& __SWP_TYPE_MASK)269#define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT)270#define __swp_entry(type, offset) ((swp_entry_t) { \271((type) << __SWP_TYPE_SHIFT) | \272((offset) << __SWP_OFFSET_SHIFT) })273274#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })275#define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })276277/*278* It is an error for the kernel to have more swap files than we can279* encode in the PTEs. This ensures that we know when MAX_SWAPFILES280* is increased beyond what we presently support.281*/282#define MAX_SWAPFILES_CHECK() \283BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)284285/*286* Encode and decode a file entry. File entries are stored in the Linux287* page tables as follows:288*289* 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1290* 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0291* <----------------------- offset ----------------------> 1 0 0 0292*/293#define pte_file(pte) (pte_val(pte) & PTE_FILE)294#define pte_to_pgoff(x) (pte_val(x) >> 4)295#define pgoff_to_pte(x) __pte(((x) << 4) | PTE_FILE)296297#define PTE_FILE_MAX_BITS 28298299/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */300/* FIXME: this is not correct */301#define kern_addr_valid(addr) (1)302303#include <asm-generic/pgtable.h>304305/*306* remap a physical page `pfn' of size `size' with page protection `prot'307* into virtual address `from'308*/309#define io_remap_pfn_range(vma, from, pfn, size, prot) \310remap_pfn_range(vma, from, pfn, size, prot)311312#define pgtable_cache_init() do { } while (0)313314#endif /* !__ASSEMBLY__ */315316#endif /* __UNICORE_PGTABLE_H__ */317318319