Path: blob/master/arch/unicore32/include/asm/ptrace.h
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/*1* linux/arch/unicore32/include/asm/ptrace.h2*3* Code specific to PKUnity SoC and UniCore ISA4*5* Copyright (C) 2001-2010 GUAN Xue-tao6*7* This program is free software; you can redistribute it and/or modify8* it under the terms of the GNU General Public License version 2 as9* published by the Free Software Foundation.10*/11#ifndef __UNICORE_PTRACE_H__12#define __UNICORE_PTRACE_H__1314#define PTRACE_GET_THREAD_AREA 221516/*17* PSR bits18*/19#define USER_MODE 0x0000001020#define REAL_MODE 0x0000001121#define INTR_MODE 0x0000001222#define PRIV_MODE 0x0000001323#define ABRT_MODE 0x0000001724#define EXTN_MODE 0x0000001b25#define SUSR_MODE 0x0000001f26#define MODE_MASK 0x0000001f27#define PSR_R_BIT 0x0000004028#define PSR_I_BIT 0x0000008029#define PSR_V_BIT 0x1000000030#define PSR_C_BIT 0x2000000031#define PSR_Z_BIT 0x4000000032#define PSR_S_BIT 0x800000003334/*35* Groups of PSR bits36*/37#define PSR_f 0xff000000 /* Flags */38#define PSR_c 0x000000ff /* Control */3940#ifndef __ASSEMBLY__4142/*43* This struct defines the way the registers are stored on the44* stack during a system call. Note that sizeof(struct pt_regs)45* has to be a multiple of 8.46*/47struct pt_regs {48unsigned long uregs[34];49};5051#define UCreg_asr uregs[32]52#define UCreg_pc uregs[31]53#define UCreg_lr uregs[30]54#define UCreg_sp uregs[29]55#define UCreg_ip uregs[28]56#define UCreg_fp uregs[27]57#define UCreg_26 uregs[26]58#define UCreg_25 uregs[25]59#define UCreg_24 uregs[24]60#define UCreg_23 uregs[23]61#define UCreg_22 uregs[22]62#define UCreg_21 uregs[21]63#define UCreg_20 uregs[20]64#define UCreg_19 uregs[19]65#define UCreg_18 uregs[18]66#define UCreg_17 uregs[17]67#define UCreg_16 uregs[16]68#define UCreg_15 uregs[15]69#define UCreg_14 uregs[14]70#define UCreg_13 uregs[13]71#define UCreg_12 uregs[12]72#define UCreg_11 uregs[11]73#define UCreg_10 uregs[10]74#define UCreg_09 uregs[9]75#define UCreg_08 uregs[8]76#define UCreg_07 uregs[7]77#define UCreg_06 uregs[6]78#define UCreg_05 uregs[5]79#define UCreg_04 uregs[4]80#define UCreg_03 uregs[3]81#define UCreg_02 uregs[2]82#define UCreg_01 uregs[1]83#define UCreg_00 uregs[0]84#define UCreg_ORIG_00 uregs[33]8586#ifdef __KERNEL__8788#define user_mode(regs) \89(processor_mode(regs) == USER_MODE)9091#define processor_mode(regs) \92((regs)->UCreg_asr & MODE_MASK)9394#define interrupts_enabled(regs) \95(!((regs)->UCreg_asr & PSR_I_BIT))9697#define fast_interrupts_enabled(regs) \98(!((regs)->UCreg_asr & PSR_R_BIT))99100/* Are the current registers suitable for user mode?101* (used to maintain security in signal handlers)102*/103static inline int valid_user_regs(struct pt_regs *regs)104{105unsigned long mode = regs->UCreg_asr & MODE_MASK;106107/*108* Always clear the R (REAL) bits109*/110regs->UCreg_asr &= ~(PSR_R_BIT);111112if ((regs->UCreg_asr & PSR_I_BIT) == 0) {113if (mode == USER_MODE)114return 1;115}116117/*118* Force ASR to something logical...119*/120regs->UCreg_asr &= PSR_f | USER_MODE;121122return 0;123}124125#define instruction_pointer(regs) ((regs)->UCreg_pc)126127#endif /* __KERNEL__ */128129#endif /* __ASSEMBLY__ */130131#endif132133134135