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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/unicore32/include/mach/regs-sdc.h
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/*

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 * PKUnity Multi-Media Card and Security Digital Card (MMC/SD) Registers

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 */

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/*

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 * Clock Control Reg SDC_CCR

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 */

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#define SDC_CCR		(PKUNITY_SDC_BASE + 0x0000)

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/*

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 * Software Reset Reg SDC_SRR

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 */

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#define SDC_SRR		(PKUNITY_SDC_BASE + 0x0004)

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/*

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 * Argument Reg SDC_ARGUMENT

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 */

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#define SDC_ARGUMENT	(PKUNITY_SDC_BASE + 0x0008)

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/*

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 * Command Reg SDC_COMMAND

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 */

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#define SDC_COMMAND	(PKUNITY_SDC_BASE + 0x000C)

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/*

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 * Block Size Reg SDC_BLOCKSIZE

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 */

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#define SDC_BLOCKSIZE	(PKUNITY_SDC_BASE + 0x0010)

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/*

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 * Block Cound Reg SDC_BLOCKCOUNT

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 */

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#define SDC_BLOCKCOUNT	(PKUNITY_SDC_BASE + 0x0014)

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/*

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 * Transfer Mode Reg SDC_TMR

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 */

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#define SDC_TMR		(PKUNITY_SDC_BASE + 0x0018)

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/*

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 * Response Reg. 0 SDC_RES0

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 */

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#define SDC_RES0	(PKUNITY_SDC_BASE + 0x001C)

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/*

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 * Response Reg. 1 SDC_RES1

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 */

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#define SDC_RES1	(PKUNITY_SDC_BASE + 0x0020)

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/*

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 * Response Reg. 2 SDC_RES2

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 */

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#define SDC_RES2	(PKUNITY_SDC_BASE + 0x0024)

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/*

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 * Response Reg. 3 SDC_RES3

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 */

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#define SDC_RES3	(PKUNITY_SDC_BASE + 0x0028)

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/*

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 * Read Timeout Control Reg SDC_RTCR

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 */

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#define SDC_RTCR	(PKUNITY_SDC_BASE + 0x002C)

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/*

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 * Interrupt Status Reg SDC_ISR

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 */

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#define SDC_ISR		(PKUNITY_SDC_BASE + 0x0030)

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/*

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 * Interrupt Status Mask Reg SDC_ISMR

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 */

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#define SDC_ISMR	(PKUNITY_SDC_BASE + 0x0034)

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/*

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 * RX FIFO SDC_RXFIFO

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 */

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#define SDC_RXFIFO	(PKUNITY_SDC_BASE + 0x0038)

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/*

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 * TX FIFO SDC_TXFIFO

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 */

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#define SDC_TXFIFO	(PKUNITY_SDC_BASE + 0x003C)

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/*

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 * SD Clock Enable SDC_CCR_CLKEN

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 */

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#define SDC_CCR_CLKEN			FIELD(1, 1, 2)

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/*

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 * [15:8] SDC_CCR_PDIV(v)

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 */

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#define SDC_CCR_PDIV(v)			FIELD((v), 8, 8)

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/*

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 * Software reset enable SDC_SRR_ENABLE

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 */

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#define SDC_SRR_ENABLE			FIELD(0, 1, 0)

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/*

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 * Software reset disable SDC_SRR_DISABLE

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 */

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#define SDC_SRR_DISABLE			FIELD(1, 1, 0)

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/*

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 * Response type SDC_COMMAND_RESTYPE_MASK

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 */

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#define SDC_COMMAND_RESTYPE_MASK	FMASK(2, 0)

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/*

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 * No response SDC_COMMAND_RESTYPE_NONE

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 */

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#define SDC_COMMAND_RESTYPE_NONE	FIELD(0, 2, 0)

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/*

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 * 136-bit long response SDC_COMMAND_RESTYPE_LONG

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 */

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#define SDC_COMMAND_RESTYPE_LONG	FIELD(1, 2, 0)

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/*

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 * 48-bit short response SDC_COMMAND_RESTYPE_SHORT

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 */

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#define SDC_COMMAND_RESTYPE_SHORT	FIELD(2, 2, 0)

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/*

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 * 48-bit short and test if busy response SDC_COMMAND_RESTYPE_SHORTBUSY

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 */

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#define SDC_COMMAND_RESTYPE_SHORTBUSY	FIELD(3, 2, 0)

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/*

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 * data ready SDC_COMMAND_DATAREADY

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 */

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#define SDC_COMMAND_DATAREADY		FIELD(1, 1, 2)

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#define SDC_COMMAND_CMDEN		FIELD(1, 1, 3)

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/*

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 * [10:5] SDC_COMMAND_CMDINDEX(v)

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 */

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#define SDC_COMMAND_CMDINDEX(v)		FIELD((v), 6, 5)

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/*

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 * [10:0] SDC_BLOCKSIZE_BSMASK(v)

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 */

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#define SDC_BLOCKSIZE_BSMASK(v)		FIELD((v), 11, 0)

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/*

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 * [11:0] SDC_BLOCKCOUNT_BCMASK(v)

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 */

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#define SDC_BLOCKCOUNT_BCMASK(v)	FIELD((v), 12, 0)

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/*

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 * Data Width 1bit SDC_TMR_WTH_1BIT

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 */

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#define SDC_TMR_WTH_1BIT		FIELD(0, 1, 0)

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/*

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 * Data Width 4bit SDC_TMR_WTH_4BIT

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 */

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#define SDC_TMR_WTH_4BIT		FIELD(1, 1, 0)

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/*

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 * Read SDC_TMR_DIR_READ

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 */

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#define SDC_TMR_DIR_READ		FIELD(0, 1, 1)

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/*

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 * Write SDC_TMR_DIR_WRITE

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 */

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#define SDC_TMR_DIR_WRITE		FIELD(1, 1, 1)

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#define SDC_IR_MASK			FMASK(13, 0)

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#define SDC_IR_RESTIMEOUT		FIELD(1, 1, 0)

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#define SDC_IR_WRITECRC			FIELD(1, 1, 1)

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#define SDC_IR_READCRC			FIELD(1, 1, 2)

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#define SDC_IR_TXFIFOREAD		FIELD(1, 1, 3)

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#define SDC_IR_RXFIFOWRITE		FIELD(1, 1, 4)

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#define SDC_IR_READTIMEOUT		FIELD(1, 1, 5)

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#define SDC_IR_DATACOMPLETE		FIELD(1, 1, 6)

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#define SDC_IR_CMDCOMPLETE		FIELD(1, 1, 7)

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#define SDC_IR_RXFIFOFULL		FIELD(1, 1, 8)

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#define SDC_IR_RXFIFOEMPTY		FIELD(1, 1, 9)

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#define SDC_IR_TXFIFOFULL		FIELD(1, 1, 10)

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#define SDC_IR_TXFIFOEMPTY		FIELD(1, 1, 11)

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#define SDC_IR_ENDCMDWITHRES		FIELD(1, 1, 12)

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