CoCalc -- proc-macros.S

GitHub Repository: awilliam/linux-vfio
Path: blob/master/arch/unicore32/mm/proc-macros.S
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/*
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 * linux/arch/unicore32/mm/proc-macros.S
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 *
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 * Code specific to PKUnity SoC and UniCore ISA
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 *
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 * Copyright (C) 2001-2010 GUAN Xue-tao
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License version 2 as
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 * published by the Free Software Foundation.
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 *
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 * We need constants.h for:
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 *  VMA_VM_MM
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 *  VMA_VM_FLAGS
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 *  VM_EXEC
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 */
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#include <generated/asm-offsets.h>
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#include <asm/thread_info.h>
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#include <asm/memory.h>
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/*
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 * the cache line sizes of the I and D cache are the same
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 */
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#define CACHE_LINESIZE	32
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/*
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 * This is the maximum size of an area which will be invalidated
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 * using the single invalidate entry instructions.  Anything larger
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 * than this, and we go for the whole cache.
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 *
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 * This value should be chosen such that we choose the cheapest
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 * alternative.
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 */
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#ifdef CONFIG_CPU_UCV2
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#define MAX_AREA_SIZE	0x800		/* 64 cache line */
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#endif
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/*
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 * vma_vm_mm - get mm pointer from vma pointer (vma->vm_mm)
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 */
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	.macro	vma_vm_mm, rd, rn
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	ldw	\rd, [\rn+], #VMA_VM_MM
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	.endm
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/*
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 * vma_vm_flags - get vma->vm_flags
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 */
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	.macro	vma_vm_flags, rd, rn
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	ldw	\rd, [\rn+], #VMA_VM_FLAGS
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	.endm
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	.macro	tsk_mm, rd, rn
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	ldw	\rd, [\rn+], #TI_TASK
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	ldw	\rd, [\rd+], #TSK_ACTIVE_MM
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	.endm
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/*
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 * act_mm - get current->active_mm
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 */
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	.macro	act_mm, rd
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	andn	\rd, sp, #8128
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	andn	\rd, \rd, #63
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	ldw	\rd, [\rd+], #TI_TASK
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	ldw	\rd, [\rd+], #TSK_ACTIVE_MM
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	.endm
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/*
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 * mmid - get context id from mm pointer (mm->context.id)
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 */
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	.macro	mmid, rd, rn
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	ldw	\rd, [\rn+], #MM_CONTEXT_ID
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	.endm
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/*
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 * mask_asid - mask the ASID from the context ID
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 */
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	.macro	asid, rd, rn
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	and	\rd, \rn, #255
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	.endm
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	.macro	crval, clear, mmuset, ucset
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	.word	\clear
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	.word	\mmuset
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	.endm
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#ifndef CONFIG_CPU_DCACHE_LINE_DISABLE
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/*
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 * va2pa va, pa, tbl, msk, off, err
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 *	This macro is used to translate virtual address to its physical address.
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 *
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 *	va: virtual address
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 *	pa: physical address, result is stored in this register
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 *	tbl, msk, off:	temp registers, will be destroyed
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 *	err: jump to error label if the physical address not exist
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 * NOTE: all regs must be different
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 */
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	.macro	va2pa, va, pa, tbl, msk, off, err=990f
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	movc	\pa, p0.c2, #0
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	mov	\off, \va >> #22		@ off <- index of 1st page table
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	adr	\tbl, 910f			@ tbl <- table of 1st page table
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900:						@ ---- handle 1, 2 page table
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	add	\pa, \pa, #PAGE_OFFSET		@ pa <- virt addr of page table
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	ldw	\pa, [\pa+], \off << #2		@ pa <- the content of pt
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	cand.a	\pa, #4				@ test exist bit
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	beq	\err				@ if not exist
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	and	\off, \pa, #3			@ off <- the last 2 bits
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	add	\tbl, \tbl, \off << #3		@ cmove table pointer
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	ldw	\msk, [\tbl+], #0		@ get the mask
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	ldw	pc, [\tbl+], #4
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930:						@ ---- handle 2nd page table
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	and	\pa, \pa, \msk			@ pa <- phys addr of 2nd pt
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	mov	\off, \va << #10
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	cntlo	\tbl, \msk			@ use tbl as temp reg
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	mov	\off, \off >> \tbl
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	mov	\off, \off >> #2		@ off <- index of 2nd pt
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	adr	\tbl, 920f			@ tbl <- table of 2nd pt
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	b	900b
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910:						@ 1st level page table
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	.word	0xfffff000, 930b		@ second level page table
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	.word	0xfffffc00, 930b		@ second level large page table
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	.word	0x00000000, \err		@ invalid
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	.word	0xffc00000, 980f		@ super page
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920:						@ 2nd level page table
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	.word	0xfffff000, 980f		@ page
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	.word	0xffffc000, 980f		@ middle page
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	.word	0xffff0000, 980f		@ large page
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	.word	0x00000000, \err		@ invalid
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980:
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	andn	\tbl, \va, \msk
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	and	\pa, \pa, \msk
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	or	\pa, \pa, \tbl
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990:
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	.endm
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#endif
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	.macro dcacheline_flush, addr, t1, t2
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	mov	\t1, \addr << #20
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	ldw	\t2, =_stext			@ _stext must ALIGN(4096)
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	add	\t2, \t2, \t1 >> #20
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	ldw	\t1, [\t2+], #0x0000
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	ldw	\t1, [\t2+], #0x1000
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	ldw	\t1, [\t2+], #0x2000
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	ldw	\t1, [\t2+], #0x3000
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	.endm
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