#ifndef _ASM_X86_AGP_H1#define _ASM_X86_AGP_H23#include <asm/pgtable.h>4#include <asm/cacheflush.h>56/*7* Functions to keep the agpgart mappings coherent with the MMU. The8* GART gives the CPU a physical alias of pages in memory. The alias9* region is mapped uncacheable. Make sure there are no conflicting10* mappings with different cachability attributes for the same11* page. This avoids data corruption on some CPUs.12*/1314#define map_page_into_agp(page) set_pages_uc(page, 1)15#define unmap_page_from_agp(page) set_pages_wb(page, 1)1617/*18* Could use CLFLUSH here if the cpu supports it. But then it would19* need to be called for each cacheline of the whole page so it may20* not be worth it. Would need a page for it.21*/22#define flush_agp_cache() wbinvd()2324/* GATT allocation. Returns/accepts GATT kernel virtual address. */25#define alloc_gatt_pages(order) \26((char *)__get_free_pages(GFP_KERNEL, (order)))27#define free_gatt_pages(table, order) \28free_pages((unsigned long)(table), (order))2930#endif /* _ASM_X86_AGP_H */313233