Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
awilliam
GitHub Repository: awilliam/linux-vfio
Path: blob/master/arch/x86/kernel/apic/x2apic_cluster.c
17621 views
1
#include <linux/threads.h>
2
#include <linux/cpumask.h>
3
#include <linux/string.h>
4
#include <linux/kernel.h>
5
#include <linux/ctype.h>
6
#include <linux/init.h>
7
#include <linux/dmar.h>
8
#include <linux/cpu.h>
9
10
#include <asm/smp.h>
11
#include <asm/x2apic.h>
12
13
static DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);
14
static DEFINE_PER_CPU(cpumask_var_t, cpus_in_cluster);
15
static DEFINE_PER_CPU(cpumask_var_t, ipi_mask);
16
17
static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
18
{
19
return x2apic_enabled();
20
}
21
22
static inline u32 x2apic_cluster(int cpu)
23
{
24
return per_cpu(x86_cpu_to_logical_apicid, cpu) >> 16;
25
}
26
27
static void
28
__x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
29
{
30
struct cpumask *cpus_in_cluster_ptr;
31
struct cpumask *ipi_mask_ptr;
32
unsigned int cpu, this_cpu;
33
unsigned long flags;
34
u32 dest;
35
36
x2apic_wrmsr_fence();
37
38
local_irq_save(flags);
39
40
this_cpu = smp_processor_id();
41
42
/*
43
* We are to modify mask, so we need an own copy
44
* and be sure it's manipulated with irq off.
45
*/
46
ipi_mask_ptr = __raw_get_cpu_var(ipi_mask);
47
cpumask_copy(ipi_mask_ptr, mask);
48
49
/*
50
* The idea is to send one IPI per cluster.
51
*/
52
for_each_cpu(cpu, ipi_mask_ptr) {
53
unsigned long i;
54
55
cpus_in_cluster_ptr = per_cpu(cpus_in_cluster, cpu);
56
dest = 0;
57
58
/* Collect cpus in cluster. */
59
for_each_cpu_and(i, ipi_mask_ptr, cpus_in_cluster_ptr) {
60
if (apic_dest == APIC_DEST_ALLINC || i != this_cpu)
61
dest |= per_cpu(x86_cpu_to_logical_apicid, i);
62
}
63
64
if (!dest)
65
continue;
66
67
__x2apic_send_IPI_dest(dest, vector, apic->dest_logical);
68
/*
69
* Cluster sibling cpus should be discared now so
70
* we would not send IPI them second time.
71
*/
72
cpumask_andnot(ipi_mask_ptr, ipi_mask_ptr, cpus_in_cluster_ptr);
73
}
74
75
local_irq_restore(flags);
76
}
77
78
static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
79
{
80
__x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
81
}
82
83
static void
84
x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
85
{
86
__x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
87
}
88
89
static void x2apic_send_IPI_allbutself(int vector)
90
{
91
__x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT);
92
}
93
94
static void x2apic_send_IPI_all(int vector)
95
{
96
__x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
97
}
98
99
static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)
100
{
101
/*
102
* We're using fixed IRQ delivery, can only return one logical APIC ID.
103
* May as well be the first.
104
*/
105
int cpu = cpumask_first(cpumask);
106
107
if ((unsigned)cpu < nr_cpu_ids)
108
return per_cpu(x86_cpu_to_logical_apicid, cpu);
109
else
110
return BAD_APICID;
111
}
112
113
static unsigned int
114
x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
115
const struct cpumask *andmask)
116
{
117
int cpu;
118
119
/*
120
* We're using fixed IRQ delivery, can only return one logical APIC ID.
121
* May as well be the first.
122
*/
123
for_each_cpu_and(cpu, cpumask, andmask) {
124
if (cpumask_test_cpu(cpu, cpu_online_mask))
125
break;
126
}
127
128
return per_cpu(x86_cpu_to_logical_apicid, cpu);
129
}
130
131
static void init_x2apic_ldr(void)
132
{
133
unsigned int this_cpu = smp_processor_id();
134
unsigned int cpu;
135
136
per_cpu(x86_cpu_to_logical_apicid, this_cpu) = apic_read(APIC_LDR);
137
138
__cpu_set(this_cpu, per_cpu(cpus_in_cluster, this_cpu));
139
for_each_online_cpu(cpu) {
140
if (x2apic_cluster(this_cpu) != x2apic_cluster(cpu))
141
continue;
142
__cpu_set(this_cpu, per_cpu(cpus_in_cluster, cpu));
143
__cpu_set(cpu, per_cpu(cpus_in_cluster, this_cpu));
144
}
145
}
146
147
/*
148
* At CPU state changes, update the x2apic cluster sibling info.
149
*/
150
static int __cpuinit
151
update_clusterinfo(struct notifier_block *nfb, unsigned long action, void *hcpu)
152
{
153
unsigned int this_cpu = (unsigned long)hcpu;
154
unsigned int cpu;
155
int err = 0;
156
157
switch (action) {
158
case CPU_UP_PREPARE:
159
if (!zalloc_cpumask_var(&per_cpu(cpus_in_cluster, this_cpu),
160
GFP_KERNEL)) {
161
err = -ENOMEM;
162
} else if (!zalloc_cpumask_var(&per_cpu(ipi_mask, this_cpu),
163
GFP_KERNEL)) {
164
free_cpumask_var(per_cpu(cpus_in_cluster, this_cpu));
165
err = -ENOMEM;
166
}
167
break;
168
case CPU_UP_CANCELED:
169
case CPU_UP_CANCELED_FROZEN:
170
case CPU_DEAD:
171
for_each_online_cpu(cpu) {
172
if (x2apic_cluster(this_cpu) != x2apic_cluster(cpu))
173
continue;
174
__cpu_clear(this_cpu, per_cpu(cpus_in_cluster, cpu));
175
__cpu_clear(cpu, per_cpu(cpus_in_cluster, this_cpu));
176
}
177
free_cpumask_var(per_cpu(cpus_in_cluster, this_cpu));
178
free_cpumask_var(per_cpu(ipi_mask, this_cpu));
179
break;
180
}
181
182
return notifier_from_errno(err);
183
}
184
185
static struct notifier_block __refdata x2apic_cpu_notifier = {
186
.notifier_call = update_clusterinfo,
187
};
188
189
static int x2apic_init_cpu_notifier(void)
190
{
191
int cpu = smp_processor_id();
192
193
zalloc_cpumask_var(&per_cpu(cpus_in_cluster, cpu), GFP_KERNEL);
194
zalloc_cpumask_var(&per_cpu(ipi_mask, cpu), GFP_KERNEL);
195
196
BUG_ON(!per_cpu(cpus_in_cluster, cpu) || !per_cpu(ipi_mask, cpu));
197
198
__cpu_set(cpu, per_cpu(cpus_in_cluster, cpu));
199
register_hotcpu_notifier(&x2apic_cpu_notifier);
200
return 1;
201
}
202
203
static int x2apic_cluster_probe(void)
204
{
205
if (x2apic_mode)
206
return x2apic_init_cpu_notifier();
207
else
208
return 0;
209
}
210
211
static struct apic apic_x2apic_cluster = {
212
213
.name = "cluster x2apic",
214
.probe = x2apic_cluster_probe,
215
.acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
216
.apic_id_registered = x2apic_apic_id_registered,
217
218
.irq_delivery_mode = dest_LowestPrio,
219
.irq_dest_mode = 1, /* logical */
220
221
.target_cpus = x2apic_target_cpus,
222
.disable_esr = 0,
223
.dest_logical = APIC_DEST_LOGICAL,
224
.check_apicid_used = NULL,
225
.check_apicid_present = NULL,
226
227
.vector_allocation_domain = x2apic_vector_allocation_domain,
228
.init_apic_ldr = init_x2apic_ldr,
229
230
.ioapic_phys_id_map = NULL,
231
.setup_apic_routing = NULL,
232
.multi_timer_check = NULL,
233
.cpu_present_to_apicid = default_cpu_present_to_apicid,
234
.apicid_to_cpu_present = NULL,
235
.setup_portio_remap = NULL,
236
.check_phys_apicid_present = default_check_phys_apicid_present,
237
.enable_apic_mode = NULL,
238
.phys_pkg_id = x2apic_phys_pkg_id,
239
.mps_oem_check = NULL,
240
241
.get_apic_id = x2apic_get_apic_id,
242
.set_apic_id = x2apic_set_apic_id,
243
.apic_id_mask = 0xFFFFFFFFu,
244
245
.cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
246
.cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and,
247
248
.send_IPI_mask = x2apic_send_IPI_mask,
249
.send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
250
.send_IPI_allbutself = x2apic_send_IPI_allbutself,
251
.send_IPI_all = x2apic_send_IPI_all,
252
.send_IPI_self = x2apic_send_IPI_self,
253
254
.trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
255
.trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
256
.wait_for_init_deassert = NULL,
257
.smp_callin_clear_local_apic = NULL,
258
.inquire_remote_apic = NULL,
259
260
.read = native_apic_msr_read,
261
.write = native_apic_msr_write,
262
.icr_read = native_x2apic_icr_read,
263
.icr_write = native_x2apic_icr_write,
264
.wait_icr_idle = native_x2apic_wait_icr_idle,
265
.safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
266
};
267
268
apic_driver(apic_x2apic_cluster);
269
270