Path: blob/master/arch/x86/kernel/apic/x2apic_cluster.c
17621 views
#include <linux/threads.h>1#include <linux/cpumask.h>2#include <linux/string.h>3#include <linux/kernel.h>4#include <linux/ctype.h>5#include <linux/init.h>6#include <linux/dmar.h>7#include <linux/cpu.h>89#include <asm/smp.h>10#include <asm/x2apic.h>1112static DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);13static DEFINE_PER_CPU(cpumask_var_t, cpus_in_cluster);14static DEFINE_PER_CPU(cpumask_var_t, ipi_mask);1516static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)17{18return x2apic_enabled();19}2021static inline u32 x2apic_cluster(int cpu)22{23return per_cpu(x86_cpu_to_logical_apicid, cpu) >> 16;24}2526static void27__x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)28{29struct cpumask *cpus_in_cluster_ptr;30struct cpumask *ipi_mask_ptr;31unsigned int cpu, this_cpu;32unsigned long flags;33u32 dest;3435x2apic_wrmsr_fence();3637local_irq_save(flags);3839this_cpu = smp_processor_id();4041/*42* We are to modify mask, so we need an own copy43* and be sure it's manipulated with irq off.44*/45ipi_mask_ptr = __raw_get_cpu_var(ipi_mask);46cpumask_copy(ipi_mask_ptr, mask);4748/*49* The idea is to send one IPI per cluster.50*/51for_each_cpu(cpu, ipi_mask_ptr) {52unsigned long i;5354cpus_in_cluster_ptr = per_cpu(cpus_in_cluster, cpu);55dest = 0;5657/* Collect cpus in cluster. */58for_each_cpu_and(i, ipi_mask_ptr, cpus_in_cluster_ptr) {59if (apic_dest == APIC_DEST_ALLINC || i != this_cpu)60dest |= per_cpu(x86_cpu_to_logical_apicid, i);61}6263if (!dest)64continue;6566__x2apic_send_IPI_dest(dest, vector, apic->dest_logical);67/*68* Cluster sibling cpus should be discared now so69* we would not send IPI them second time.70*/71cpumask_andnot(ipi_mask_ptr, ipi_mask_ptr, cpus_in_cluster_ptr);72}7374local_irq_restore(flags);75}7677static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)78{79__x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);80}8182static void83x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)84{85__x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);86}8788static void x2apic_send_IPI_allbutself(int vector)89{90__x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT);91}9293static void x2apic_send_IPI_all(int vector)94{95__x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);96}9798static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)99{100/*101* We're using fixed IRQ delivery, can only return one logical APIC ID.102* May as well be the first.103*/104int cpu = cpumask_first(cpumask);105106if ((unsigned)cpu < nr_cpu_ids)107return per_cpu(x86_cpu_to_logical_apicid, cpu);108else109return BAD_APICID;110}111112static unsigned int113x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,114const struct cpumask *andmask)115{116int cpu;117118/*119* We're using fixed IRQ delivery, can only return one logical APIC ID.120* May as well be the first.121*/122for_each_cpu_and(cpu, cpumask, andmask) {123if (cpumask_test_cpu(cpu, cpu_online_mask))124break;125}126127return per_cpu(x86_cpu_to_logical_apicid, cpu);128}129130static void init_x2apic_ldr(void)131{132unsigned int this_cpu = smp_processor_id();133unsigned int cpu;134135per_cpu(x86_cpu_to_logical_apicid, this_cpu) = apic_read(APIC_LDR);136137__cpu_set(this_cpu, per_cpu(cpus_in_cluster, this_cpu));138for_each_online_cpu(cpu) {139if (x2apic_cluster(this_cpu) != x2apic_cluster(cpu))140continue;141__cpu_set(this_cpu, per_cpu(cpus_in_cluster, cpu));142__cpu_set(cpu, per_cpu(cpus_in_cluster, this_cpu));143}144}145146/*147* At CPU state changes, update the x2apic cluster sibling info.148*/149static int __cpuinit150update_clusterinfo(struct notifier_block *nfb, unsigned long action, void *hcpu)151{152unsigned int this_cpu = (unsigned long)hcpu;153unsigned int cpu;154int err = 0;155156switch (action) {157case CPU_UP_PREPARE:158if (!zalloc_cpumask_var(&per_cpu(cpus_in_cluster, this_cpu),159GFP_KERNEL)) {160err = -ENOMEM;161} else if (!zalloc_cpumask_var(&per_cpu(ipi_mask, this_cpu),162GFP_KERNEL)) {163free_cpumask_var(per_cpu(cpus_in_cluster, this_cpu));164err = -ENOMEM;165}166break;167case CPU_UP_CANCELED:168case CPU_UP_CANCELED_FROZEN:169case CPU_DEAD:170for_each_online_cpu(cpu) {171if (x2apic_cluster(this_cpu) != x2apic_cluster(cpu))172continue;173__cpu_clear(this_cpu, per_cpu(cpus_in_cluster, cpu));174__cpu_clear(cpu, per_cpu(cpus_in_cluster, this_cpu));175}176free_cpumask_var(per_cpu(cpus_in_cluster, this_cpu));177free_cpumask_var(per_cpu(ipi_mask, this_cpu));178break;179}180181return notifier_from_errno(err);182}183184static struct notifier_block __refdata x2apic_cpu_notifier = {185.notifier_call = update_clusterinfo,186};187188static int x2apic_init_cpu_notifier(void)189{190int cpu = smp_processor_id();191192zalloc_cpumask_var(&per_cpu(cpus_in_cluster, cpu), GFP_KERNEL);193zalloc_cpumask_var(&per_cpu(ipi_mask, cpu), GFP_KERNEL);194195BUG_ON(!per_cpu(cpus_in_cluster, cpu) || !per_cpu(ipi_mask, cpu));196197__cpu_set(cpu, per_cpu(cpus_in_cluster, cpu));198register_hotcpu_notifier(&x2apic_cpu_notifier);199return 1;200}201202static int x2apic_cluster_probe(void)203{204if (x2apic_mode)205return x2apic_init_cpu_notifier();206else207return 0;208}209210static struct apic apic_x2apic_cluster = {211212.name = "cluster x2apic",213.probe = x2apic_cluster_probe,214.acpi_madt_oem_check = x2apic_acpi_madt_oem_check,215.apic_id_registered = x2apic_apic_id_registered,216217.irq_delivery_mode = dest_LowestPrio,218.irq_dest_mode = 1, /* logical */219220.target_cpus = x2apic_target_cpus,221.disable_esr = 0,222.dest_logical = APIC_DEST_LOGICAL,223.check_apicid_used = NULL,224.check_apicid_present = NULL,225226.vector_allocation_domain = x2apic_vector_allocation_domain,227.init_apic_ldr = init_x2apic_ldr,228229.ioapic_phys_id_map = NULL,230.setup_apic_routing = NULL,231.multi_timer_check = NULL,232.cpu_present_to_apicid = default_cpu_present_to_apicid,233.apicid_to_cpu_present = NULL,234.setup_portio_remap = NULL,235.check_phys_apicid_present = default_check_phys_apicid_present,236.enable_apic_mode = NULL,237.phys_pkg_id = x2apic_phys_pkg_id,238.mps_oem_check = NULL,239240.get_apic_id = x2apic_get_apic_id,241.set_apic_id = x2apic_set_apic_id,242.apic_id_mask = 0xFFFFFFFFu,243244.cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,245.cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and,246247.send_IPI_mask = x2apic_send_IPI_mask,248.send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,249.send_IPI_allbutself = x2apic_send_IPI_allbutself,250.send_IPI_all = x2apic_send_IPI_all,251.send_IPI_self = x2apic_send_IPI_self,252253.trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,254.trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,255.wait_for_init_deassert = NULL,256.smp_callin_clear_local_apic = NULL,257.inquire_remote_apic = NULL,258259.read = native_apic_msr_read,260.write = native_apic_msr_write,261.icr_read = native_x2apic_icr_read,262.icr_write = native_x2apic_icr_write,263.wait_icr_idle = native_x2apic_wait_icr_idle,264.safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,265};266267apic_driver(apic_x2apic_cluster);268269270