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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/x86/pci/broadcom_bus.c
10818 views
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/*

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 * Read address ranges from a Broadcom CNB20LE Host Bridge

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 *

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 * Copyright (c) 2010 Ira W. Snyder <[email protected]>

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 *

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 * This program is free software; you can redistribute it and/or modify it

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 * under the terms of the GNU General Public License as published by the

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 * Free Software Foundation; either version 2 of the License, or (at your

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 * option) any later version.

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 */

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#include <linux/acpi.h>

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#include <linux/delay.h>

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#include <linux/dmi.h>

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#include <linux/pci.h>

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#include <linux/init.h>

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#include <asm/pci_x86.h>

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#include "bus_numa.h"

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static void __devinit cnb20le_res(struct pci_dev *dev)

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{

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	struct pci_root_info *info;

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	struct resource res;

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	u16 word1, word2;

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	u8 fbus, lbus;

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	int i;

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#ifdef CONFIG_ACPI

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	/*

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	 * We should get host bridge information from ACPI unless the BIOS

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	 * doesn't support it.

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	 */

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	if (acpi_os_get_root_pointer())

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		return;

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#endif

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	info = &pci_root_info[pci_root_num];

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	pci_root_num++;

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	/* read the PCI bus numbers */

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	pci_read_config_byte(dev, 0x44, &fbus);

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	pci_read_config_byte(dev, 0x45, &lbus);

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	info->bus_min = fbus;

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	info->bus_max = lbus;

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	/*

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	 * Add the legacy IDE ports on bus 0

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	 *

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	 * These do not exist anywhere in the bridge registers, AFAICT. I do

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	 * not have the datasheet, so this is the best I can do.

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	 */

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	if (fbus == 0) {

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		update_res(info, 0x01f0, 0x01f7, IORESOURCE_IO, 0);

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		update_res(info, 0x03f6, 0x03f6, IORESOURCE_IO, 0);

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		update_res(info, 0x0170, 0x0177, IORESOURCE_IO, 0);

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		update_res(info, 0x0376, 0x0376, IORESOURCE_IO, 0);

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		update_res(info, 0xffa0, 0xffaf, IORESOURCE_IO, 0);

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	}

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	/* read the non-prefetchable memory window */

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	pci_read_config_word(dev, 0xc0, &word1);

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	pci_read_config_word(dev, 0xc2, &word2);

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	if (word1 != word2) {

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		res.start = (word1 << 16) | 0x0000;

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		res.end   = (word2 << 16) | 0xffff;

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		res.flags = IORESOURCE_MEM;

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		update_res(info, res.start, res.end, res.flags, 0);

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	}

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	/* read the prefetchable memory window */

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	pci_read_config_word(dev, 0xc4, &word1);

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	pci_read_config_word(dev, 0xc6, &word2);

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	if (word1 != word2) {

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		res.start = (word1 << 16) | 0x0000;

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		res.end   = (word2 << 16) | 0xffff;

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		res.flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;

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		update_res(info, res.start, res.end, res.flags, 0);

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	}

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	/* read the IO port window */

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	pci_read_config_word(dev, 0xd0, &word1);

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	pci_read_config_word(dev, 0xd2, &word2);

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	if (word1 != word2) {

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		res.start = word1;

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		res.end   = word2;

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		res.flags = IORESOURCE_IO;

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		update_res(info, res.start, res.end, res.flags, 0);

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	}

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	/* print information about this host bridge */

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	res.start = fbus;

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	res.end   = lbus;

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	res.flags = IORESOURCE_BUS;

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	dev_info(&dev->dev, "CNB20LE PCI Host Bridge (domain %04x %pR)\n",

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			    pci_domain_nr(dev->bus), &res);

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	for (i = 0; i < info->res_num; i++)

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		dev_info(&dev->dev, "host bridge window %pR\n", &info->res[i]);

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}

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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_LE,

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			cnb20le_res);

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