Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/arch/x86/pci/visws.c
10820 views
1
/*

2
 *	Low-Level PCI Support for SGI Visual Workstation

3
 *

4
 *	(c) 1999--2000 Martin Mares <[email protected]>

5
 */

6


7
#include <linux/kernel.h>

8
#include <linux/pci.h>

9
#include <linux/init.h>

10


11
#include <asm/setup.h>

12
#include <asm/pci_x86.h>

13
#include <asm/visws/cobalt.h>

14
#include <asm/visws/lithium.h>

15


16
static int pci_visws_enable_irq(struct pci_dev *dev) { return 0; }

17
static void pci_visws_disable_irq(struct pci_dev *dev) { }

18


19
/* int (*pcibios_enable_irq)(struct pci_dev *dev) = &pci_visws_enable_irq; */

20
/* void (*pcibios_disable_irq)(struct pci_dev *dev) = &pci_visws_disable_irq; */

21


22
/* void __init pcibios_penalize_isa_irq(int irq, int active) {} */

23


24


25
unsigned int pci_bus0, pci_bus1;

26


27
static int __init visws_map_irq(struct pci_dev *dev, u8 slot, u8 pin)

28
{

29
	int irq, bus = dev->bus->number;

30


31
	pin--;

32


33
	/* Nothing useful at PIIX4 pin 1 */

34
	if (bus == pci_bus0 && slot == 4 && pin == 0)

35
		return -1;

36


37
	/* PIIX4 USB is on Bus 0, Slot 4, Line 3 */

38
	if (bus == pci_bus0 && slot == 4 && pin == 3) {

39
		irq = CO_IRQ(CO_APIC_PIIX4_USB);

40
		goto out;

41
	}

42


43
	/* First pin spread down 1 APIC entry per slot */

44
	if (pin == 0) {

45
		irq = CO_IRQ((bus == pci_bus0 ? CO_APIC_PCIB_BASE0 :

46
						CO_APIC_PCIA_BASE0) + slot);

47
		goto out;

48
	}

49


50
	/* lines 1,2,3 from any slot is shared in this twirly pattern */

51
	if (bus == pci_bus1) {

52
		/* lines 1-3 from devices 0 1 rotate over 2 apic entries */

53
		irq = CO_IRQ(CO_APIC_PCIA_BASE123 + ((slot + (pin - 1)) % 2));

54
	} else { /* bus == pci_bus0 */

55
		/* lines 1-3 from devices 0-3 rotate over 3 apic entries */

56
		if (slot == 0)

57
			slot = 3; /* same pattern */

58
		irq = CO_IRQ(CO_APIC_PCIA_BASE123 + ((3 - slot) + (pin - 1) % 3));

59
	}

60
out:

61
	printk(KERN_DEBUG "PCI: Bus %d Slot %d Line %d -> IRQ %d\n", bus, slot, pin, irq);

62
	return irq;

63
}

64


65
void __init pcibios_update_irq(struct pci_dev *dev, int irq)

66
{

67
	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);

68
}

69


70
int __init pci_visws_init(void)

71
{

72
	pcibios_enable_irq = &pci_visws_enable_irq;

73
	pcibios_disable_irq = &pci_visws_disable_irq;

74


75
	/* The VISWS supports configuration access type 1 only */

76
	pci_probe = (pci_probe | PCI_PROBE_CONF1) &

77
		    ~(PCI_PROBE_BIOS | PCI_PROBE_CONF2);

78


79
	pci_bus0 = li_pcib_read16(LI_PCI_BUSNUM) & 0xff;

80
	pci_bus1 = li_pcia_read16(LI_PCI_BUSNUM) & 0xff;

81


82
	printk(KERN_INFO "PCI: Lithium bridge A bus: %u, "

83
		"bridge B (PIIX4) bus: %u\n", pci_bus1, pci_bus0);

84


85
	raw_pci_ops = &pci_direct_conf1;

86
	pci_scan_bus_with_sysdata(pci_bus0);

87
	pci_scan_bus_with_sysdata(pci_bus1);

88
	pci_fixup_irqs(pci_common_swizzle, visws_map_irq);

89
	pcibios_resource_survey();

90
	/* Request bus scan */

91
	return 1;

92
}

93


94