/*1* Copyright © 1997-2003 by The XFree86 Project, Inc.2* Copyright © 2007 Dave Airlie3* Copyright © 2007-2008 Intel Corporation4* Jesse Barnes <[email protected]>5* Copyright 2005-2006 Luc Verhaegen6* Copyright (c) 2001, Andy Ritger [email protected]7*8* Permission is hereby granted, free of charge, to any person obtaining a9* copy of this software and associated documentation files (the "Software"),10* to deal in the Software without restriction, including without limitation11* the rights to use, copy, modify, merge, publish, distribute, sublicense,12* and/or sell copies of the Software, and to permit persons to whom the13* Software is furnished to do so, subject to the following conditions:14*15* The above copyright notice and this permission notice shall be included in16* all copies or substantial portions of the Software.17*18* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR19* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,20* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL21* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR22* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,23* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR24* OTHER DEALINGS IN THE SOFTWARE.25*26* Except as contained in this notice, the name of the copyright holder(s)27* and author(s) shall not be used in advertising or otherwise to promote28* the sale, use or other dealings in this Software without prior written29* authorization from the copyright holder(s) and author(s).30*/3132#include <linux/list.h>33#include <linux/list_sort.h>34#include "drmP.h"35#include "drm.h"36#include "drm_crtc.h"3738/**39* drm_mode_debug_printmodeline - debug print a mode40* @dev: DRM device41* @mode: mode to print42*43* LOCKING:44* None.45*46* Describe @mode using DRM_DEBUG.47*/48void drm_mode_debug_printmodeline(struct drm_display_mode *mode)49{50DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "51"0x%x 0x%x\n",52mode->base.id, mode->name, mode->vrefresh, mode->clock,53mode->hdisplay, mode->hsync_start,54mode->hsync_end, mode->htotal,55mode->vdisplay, mode->vsync_start,56mode->vsync_end, mode->vtotal, mode->type, mode->flags);57}58EXPORT_SYMBOL(drm_mode_debug_printmodeline);5960/**61* drm_cvt_mode -create a modeline based on CVT algorithm62* @dev: DRM device63* @hdisplay: hdisplay size64* @vdisplay: vdisplay size65* @vrefresh : vrefresh rate66* @reduced : Whether the GTF calculation is simplified67* @interlaced:Whether the interlace is supported68*69* LOCKING:70* none.71*72* return the modeline based on CVT algorithm73*74* This function is called to generate the modeline based on CVT algorithm75* according to the hdisplay, vdisplay, vrefresh.76* It is based from the VESA(TM) Coordinated Video Timing Generator by77* Graham Loveridge April 9, 2003 available at78* http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls79*80* And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.81* What I have done is to translate it by using integer calculation.82*/83#define HV_FACTOR 100084struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,85int vdisplay, int vrefresh,86bool reduced, bool interlaced, bool margins)87{88/* 1) top/bottom margin size (% of height) - default: 1.8, */89#define CVT_MARGIN_PERCENTAGE 1890/* 2) character cell horizontal granularity (pixels) - default 8 */91#define CVT_H_GRANULARITY 892/* 3) Minimum vertical porch (lines) - default 3 */93#define CVT_MIN_V_PORCH 394/* 4) Minimum number of vertical back porch lines - default 6 */95#define CVT_MIN_V_BPORCH 696/* Pixel Clock step (kHz) */97#define CVT_CLOCK_STEP 25098struct drm_display_mode *drm_mode;99unsigned int vfieldrate, hperiod;100int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;101int interlace;102103/* allocate the drm_display_mode structure. If failure, we will104* return directly105*/106drm_mode = drm_mode_create(dev);107if (!drm_mode)108return NULL;109110/* the CVT default refresh rate is 60Hz */111if (!vrefresh)112vrefresh = 60;113114/* the required field fresh rate */115if (interlaced)116vfieldrate = vrefresh * 2;117else118vfieldrate = vrefresh;119120/* horizontal pixels */121hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);122123/* determine the left&right borders */124hmargin = 0;125if (margins) {126hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;127hmargin -= hmargin % CVT_H_GRANULARITY;128}129/* find the total active pixels */130drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;131132/* find the number of lines per field */133if (interlaced)134vdisplay_rnd = vdisplay / 2;135else136vdisplay_rnd = vdisplay;137138/* find the top & bottom borders */139vmargin = 0;140if (margins)141vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;142143drm_mode->vdisplay = vdisplay + 2 * vmargin;144145/* Interlaced */146if (interlaced)147interlace = 1;148else149interlace = 0;150151/* Determine VSync Width from aspect ratio */152if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))153vsync = 4;154else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))155vsync = 5;156else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))157vsync = 6;158else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))159vsync = 7;160else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))161vsync = 7;162else /* custom */163vsync = 10;164165if (!reduced) {166/* simplify the GTF calculation */167/* 4) Minimum time of vertical sync + back porch interval (µs)168* default 550.0169*/170int tmp1, tmp2;171#define CVT_MIN_VSYNC_BP 550172/* 3) Nominal HSync width (% of line period) - default 8 */173#define CVT_HSYNC_PERCENTAGE 8174unsigned int hblank_percentage;175int vsyncandback_porch, vback_porch, hblank;176177/* estimated the horizontal period */178tmp1 = HV_FACTOR * 1000000 -179CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;180tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +181interlace;182hperiod = tmp1 * 2 / (tmp2 * vfieldrate);183184tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;185/* 9. Find number of lines in sync + backporch */186if (tmp1 < (vsync + CVT_MIN_V_PORCH))187vsyncandback_porch = vsync + CVT_MIN_V_PORCH;188else189vsyncandback_porch = tmp1;190/* 10. Find number of lines in back porch */191vback_porch = vsyncandback_porch - vsync;192drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +193vsyncandback_porch + CVT_MIN_V_PORCH;194/* 5) Definition of Horizontal blanking time limitation */195/* Gradient (%/kHz) - default 600 */196#define CVT_M_FACTOR 600197/* Offset (%) - default 40 */198#define CVT_C_FACTOR 40199/* Blanking time scaling factor - default 128 */200#define CVT_K_FACTOR 128201/* Scaling factor weighting - default 20 */202#define CVT_J_FACTOR 20203#define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)204#define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \205CVT_J_FACTOR)206/* 12. Find ideal blanking duty cycle from formula */207hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *208hperiod / 1000;209/* 13. Blanking time */210if (hblank_percentage < 20 * HV_FACTOR)211hblank_percentage = 20 * HV_FACTOR;212hblank = drm_mode->hdisplay * hblank_percentage /213(100 * HV_FACTOR - hblank_percentage);214hblank -= hblank % (2 * CVT_H_GRANULARITY);215/* 14. find the total pixes per line */216drm_mode->htotal = drm_mode->hdisplay + hblank;217drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;218drm_mode->hsync_start = drm_mode->hsync_end -219(drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;220drm_mode->hsync_start += CVT_H_GRANULARITY -221drm_mode->hsync_start % CVT_H_GRANULARITY;222/* fill the Vsync values */223drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;224drm_mode->vsync_end = drm_mode->vsync_start + vsync;225} else {226/* Reduced blanking */227/* Minimum vertical blanking interval time (µs)- default 460 */228#define CVT_RB_MIN_VBLANK 460229/* Fixed number of clocks for horizontal sync */230#define CVT_RB_H_SYNC 32231/* Fixed number of clocks for horizontal blanking */232#define CVT_RB_H_BLANK 160233/* Fixed number of lines for vertical front porch - default 3*/234#define CVT_RB_VFPORCH 3235int vbilines;236int tmp1, tmp2;237/* 8. Estimate Horizontal period. */238tmp1 = HV_FACTOR * 1000000 -239CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;240tmp2 = vdisplay_rnd + 2 * vmargin;241hperiod = tmp1 / (tmp2 * vfieldrate);242/* 9. Find number of lines in vertical blanking */243vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;244/* 10. Check if vertical blanking is sufficient */245if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))246vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;247/* 11. Find total number of lines in vertical field */248drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;249/* 12. Find total number of pixels in a line */250drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;251/* Fill in HSync values */252drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;253drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;254/* Fill in VSync values */255drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;256drm_mode->vsync_end = drm_mode->vsync_start + vsync;257}258/* 15/13. Find pixel clock frequency (kHz for xf86) */259drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;260drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;261/* 18/16. Find actual vertical frame frequency */262/* ignore - just set the mode flag for interlaced */263if (interlaced) {264drm_mode->vtotal *= 2;265drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;266}267/* Fill the mode line name */268drm_mode_set_name(drm_mode);269if (reduced)270drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |271DRM_MODE_FLAG_NVSYNC);272else273drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |274DRM_MODE_FLAG_NHSYNC);275276return drm_mode;277}278EXPORT_SYMBOL(drm_cvt_mode);279280/**281* drm_gtf_mode_complex - create the modeline based on full GTF algorithm282*283* @dev :drm device284* @hdisplay :hdisplay size285* @vdisplay :vdisplay size286* @vrefresh :vrefresh rate.287* @interlaced :whether the interlace is supported288* @margins :desired margin size289* @GTF_[MCKJ] :extended GTF formula parameters290*291* LOCKING.292* none.293*294* return the modeline based on full GTF algorithm.295*296* GTF feature blocks specify C and J in multiples of 0.5, so we pass them297* in here multiplied by two. For a C of 40, pass in 80.298*/299struct drm_display_mode *300drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,301int vrefresh, bool interlaced, int margins,302int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)303{ /* 1) top/bottom margin size (% of height) - default: 1.8, */304#define GTF_MARGIN_PERCENTAGE 18305/* 2) character cell horizontal granularity (pixels) - default 8 */306#define GTF_CELL_GRAN 8307/* 3) Minimum vertical porch (lines) - default 3 */308#define GTF_MIN_V_PORCH 1309/* width of vsync in lines */310#define V_SYNC_RQD 3311/* width of hsync as % of total line */312#define H_SYNC_PERCENT 8313/* min time of vsync + back porch (microsec) */314#define MIN_VSYNC_PLUS_BP 550315/* C' and M' are part of the Blanking Duty Cycle computation */316#define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)317#define GTF_M_PRIME (GTF_K * GTF_M / 256)318struct drm_display_mode *drm_mode;319unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;320int top_margin, bottom_margin;321int interlace;322unsigned int hfreq_est;323int vsync_plus_bp, vback_porch;324unsigned int vtotal_lines, vfieldrate_est, hperiod;325unsigned int vfield_rate, vframe_rate;326int left_margin, right_margin;327unsigned int total_active_pixels, ideal_duty_cycle;328unsigned int hblank, total_pixels, pixel_freq;329int hsync, hfront_porch, vodd_front_porch_lines;330unsigned int tmp1, tmp2;331332drm_mode = drm_mode_create(dev);333if (!drm_mode)334return NULL;335336/* 1. In order to give correct results, the number of horizontal337* pixels requested is first processed to ensure that it is divisible338* by the character size, by rounding it to the nearest character339* cell boundary:340*/341hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;342hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;343344/* 2. If interlace is requested, the number of vertical lines assumed345* by the calculation must be halved, as the computation calculates346* the number of vertical lines per field.347*/348if (interlaced)349vdisplay_rnd = vdisplay / 2;350else351vdisplay_rnd = vdisplay;352353/* 3. Find the frame rate required: */354if (interlaced)355vfieldrate_rqd = vrefresh * 2;356else357vfieldrate_rqd = vrefresh;358359/* 4. Find number of lines in Top margin: */360top_margin = 0;361if (margins)362top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /3631000;364/* 5. Find number of lines in bottom margin: */365bottom_margin = top_margin;366367/* 6. If interlace is required, then set variable interlace: */368if (interlaced)369interlace = 1;370else371interlace = 0;372373/* 7. Estimate the Horizontal frequency */374{375tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;376tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *3772 + interlace;378hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;379}380381/* 8. Find the number of lines in V sync + back porch */382/* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */383vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;384vsync_plus_bp = (vsync_plus_bp + 500) / 1000;385/* 9. Find the number of lines in V back porch alone: */386vback_porch = vsync_plus_bp - V_SYNC_RQD;387/* 10. Find the total number of lines in Vertical field period: */388vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +389vsync_plus_bp + GTF_MIN_V_PORCH;390/* 11. Estimate the Vertical field frequency: */391vfieldrate_est = hfreq_est / vtotal_lines;392/* 12. Find the actual horizontal period: */393hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);394395/* 13. Find the actual Vertical field frequency: */396vfield_rate = hfreq_est / vtotal_lines;397/* 14. Find the Vertical frame frequency: */398if (interlaced)399vframe_rate = vfield_rate / 2;400else401vframe_rate = vfield_rate;402/* 15. Find number of pixels in left margin: */403if (margins)404left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /4051000;406else407left_margin = 0;408409/* 16.Find number of pixels in right margin: */410right_margin = left_margin;411/* 17.Find total number of active pixels in image and left and right */412total_active_pixels = hdisplay_rnd + left_margin + right_margin;413/* 18.Find the ideal blanking duty cycle from blanking duty cycle */414ideal_duty_cycle = GTF_C_PRIME * 1000 -415(GTF_M_PRIME * 1000000 / hfreq_est);416/* 19.Find the number of pixels in the blanking time to the nearest417* double character cell: */418hblank = total_active_pixels * ideal_duty_cycle /419(100000 - ideal_duty_cycle);420hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);421hblank = hblank * 2 * GTF_CELL_GRAN;422/* 20.Find total number of pixels: */423total_pixels = total_active_pixels + hblank;424/* 21.Find pixel clock frequency: */425pixel_freq = total_pixels * hfreq_est / 1000;426/* Stage 1 computations are now complete; I should really pass427* the results to another function and do the Stage 2 computations,428* but I only need a few more values so I'll just append the429* computations here for now */430/* 17. Find the number of pixels in the horizontal sync period: */431hsync = H_SYNC_PERCENT * total_pixels / 100;432hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;433hsync = hsync * GTF_CELL_GRAN;434/* 18. Find the number of pixels in horizontal front porch period */435hfront_porch = hblank / 2 - hsync;436/* 36. Find the number of lines in the odd front porch period: */437vodd_front_porch_lines = GTF_MIN_V_PORCH ;438439/* finally, pack the results in the mode struct */440drm_mode->hdisplay = hdisplay_rnd;441drm_mode->hsync_start = hdisplay_rnd + hfront_porch;442drm_mode->hsync_end = drm_mode->hsync_start + hsync;443drm_mode->htotal = total_pixels;444drm_mode->vdisplay = vdisplay_rnd;445drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;446drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;447drm_mode->vtotal = vtotal_lines;448449drm_mode->clock = pixel_freq;450451if (interlaced) {452drm_mode->vtotal *= 2;453drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;454}455456drm_mode_set_name(drm_mode);457if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)458drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;459else460drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;461462return drm_mode;463}464EXPORT_SYMBOL(drm_gtf_mode_complex);465466/**467* drm_gtf_mode - create the modeline based on GTF algorithm468*469* @dev :drm device470* @hdisplay :hdisplay size471* @vdisplay :vdisplay size472* @vrefresh :vrefresh rate.473* @interlaced :whether the interlace is supported474* @margins :whether the margin is supported475*476* LOCKING.477* none.478*479* return the modeline based on GTF algorithm480*481* This function is to create the modeline based on the GTF algorithm.482* Generalized Timing Formula is derived from:483* GTF Spreadsheet by Andy Morrish (1/5/97)484* available at http://www.vesa.org485*486* And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.487* What I have done is to translate it by using integer calculation.488* I also refer to the function of fb_get_mode in the file of489* drivers/video/fbmon.c490*491* Standard GTF parameters:492* M = 600493* C = 40494* K = 128495* J = 20496*/497struct drm_display_mode *498drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,499bool lace, int margins)500{501return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace,502margins, 600, 40 * 2, 128, 20 * 2);503}504EXPORT_SYMBOL(drm_gtf_mode);505506/**507* drm_mode_set_name - set the name on a mode508* @mode: name will be set in this mode509*510* LOCKING:511* None.512*513* Set the name of @mode to a standard format.514*/515void drm_mode_set_name(struct drm_display_mode *mode)516{517bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);518519snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",520mode->hdisplay, mode->vdisplay,521interlaced ? "i" : "");522}523EXPORT_SYMBOL(drm_mode_set_name);524525/**526* drm_mode_list_concat - move modes from one list to another527* @head: source list528* @new: dst list529*530* LOCKING:531* Caller must ensure both lists are locked.532*533* Move all the modes from @head to @new.534*/535void drm_mode_list_concat(struct list_head *head, struct list_head *new)536{537538struct list_head *entry, *tmp;539540list_for_each_safe(entry, tmp, head) {541list_move_tail(entry, new);542}543}544EXPORT_SYMBOL(drm_mode_list_concat);545546/**547* drm_mode_width - get the width of a mode548* @mode: mode549*550* LOCKING:551* None.552*553* Return @mode's width (hdisplay) value.554*555* FIXME: is this needed?556*557* RETURNS:558* @mode->hdisplay559*/560int drm_mode_width(struct drm_display_mode *mode)561{562return mode->hdisplay;563564}565EXPORT_SYMBOL(drm_mode_width);566567/**568* drm_mode_height - get the height of a mode569* @mode: mode570*571* LOCKING:572* None.573*574* Return @mode's height (vdisplay) value.575*576* FIXME: is this needed?577*578* RETURNS:579* @mode->vdisplay580*/581int drm_mode_height(struct drm_display_mode *mode)582{583return mode->vdisplay;584}585EXPORT_SYMBOL(drm_mode_height);586587/** drm_mode_hsync - get the hsync of a mode588* @mode: mode589*590* LOCKING:591* None.592*593* Return @modes's hsync rate in kHz, rounded to the nearest int.594*/595int drm_mode_hsync(const struct drm_display_mode *mode)596{597unsigned int calc_val;598599if (mode->hsync)600return mode->hsync;601602if (mode->htotal < 0)603return 0;604605calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */606calc_val += 500; /* round to 1000Hz */607calc_val /= 1000; /* truncate to kHz */608609return calc_val;610}611EXPORT_SYMBOL(drm_mode_hsync);612613/**614* drm_mode_vrefresh - get the vrefresh of a mode615* @mode: mode616*617* LOCKING:618* None.619*620* Return @mode's vrefresh rate in Hz or calculate it if necessary.621*622* FIXME: why is this needed? shouldn't vrefresh be set already?623*624* RETURNS:625* Vertical refresh rate. It will be the result of actual value plus 0.5.626* If it is 70.288, it will return 70Hz.627* If it is 59.6, it will return 60Hz.628*/629int drm_mode_vrefresh(const struct drm_display_mode *mode)630{631int refresh = 0;632unsigned int calc_val;633634if (mode->vrefresh > 0)635refresh = mode->vrefresh;636else if (mode->htotal > 0 && mode->vtotal > 0) {637int vtotal;638vtotal = mode->vtotal;639/* work out vrefresh the value will be x1000 */640calc_val = (mode->clock * 1000);641calc_val /= mode->htotal;642refresh = (calc_val + vtotal / 2) / vtotal;643644if (mode->flags & DRM_MODE_FLAG_INTERLACE)645refresh *= 2;646if (mode->flags & DRM_MODE_FLAG_DBLSCAN)647refresh /= 2;648if (mode->vscan > 1)649refresh /= mode->vscan;650}651return refresh;652}653EXPORT_SYMBOL(drm_mode_vrefresh);654655/**656* drm_mode_set_crtcinfo - set CRTC modesetting parameters657* @p: mode658* @adjust_flags: unused? (FIXME)659*660* LOCKING:661* None.662*663* Setup the CRTC modesetting parameters for @p, adjusting if necessary.664*/665void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)666{667if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))668return;669670p->crtc_hdisplay = p->hdisplay;671p->crtc_hsync_start = p->hsync_start;672p->crtc_hsync_end = p->hsync_end;673p->crtc_htotal = p->htotal;674p->crtc_hskew = p->hskew;675p->crtc_vdisplay = p->vdisplay;676p->crtc_vsync_start = p->vsync_start;677p->crtc_vsync_end = p->vsync_end;678p->crtc_vtotal = p->vtotal;679680if (p->flags & DRM_MODE_FLAG_INTERLACE) {681if (adjust_flags & CRTC_INTERLACE_HALVE_V) {682p->crtc_vdisplay /= 2;683p->crtc_vsync_start /= 2;684p->crtc_vsync_end /= 2;685p->crtc_vtotal /= 2;686}687688p->crtc_vtotal |= 1;689}690691if (p->flags & DRM_MODE_FLAG_DBLSCAN) {692p->crtc_vdisplay *= 2;693p->crtc_vsync_start *= 2;694p->crtc_vsync_end *= 2;695p->crtc_vtotal *= 2;696}697698if (p->vscan > 1) {699p->crtc_vdisplay *= p->vscan;700p->crtc_vsync_start *= p->vscan;701p->crtc_vsync_end *= p->vscan;702p->crtc_vtotal *= p->vscan;703}704705p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);706p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);707p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);708p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);709710p->crtc_hadjusted = false;711p->crtc_vadjusted = false;712}713EXPORT_SYMBOL(drm_mode_set_crtcinfo);714715716/**717* drm_mode_duplicate - allocate and duplicate an existing mode718* @m: mode to duplicate719*720* LOCKING:721* None.722*723* Just allocate a new mode, copy the existing mode into it, and return724* a pointer to it. Used to create new instances of established modes.725*/726struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,727const struct drm_display_mode *mode)728{729struct drm_display_mode *nmode;730int new_id;731732nmode = drm_mode_create(dev);733if (!nmode)734return NULL;735736new_id = nmode->base.id;737*nmode = *mode;738nmode->base.id = new_id;739INIT_LIST_HEAD(&nmode->head);740return nmode;741}742EXPORT_SYMBOL(drm_mode_duplicate);743744/**745* drm_mode_equal - test modes for equality746* @mode1: first mode747* @mode2: second mode748*749* LOCKING:750* None.751*752* Check to see if @mode1 and @mode2 are equivalent.753*754* RETURNS:755* True if the modes are equal, false otherwise.756*/757bool drm_mode_equal(struct drm_display_mode *mode1, struct drm_display_mode *mode2)758{759/* do clock check convert to PICOS so fb modes get matched760* the same */761if (mode1->clock && mode2->clock) {762if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))763return false;764} else if (mode1->clock != mode2->clock)765return false;766767if (mode1->hdisplay == mode2->hdisplay &&768mode1->hsync_start == mode2->hsync_start &&769mode1->hsync_end == mode2->hsync_end &&770mode1->htotal == mode2->htotal &&771mode1->hskew == mode2->hskew &&772mode1->vdisplay == mode2->vdisplay &&773mode1->vsync_start == mode2->vsync_start &&774mode1->vsync_end == mode2->vsync_end &&775mode1->vtotal == mode2->vtotal &&776mode1->vscan == mode2->vscan &&777mode1->flags == mode2->flags)778return true;779780return false;781}782EXPORT_SYMBOL(drm_mode_equal);783784/**785* drm_mode_validate_size - make sure modes adhere to size constraints786* @dev: DRM device787* @mode_list: list of modes to check788* @maxX: maximum width789* @maxY: maximum height790* @maxPitch: max pitch791*792* LOCKING:793* Caller must hold a lock protecting @mode_list.794*795* The DRM device (@dev) has size and pitch limits. Here we validate the796* modes we probed for @dev against those limits and set their status as797* necessary.798*/799void drm_mode_validate_size(struct drm_device *dev,800struct list_head *mode_list,801int maxX, int maxY, int maxPitch)802{803struct drm_display_mode *mode;804805list_for_each_entry(mode, mode_list, head) {806if (maxPitch > 0 && mode->hdisplay > maxPitch)807mode->status = MODE_BAD_WIDTH;808809if (maxX > 0 && mode->hdisplay > maxX)810mode->status = MODE_VIRTUAL_X;811812if (maxY > 0 && mode->vdisplay > maxY)813mode->status = MODE_VIRTUAL_Y;814}815}816EXPORT_SYMBOL(drm_mode_validate_size);817818/**819* drm_mode_validate_clocks - validate modes against clock limits820* @dev: DRM device821* @mode_list: list of modes to check822* @min: minimum clock rate array823* @max: maximum clock rate array824* @n_ranges: number of clock ranges (size of arrays)825*826* LOCKING:827* Caller must hold a lock protecting @mode_list.828*829* Some code may need to check a mode list against the clock limits of the830* device in question. This function walks the mode list, testing to make831* sure each mode falls within a given range (defined by @min and @max832* arrays) and sets @mode->status as needed.833*/834void drm_mode_validate_clocks(struct drm_device *dev,835struct list_head *mode_list,836int *min, int *max, int n_ranges)837{838struct drm_display_mode *mode;839int i;840841list_for_each_entry(mode, mode_list, head) {842bool good = false;843for (i = 0; i < n_ranges; i++) {844if (mode->clock >= min[i] && mode->clock <= max[i]) {845good = true;846break;847}848}849if (!good)850mode->status = MODE_CLOCK_RANGE;851}852}853EXPORT_SYMBOL(drm_mode_validate_clocks);854855/**856* drm_mode_prune_invalid - remove invalid modes from mode list857* @dev: DRM device858* @mode_list: list of modes to check859* @verbose: be verbose about it860*861* LOCKING:862* Caller must hold a lock protecting @mode_list.863*864* Once mode list generation is complete, a caller can use this routine to865* remove invalid modes from a mode list. If any of the modes have a866* status other than %MODE_OK, they are removed from @mode_list and freed.867*/868void drm_mode_prune_invalid(struct drm_device *dev,869struct list_head *mode_list, bool verbose)870{871struct drm_display_mode *mode, *t;872873list_for_each_entry_safe(mode, t, mode_list, head) {874if (mode->status != MODE_OK) {875list_del(&mode->head);876if (verbose) {877drm_mode_debug_printmodeline(mode);878DRM_DEBUG_KMS("Not using %s mode %d\n",879mode->name, mode->status);880}881drm_mode_destroy(dev, mode);882}883}884}885EXPORT_SYMBOL(drm_mode_prune_invalid);886887/**888* drm_mode_compare - compare modes for favorability889* @priv: unused890* @lh_a: list_head for first mode891* @lh_b: list_head for second mode892*893* LOCKING:894* None.895*896* Compare two modes, given by @lh_a and @lh_b, returning a value indicating897* which is better.898*899* RETURNS:900* Negative if @lh_a is better than @lh_b, zero if they're equivalent, or901* positive if @lh_b is better than @lh_a.902*/903static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)904{905struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);906struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);907int diff;908909diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -910((a->type & DRM_MODE_TYPE_PREFERRED) != 0);911if (diff)912return diff;913diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;914if (diff)915return diff;916diff = b->clock - a->clock;917return diff;918}919920/**921* drm_mode_sort - sort mode list922* @mode_list: list to sort923*924* LOCKING:925* Caller must hold a lock protecting @mode_list.926*927* Sort @mode_list by favorability, putting good modes first.928*/929void drm_mode_sort(struct list_head *mode_list)930{931list_sort(NULL, mode_list, drm_mode_compare);932}933EXPORT_SYMBOL(drm_mode_sort);934935/**936* drm_mode_connector_list_update - update the mode list for the connector937* @connector: the connector to update938*939* LOCKING:940* Caller must hold a lock protecting @mode_list.941*942* This moves the modes from the @connector probed_modes list943* to the actual mode list. It compares the probed mode against the current944* list and only adds different modes. All modes unverified after this point945* will be removed by the prune invalid modes.946*/947void drm_mode_connector_list_update(struct drm_connector *connector)948{949struct drm_display_mode *mode;950struct drm_display_mode *pmode, *pt;951int found_it;952953list_for_each_entry_safe(pmode, pt, &connector->probed_modes,954head) {955found_it = 0;956/* go through current modes checking for the new probed mode */957list_for_each_entry(mode, &connector->modes, head) {958if (drm_mode_equal(pmode, mode)) {959found_it = 1;960/* if equal delete the probed mode */961mode->status = pmode->status;962/* Merge type bits together */963mode->type |= pmode->type;964list_del(&pmode->head);965drm_mode_destroy(connector->dev, pmode);966break;967}968}969970if (!found_it) {971list_move_tail(&pmode->head, &connector->modes);972}973}974}975EXPORT_SYMBOL(drm_mode_connector_list_update);976977/**978* drm_mode_parse_command_line_for_connector - parse command line for connector979* @mode_option - per connector mode option980* @connector - connector to parse line for981*982* This parses the connector specific then generic command lines for983* modes and options to configure the connector.984*985* This uses the same parameters as the fb modedb.c, except for extra986* <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]987*988* enable/enable Digital/disable bit at the end989*/990bool drm_mode_parse_command_line_for_connector(const char *mode_option,991struct drm_connector *connector,992struct drm_cmdline_mode *mode)993{994const char *name;995unsigned int namelen;996int res_specified = 0, bpp_specified = 0, refresh_specified = 0;997unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;998int yres_specified = 0, cvt = 0, rb = 0, interlace = 0, margins = 0;999int i;1000enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;10011002#ifdef CONFIG_FB1003if (!mode_option)1004mode_option = fb_mode_option;1005#endif10061007if (!mode_option) {1008mode->specified = false;1009return false;1010}10111012name = mode_option;1013namelen = strlen(name);1014for (i = namelen-1; i >= 0; i--) {1015switch (name[i]) {1016case '@':1017namelen = i;1018if (!refresh_specified && !bpp_specified &&1019!yres_specified) {1020refresh = simple_strtol(&name[i+1], NULL, 10);1021refresh_specified = 1;1022if (cvt || rb)1023cvt = 0;1024} else1025goto done;1026break;1027case '-':1028namelen = i;1029if (!bpp_specified && !yres_specified) {1030bpp = simple_strtol(&name[i+1], NULL, 10);1031bpp_specified = 1;1032if (cvt || rb)1033cvt = 0;1034} else1035goto done;1036break;1037case 'x':1038if (!yres_specified) {1039yres = simple_strtol(&name[i+1], NULL, 10);1040yres_specified = 1;1041} else1042goto done;1043case '0' ... '9':1044break;1045case 'M':1046if (!yres_specified)1047cvt = 1;1048break;1049case 'R':1050if (cvt)1051rb = 1;1052break;1053case 'm':1054if (!cvt)1055margins = 1;1056break;1057case 'i':1058if (!cvt)1059interlace = 1;1060break;1061case 'e':1062force = DRM_FORCE_ON;1063break;1064case 'D':1065if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&1066(connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))1067force = DRM_FORCE_ON;1068else1069force = DRM_FORCE_ON_DIGITAL;1070break;1071case 'd':1072force = DRM_FORCE_OFF;1073break;1074default:1075goto done;1076}1077}1078if (i < 0 && yres_specified) {1079xres = simple_strtol(name, NULL, 10);1080res_specified = 1;1081}1082done:1083if (res_specified) {1084mode->specified = true;1085mode->xres = xres;1086mode->yres = yres;1087}10881089if (refresh_specified) {1090mode->refresh_specified = true;1091mode->refresh = refresh;1092}10931094if (bpp_specified) {1095mode->bpp_specified = true;1096mode->bpp = bpp;1097}1098mode->rb = rb ? true : false;1099mode->cvt = cvt ? true : false;1100mode->interlace = interlace ? true : false;1101mode->force = force;11021103return true;1104}1105EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);11061107struct drm_display_mode *1108drm_mode_create_from_cmdline_mode(struct drm_device *dev,1109struct drm_cmdline_mode *cmd)1110{1111struct drm_display_mode *mode;11121113if (cmd->cvt)1114mode = drm_cvt_mode(dev,1115cmd->xres, cmd->yres,1116cmd->refresh_specified ? cmd->refresh : 60,1117cmd->rb, cmd->interlace,1118cmd->margins);1119else1120mode = drm_gtf_mode(dev,1121cmd->xres, cmd->yres,1122cmd->refresh_specified ? cmd->refresh : 60,1123cmd->interlace,1124cmd->margins);1125if (!mode)1126return NULL;11271128drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);1129return mode;1130}1131EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);113211331134