Path: blob/master/drivers/i2c/busses/i2c-amd8111.c
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/*1* SMBus 2.0 driver for AMD-8111 IO-Hub.2*3* Copyright (c) 2002 Vojtech Pavlik4*5* This program is free software; you can redistribute it and/or modify6* it under the terms of the GNU General Public License as published by7* the Free Software Foundation version 2.8*/910#include <linux/module.h>11#include <linux/pci.h>12#include <linux/kernel.h>13#include <linux/stddef.h>14#include <linux/ioport.h>15#include <linux/init.h>16#include <linux/i2c.h>17#include <linux/delay.h>18#include <linux/acpi.h>19#include <linux/slab.h>20#include <linux/io.h>2122MODULE_LICENSE("GPL");23MODULE_AUTHOR ("Vojtech Pavlik <[email protected]>");24MODULE_DESCRIPTION("AMD8111 SMBus 2.0 driver");2526struct amd_smbus {27struct pci_dev *dev;28struct i2c_adapter adapter;29int base;30int size;31};3233static struct pci_driver amd8111_driver;3435/*36* AMD PCI control registers definitions.37*/3839#define AMD_PCI_MISC 0x484041#define AMD_PCI_MISC_SCI 0x04 /* deliver SCI */42#define AMD_PCI_MISC_INT 0x02 /* deliver PCI IRQ */43#define AMD_PCI_MISC_SPEEDUP 0x01 /* 16x clock speedup */4445/*46* ACPI 2.0 chapter 13 PCI interface definitions.47*/4849#define AMD_EC_DATA 0x00 /* data register */50#define AMD_EC_SC 0x04 /* status of controller */51#define AMD_EC_CMD 0x04 /* command register */52#define AMD_EC_ICR 0x08 /* interrupt control register */5354#define AMD_EC_SC_SMI 0x04 /* smi event pending */55#define AMD_EC_SC_SCI 0x02 /* sci event pending */56#define AMD_EC_SC_BURST 0x01 /* burst mode enabled */57#define AMD_EC_SC_CMD 0x08 /* byte in data reg is command */58#define AMD_EC_SC_IBF 0x02 /* data ready for embedded controller */59#define AMD_EC_SC_OBF 0x01 /* data ready for host */6061#define AMD_EC_CMD_RD 0x80 /* read EC */62#define AMD_EC_CMD_WR 0x81 /* write EC */63#define AMD_EC_CMD_BE 0x82 /* enable burst mode */64#define AMD_EC_CMD_BD 0x83 /* disable burst mode */65#define AMD_EC_CMD_QR 0x84 /* query EC */6667/*68* ACPI 2.0 chapter 13 access of registers of the EC69*/7071static int amd_ec_wait_write(struct amd_smbus *smbus)72{73int timeout = 500;7475while ((inb(smbus->base + AMD_EC_SC) & AMD_EC_SC_IBF) && --timeout)76udelay(1);7778if (!timeout) {79dev_warn(&smbus->dev->dev,80"Timeout while waiting for IBF to clear\n");81return -ETIMEDOUT;82}8384return 0;85}8687static int amd_ec_wait_read(struct amd_smbus *smbus)88{89int timeout = 500;9091while ((~inb(smbus->base + AMD_EC_SC) & AMD_EC_SC_OBF) && --timeout)92udelay(1);9394if (!timeout) {95dev_warn(&smbus->dev->dev,96"Timeout while waiting for OBF to set\n");97return -ETIMEDOUT;98}99100return 0;101}102103static int amd_ec_read(struct amd_smbus *smbus, unsigned char address,104unsigned char *data)105{106int status;107108status = amd_ec_wait_write(smbus);109if (status)110return status;111outb(AMD_EC_CMD_RD, smbus->base + AMD_EC_CMD);112113status = amd_ec_wait_write(smbus);114if (status)115return status;116outb(address, smbus->base + AMD_EC_DATA);117118status = amd_ec_wait_read(smbus);119if (status)120return status;121*data = inb(smbus->base + AMD_EC_DATA);122123return 0;124}125126static int amd_ec_write(struct amd_smbus *smbus, unsigned char address,127unsigned char data)128{129int status;130131status = amd_ec_wait_write(smbus);132if (status)133return status;134outb(AMD_EC_CMD_WR, smbus->base + AMD_EC_CMD);135136status = amd_ec_wait_write(smbus);137if (status)138return status;139outb(address, smbus->base + AMD_EC_DATA);140141status = amd_ec_wait_write(smbus);142if (status)143return status;144outb(data, smbus->base + AMD_EC_DATA);145146return 0;147}148149/*150* ACPI 2.0 chapter 13 SMBus 2.0 EC register model151*/152153#define AMD_SMB_PRTCL 0x00 /* protocol, PEC */154#define AMD_SMB_STS 0x01 /* status */155#define AMD_SMB_ADDR 0x02 /* address */156#define AMD_SMB_CMD 0x03 /* command */157#define AMD_SMB_DATA 0x04 /* 32 data registers */158#define AMD_SMB_BCNT 0x24 /* number of data bytes */159#define AMD_SMB_ALRM_A 0x25 /* alarm address */160#define AMD_SMB_ALRM_D 0x26 /* 2 bytes alarm data */161162#define AMD_SMB_STS_DONE 0x80163#define AMD_SMB_STS_ALRM 0x40164#define AMD_SMB_STS_RES 0x20165#define AMD_SMB_STS_STATUS 0x1f166167#define AMD_SMB_STATUS_OK 0x00168#define AMD_SMB_STATUS_FAIL 0x07169#define AMD_SMB_STATUS_DNAK 0x10170#define AMD_SMB_STATUS_DERR 0x11171#define AMD_SMB_STATUS_CMD_DENY 0x12172#define AMD_SMB_STATUS_UNKNOWN 0x13173#define AMD_SMB_STATUS_ACC_DENY 0x17174#define AMD_SMB_STATUS_TIMEOUT 0x18175#define AMD_SMB_STATUS_NOTSUP 0x19176#define AMD_SMB_STATUS_BUSY 0x1A177#define AMD_SMB_STATUS_PEC 0x1F178179#define AMD_SMB_PRTCL_WRITE 0x00180#define AMD_SMB_PRTCL_READ 0x01181#define AMD_SMB_PRTCL_QUICK 0x02182#define AMD_SMB_PRTCL_BYTE 0x04183#define AMD_SMB_PRTCL_BYTE_DATA 0x06184#define AMD_SMB_PRTCL_WORD_DATA 0x08185#define AMD_SMB_PRTCL_BLOCK_DATA 0x0a186#define AMD_SMB_PRTCL_PROC_CALL 0x0c187#define AMD_SMB_PRTCL_BLOCK_PROC_CALL 0x0d188#define AMD_SMB_PRTCL_I2C_BLOCK_DATA 0x4a189#define AMD_SMB_PRTCL_PEC 0x80190191192static s32 amd8111_access(struct i2c_adapter * adap, u16 addr,193unsigned short flags, char read_write, u8 command, int size,194union i2c_smbus_data * data)195{196struct amd_smbus *smbus = adap->algo_data;197unsigned char protocol, len, pec, temp[2];198int i, status;199200protocol = (read_write == I2C_SMBUS_READ) ? AMD_SMB_PRTCL_READ201: AMD_SMB_PRTCL_WRITE;202pec = (flags & I2C_CLIENT_PEC) ? AMD_SMB_PRTCL_PEC : 0;203204switch (size) {205case I2C_SMBUS_QUICK:206protocol |= AMD_SMB_PRTCL_QUICK;207read_write = I2C_SMBUS_WRITE;208break;209210case I2C_SMBUS_BYTE:211if (read_write == I2C_SMBUS_WRITE) {212status = amd_ec_write(smbus, AMD_SMB_CMD,213command);214if (status)215return status;216}217protocol |= AMD_SMB_PRTCL_BYTE;218break;219220case I2C_SMBUS_BYTE_DATA:221status = amd_ec_write(smbus, AMD_SMB_CMD, command);222if (status)223return status;224if (read_write == I2C_SMBUS_WRITE) {225status = amd_ec_write(smbus, AMD_SMB_DATA,226data->byte);227if (status)228return status;229}230protocol |= AMD_SMB_PRTCL_BYTE_DATA;231break;232233case I2C_SMBUS_WORD_DATA:234status = amd_ec_write(smbus, AMD_SMB_CMD, command);235if (status)236return status;237if (read_write == I2C_SMBUS_WRITE) {238status = amd_ec_write(smbus, AMD_SMB_DATA,239data->word & 0xff);240if (status)241return status;242status = amd_ec_write(smbus, AMD_SMB_DATA + 1,243data->word >> 8);244if (status)245return status;246}247protocol |= AMD_SMB_PRTCL_WORD_DATA | pec;248break;249250case I2C_SMBUS_BLOCK_DATA:251status = amd_ec_write(smbus, AMD_SMB_CMD, command);252if (status)253return status;254if (read_write == I2C_SMBUS_WRITE) {255len = min_t(u8, data->block[0],256I2C_SMBUS_BLOCK_MAX);257status = amd_ec_write(smbus, AMD_SMB_BCNT, len);258if (status)259return status;260for (i = 0; i < len; i++) {261status =262amd_ec_write(smbus, AMD_SMB_DATA + i,263data->block[i + 1]);264if (status)265return status;266}267}268protocol |= AMD_SMB_PRTCL_BLOCK_DATA | pec;269break;270271case I2C_SMBUS_I2C_BLOCK_DATA:272len = min_t(u8, data->block[0],273I2C_SMBUS_BLOCK_MAX);274status = amd_ec_write(smbus, AMD_SMB_CMD, command);275if (status)276return status;277status = amd_ec_write(smbus, AMD_SMB_BCNT, len);278if (status)279return status;280if (read_write == I2C_SMBUS_WRITE)281for (i = 0; i < len; i++) {282status =283amd_ec_write(smbus, AMD_SMB_DATA + i,284data->block[i + 1]);285if (status)286return status;287}288protocol |= AMD_SMB_PRTCL_I2C_BLOCK_DATA;289break;290291case I2C_SMBUS_PROC_CALL:292status = amd_ec_write(smbus, AMD_SMB_CMD, command);293if (status)294return status;295status = amd_ec_write(smbus, AMD_SMB_DATA,296data->word & 0xff);297if (status)298return status;299status = amd_ec_write(smbus, AMD_SMB_DATA + 1,300data->word >> 8);301if (status)302return status;303protocol = AMD_SMB_PRTCL_PROC_CALL | pec;304read_write = I2C_SMBUS_READ;305break;306307case I2C_SMBUS_BLOCK_PROC_CALL:308len = min_t(u8, data->block[0],309I2C_SMBUS_BLOCK_MAX - 1);310status = amd_ec_write(smbus, AMD_SMB_CMD, command);311if (status)312return status;313status = amd_ec_write(smbus, AMD_SMB_BCNT, len);314if (status)315return status;316for (i = 0; i < len; i++) {317status = amd_ec_write(smbus, AMD_SMB_DATA + i,318data->block[i + 1]);319if (status)320return status;321}322protocol = AMD_SMB_PRTCL_BLOCK_PROC_CALL | pec;323read_write = I2C_SMBUS_READ;324break;325326default:327dev_warn(&adap->dev, "Unsupported transaction %d\n", size);328return -EOPNOTSUPP;329}330331status = amd_ec_write(smbus, AMD_SMB_ADDR, addr << 1);332if (status)333return status;334status = amd_ec_write(smbus, AMD_SMB_PRTCL, protocol);335if (status)336return status;337338status = amd_ec_read(smbus, AMD_SMB_STS, temp + 0);339if (status)340return status;341342if (~temp[0] & AMD_SMB_STS_DONE) {343udelay(500);344status = amd_ec_read(smbus, AMD_SMB_STS, temp + 0);345if (status)346return status;347}348349if (~temp[0] & AMD_SMB_STS_DONE) {350msleep(1);351status = amd_ec_read(smbus, AMD_SMB_STS, temp + 0);352if (status)353return status;354}355356if ((~temp[0] & AMD_SMB_STS_DONE) || (temp[0] & AMD_SMB_STS_STATUS))357return -EIO;358359if (read_write == I2C_SMBUS_WRITE)360return 0;361362switch (size) {363case I2C_SMBUS_BYTE:364case I2C_SMBUS_BYTE_DATA:365status = amd_ec_read(smbus, AMD_SMB_DATA, &data->byte);366if (status)367return status;368break;369370case I2C_SMBUS_WORD_DATA:371case I2C_SMBUS_PROC_CALL:372status = amd_ec_read(smbus, AMD_SMB_DATA, temp + 0);373if (status)374return status;375status = amd_ec_read(smbus, AMD_SMB_DATA + 1, temp + 1);376if (status)377return status;378data->word = (temp[1] << 8) | temp[0];379break;380381case I2C_SMBUS_BLOCK_DATA:382case I2C_SMBUS_BLOCK_PROC_CALL:383status = amd_ec_read(smbus, AMD_SMB_BCNT, &len);384if (status)385return status;386len = min_t(u8, len, I2C_SMBUS_BLOCK_MAX);387case I2C_SMBUS_I2C_BLOCK_DATA:388for (i = 0; i < len; i++) {389status = amd_ec_read(smbus, AMD_SMB_DATA + i,390data->block + i + 1);391if (status)392return status;393}394data->block[0] = len;395break;396}397398return 0;399}400401402static u32 amd8111_func(struct i2c_adapter *adapter)403{404return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |405I2C_FUNC_SMBUS_BYTE_DATA |406I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_BLOCK_DATA |407I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_BLOCK_PROC_CALL |408I2C_FUNC_SMBUS_I2C_BLOCK | I2C_FUNC_SMBUS_PEC;409}410411static const struct i2c_algorithm smbus_algorithm = {412.smbus_xfer = amd8111_access,413.functionality = amd8111_func,414};415416417static const struct pci_device_id amd8111_ids[] = {418{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS2) },419{ 0, }420};421422MODULE_DEVICE_TABLE (pci, amd8111_ids);423424static int __devinit amd8111_probe(struct pci_dev *dev,425const struct pci_device_id *id)426{427struct amd_smbus *smbus;428int error;429430if (!(pci_resource_flags(dev, 0) & IORESOURCE_IO))431return -ENODEV;432433smbus = kzalloc(sizeof(struct amd_smbus), GFP_KERNEL);434if (!smbus)435return -ENOMEM;436437smbus->dev = dev;438smbus->base = pci_resource_start(dev, 0);439smbus->size = pci_resource_len(dev, 0);440441error = acpi_check_resource_conflict(&dev->resource[0]);442if (error) {443error = -ENODEV;444goto out_kfree;445}446447if (!request_region(smbus->base, smbus->size, amd8111_driver.name)) {448error = -EBUSY;449goto out_kfree;450}451452smbus->adapter.owner = THIS_MODULE;453snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),454"SMBus2 AMD8111 adapter at %04x", smbus->base);455smbus->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;456smbus->adapter.algo = &smbus_algorithm;457smbus->adapter.algo_data = smbus;458459/* set up the sysfs linkage to our parent device */460smbus->adapter.dev.parent = &dev->dev;461462pci_write_config_dword(smbus->dev, AMD_PCI_MISC, 0);463error = i2c_add_adapter(&smbus->adapter);464if (error)465goto out_release_region;466467pci_set_drvdata(dev, smbus);468return 0;469470out_release_region:471release_region(smbus->base, smbus->size);472out_kfree:473kfree(smbus);474return error;475}476477static void __devexit amd8111_remove(struct pci_dev *dev)478{479struct amd_smbus *smbus = pci_get_drvdata(dev);480481i2c_del_adapter(&smbus->adapter);482release_region(smbus->base, smbus->size);483kfree(smbus);484}485486static struct pci_driver amd8111_driver = {487.name = "amd8111_smbus2",488.id_table = amd8111_ids,489.probe = amd8111_probe,490.remove = __devexit_p(amd8111_remove),491};492493static int __init i2c_amd8111_init(void)494{495return pci_register_driver(&amd8111_driver);496}497498static void __exit i2c_amd8111_exit(void)499{500pci_unregister_driver(&amd8111_driver);501}502503module_init(i2c_amd8111_init);504module_exit(i2c_amd8111_exit);505506507