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awilliam
GitHub Repository: awilliam/linux-vfio
Path: blob/master/drivers/i2c/busses/i2c-amd8111.c
15111 views
1
/*
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* SMBus 2.0 driver for AMD-8111 IO-Hub.
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*
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* Copyright (c) 2002 Vojtech Pavlik
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation version 2.
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/stddef.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/i2c.h>
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#include <linux/delay.h>
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#include <linux/acpi.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR ("Vojtech Pavlik <[email protected]>");
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MODULE_DESCRIPTION("AMD8111 SMBus 2.0 driver");
26
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struct amd_smbus {
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struct pci_dev *dev;
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struct i2c_adapter adapter;
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int base;
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int size;
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};
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static struct pci_driver amd8111_driver;
35
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/*
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* AMD PCI control registers definitions.
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*/
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#define AMD_PCI_MISC 0x48
41
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#define AMD_PCI_MISC_SCI 0x04 /* deliver SCI */
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#define AMD_PCI_MISC_INT 0x02 /* deliver PCI IRQ */
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#define AMD_PCI_MISC_SPEEDUP 0x01 /* 16x clock speedup */
45
46
/*
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* ACPI 2.0 chapter 13 PCI interface definitions.
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*/
49
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#define AMD_EC_DATA 0x00 /* data register */
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#define AMD_EC_SC 0x04 /* status of controller */
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#define AMD_EC_CMD 0x04 /* command register */
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#define AMD_EC_ICR 0x08 /* interrupt control register */
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#define AMD_EC_SC_SMI 0x04 /* smi event pending */
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#define AMD_EC_SC_SCI 0x02 /* sci event pending */
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#define AMD_EC_SC_BURST 0x01 /* burst mode enabled */
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#define AMD_EC_SC_CMD 0x08 /* byte in data reg is command */
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#define AMD_EC_SC_IBF 0x02 /* data ready for embedded controller */
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#define AMD_EC_SC_OBF 0x01 /* data ready for host */
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#define AMD_EC_CMD_RD 0x80 /* read EC */
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#define AMD_EC_CMD_WR 0x81 /* write EC */
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#define AMD_EC_CMD_BE 0x82 /* enable burst mode */
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#define AMD_EC_CMD_BD 0x83 /* disable burst mode */
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#define AMD_EC_CMD_QR 0x84 /* query EC */
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/*
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* ACPI 2.0 chapter 13 access of registers of the EC
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*/
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static int amd_ec_wait_write(struct amd_smbus *smbus)
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{
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int timeout = 500;
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while ((inb(smbus->base + AMD_EC_SC) & AMD_EC_SC_IBF) && --timeout)
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udelay(1);
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if (!timeout) {
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dev_warn(&smbus->dev->dev,
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"Timeout while waiting for IBF to clear\n");
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return -ETIMEDOUT;
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}
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return 0;
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}
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static int amd_ec_wait_read(struct amd_smbus *smbus)
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{
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int timeout = 500;
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while ((~inb(smbus->base + AMD_EC_SC) & AMD_EC_SC_OBF) && --timeout)
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udelay(1);
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if (!timeout) {
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dev_warn(&smbus->dev->dev,
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"Timeout while waiting for OBF to set\n");
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return -ETIMEDOUT;
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}
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return 0;
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}
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static int amd_ec_read(struct amd_smbus *smbus, unsigned char address,
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unsigned char *data)
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{
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int status;
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status = amd_ec_wait_write(smbus);
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if (status)
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return status;
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outb(AMD_EC_CMD_RD, smbus->base + AMD_EC_CMD);
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status = amd_ec_wait_write(smbus);
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if (status)
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return status;
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outb(address, smbus->base + AMD_EC_DATA);
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status = amd_ec_wait_read(smbus);
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if (status)
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return status;
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*data = inb(smbus->base + AMD_EC_DATA);
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return 0;
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}
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static int amd_ec_write(struct amd_smbus *smbus, unsigned char address,
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unsigned char data)
129
{
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int status;
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status = amd_ec_wait_write(smbus);
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if (status)
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return status;
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outb(AMD_EC_CMD_WR, smbus->base + AMD_EC_CMD);
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status = amd_ec_wait_write(smbus);
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if (status)
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return status;
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outb(address, smbus->base + AMD_EC_DATA);
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status = amd_ec_wait_write(smbus);
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if (status)
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return status;
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outb(data, smbus->base + AMD_EC_DATA);
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return 0;
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}
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/*
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* ACPI 2.0 chapter 13 SMBus 2.0 EC register model
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*/
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#define AMD_SMB_PRTCL 0x00 /* protocol, PEC */
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#define AMD_SMB_STS 0x01 /* status */
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#define AMD_SMB_ADDR 0x02 /* address */
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#define AMD_SMB_CMD 0x03 /* command */
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#define AMD_SMB_DATA 0x04 /* 32 data registers */
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#define AMD_SMB_BCNT 0x24 /* number of data bytes */
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#define AMD_SMB_ALRM_A 0x25 /* alarm address */
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#define AMD_SMB_ALRM_D 0x26 /* 2 bytes alarm data */
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#define AMD_SMB_STS_DONE 0x80
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#define AMD_SMB_STS_ALRM 0x40
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#define AMD_SMB_STS_RES 0x20
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#define AMD_SMB_STS_STATUS 0x1f
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#define AMD_SMB_STATUS_OK 0x00
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#define AMD_SMB_STATUS_FAIL 0x07
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#define AMD_SMB_STATUS_DNAK 0x10
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#define AMD_SMB_STATUS_DERR 0x11
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#define AMD_SMB_STATUS_CMD_DENY 0x12
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#define AMD_SMB_STATUS_UNKNOWN 0x13
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#define AMD_SMB_STATUS_ACC_DENY 0x17
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#define AMD_SMB_STATUS_TIMEOUT 0x18
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#define AMD_SMB_STATUS_NOTSUP 0x19
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#define AMD_SMB_STATUS_BUSY 0x1A
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#define AMD_SMB_STATUS_PEC 0x1F
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#define AMD_SMB_PRTCL_WRITE 0x00
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#define AMD_SMB_PRTCL_READ 0x01
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#define AMD_SMB_PRTCL_QUICK 0x02
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#define AMD_SMB_PRTCL_BYTE 0x04
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#define AMD_SMB_PRTCL_BYTE_DATA 0x06
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#define AMD_SMB_PRTCL_WORD_DATA 0x08
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#define AMD_SMB_PRTCL_BLOCK_DATA 0x0a
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#define AMD_SMB_PRTCL_PROC_CALL 0x0c
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#define AMD_SMB_PRTCL_BLOCK_PROC_CALL 0x0d
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#define AMD_SMB_PRTCL_I2C_BLOCK_DATA 0x4a
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#define AMD_SMB_PRTCL_PEC 0x80
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192
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static s32 amd8111_access(struct i2c_adapter * adap, u16 addr,
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unsigned short flags, char read_write, u8 command, int size,
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union i2c_smbus_data * data)
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{
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struct amd_smbus *smbus = adap->algo_data;
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unsigned char protocol, len, pec, temp[2];
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int i, status;
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201
protocol = (read_write == I2C_SMBUS_READ) ? AMD_SMB_PRTCL_READ
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: AMD_SMB_PRTCL_WRITE;
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pec = (flags & I2C_CLIENT_PEC) ? AMD_SMB_PRTCL_PEC : 0;
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switch (size) {
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case I2C_SMBUS_QUICK:
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protocol |= AMD_SMB_PRTCL_QUICK;
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read_write = I2C_SMBUS_WRITE;
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break;
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case I2C_SMBUS_BYTE:
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if (read_write == I2C_SMBUS_WRITE) {
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status = amd_ec_write(smbus, AMD_SMB_CMD,
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command);
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if (status)
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return status;
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}
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protocol |= AMD_SMB_PRTCL_BYTE;
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break;
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case I2C_SMBUS_BYTE_DATA:
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status = amd_ec_write(smbus, AMD_SMB_CMD, command);
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if (status)
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return status;
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if (read_write == I2C_SMBUS_WRITE) {
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status = amd_ec_write(smbus, AMD_SMB_DATA,
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data->byte);
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if (status)
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return status;
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}
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protocol |= AMD_SMB_PRTCL_BYTE_DATA;
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break;
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case I2C_SMBUS_WORD_DATA:
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status = amd_ec_write(smbus, AMD_SMB_CMD, command);
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if (status)
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return status;
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if (read_write == I2C_SMBUS_WRITE) {
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status = amd_ec_write(smbus, AMD_SMB_DATA,
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data->word & 0xff);
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if (status)
242
return status;
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status = amd_ec_write(smbus, AMD_SMB_DATA + 1,
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data->word >> 8);
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if (status)
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return status;
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}
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protocol |= AMD_SMB_PRTCL_WORD_DATA | pec;
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break;
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case I2C_SMBUS_BLOCK_DATA:
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status = amd_ec_write(smbus, AMD_SMB_CMD, command);
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if (status)
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return status;
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if (read_write == I2C_SMBUS_WRITE) {
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len = min_t(u8, data->block[0],
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I2C_SMBUS_BLOCK_MAX);
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status = amd_ec_write(smbus, AMD_SMB_BCNT, len);
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if (status)
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return status;
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for (i = 0; i < len; i++) {
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status =
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amd_ec_write(smbus, AMD_SMB_DATA + i,
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data->block[i + 1]);
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if (status)
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return status;
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}
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}
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protocol |= AMD_SMB_PRTCL_BLOCK_DATA | pec;
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break;
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case I2C_SMBUS_I2C_BLOCK_DATA:
273
len = min_t(u8, data->block[0],
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I2C_SMBUS_BLOCK_MAX);
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status = amd_ec_write(smbus, AMD_SMB_CMD, command);
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if (status)
277
return status;
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status = amd_ec_write(smbus, AMD_SMB_BCNT, len);
279
if (status)
280
return status;
281
if (read_write == I2C_SMBUS_WRITE)
282
for (i = 0; i < len; i++) {
283
status =
284
amd_ec_write(smbus, AMD_SMB_DATA + i,
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data->block[i + 1]);
286
if (status)
287
return status;
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}
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protocol |= AMD_SMB_PRTCL_I2C_BLOCK_DATA;
290
break;
291
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case I2C_SMBUS_PROC_CALL:
293
status = amd_ec_write(smbus, AMD_SMB_CMD, command);
294
if (status)
295
return status;
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status = amd_ec_write(smbus, AMD_SMB_DATA,
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data->word & 0xff);
298
if (status)
299
return status;
300
status = amd_ec_write(smbus, AMD_SMB_DATA + 1,
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data->word >> 8);
302
if (status)
303
return status;
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protocol = AMD_SMB_PRTCL_PROC_CALL | pec;
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read_write = I2C_SMBUS_READ;
306
break;
307
308
case I2C_SMBUS_BLOCK_PROC_CALL:
309
len = min_t(u8, data->block[0],
310
I2C_SMBUS_BLOCK_MAX - 1);
311
status = amd_ec_write(smbus, AMD_SMB_CMD, command);
312
if (status)
313
return status;
314
status = amd_ec_write(smbus, AMD_SMB_BCNT, len);
315
if (status)
316
return status;
317
for (i = 0; i < len; i++) {
318
status = amd_ec_write(smbus, AMD_SMB_DATA + i,
319
data->block[i + 1]);
320
if (status)
321
return status;
322
}
323
protocol = AMD_SMB_PRTCL_BLOCK_PROC_CALL | pec;
324
read_write = I2C_SMBUS_READ;
325
break;
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327
default:
328
dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
329
return -EOPNOTSUPP;
330
}
331
332
status = amd_ec_write(smbus, AMD_SMB_ADDR, addr << 1);
333
if (status)
334
return status;
335
status = amd_ec_write(smbus, AMD_SMB_PRTCL, protocol);
336
if (status)
337
return status;
338
339
status = amd_ec_read(smbus, AMD_SMB_STS, temp + 0);
340
if (status)
341
return status;
342
343
if (~temp[0] & AMD_SMB_STS_DONE) {
344
udelay(500);
345
status = amd_ec_read(smbus, AMD_SMB_STS, temp + 0);
346
if (status)
347
return status;
348
}
349
350
if (~temp[0] & AMD_SMB_STS_DONE) {
351
msleep(1);
352
status = amd_ec_read(smbus, AMD_SMB_STS, temp + 0);
353
if (status)
354
return status;
355
}
356
357
if ((~temp[0] & AMD_SMB_STS_DONE) || (temp[0] & AMD_SMB_STS_STATUS))
358
return -EIO;
359
360
if (read_write == I2C_SMBUS_WRITE)
361
return 0;
362
363
switch (size) {
364
case I2C_SMBUS_BYTE:
365
case I2C_SMBUS_BYTE_DATA:
366
status = amd_ec_read(smbus, AMD_SMB_DATA, &data->byte);
367
if (status)
368
return status;
369
break;
370
371
case I2C_SMBUS_WORD_DATA:
372
case I2C_SMBUS_PROC_CALL:
373
status = amd_ec_read(smbus, AMD_SMB_DATA, temp + 0);
374
if (status)
375
return status;
376
status = amd_ec_read(smbus, AMD_SMB_DATA + 1, temp + 1);
377
if (status)
378
return status;
379
data->word = (temp[1] << 8) | temp[0];
380
break;
381
382
case I2C_SMBUS_BLOCK_DATA:
383
case I2C_SMBUS_BLOCK_PROC_CALL:
384
status = amd_ec_read(smbus, AMD_SMB_BCNT, &len);
385
if (status)
386
return status;
387
len = min_t(u8, len, I2C_SMBUS_BLOCK_MAX);
388
case I2C_SMBUS_I2C_BLOCK_DATA:
389
for (i = 0; i < len; i++) {
390
status = amd_ec_read(smbus, AMD_SMB_DATA + i,
391
data->block + i + 1);
392
if (status)
393
return status;
394
}
395
data->block[0] = len;
396
break;
397
}
398
399
return 0;
400
}
401
402
403
static u32 amd8111_func(struct i2c_adapter *adapter)
404
{
405
return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
406
I2C_FUNC_SMBUS_BYTE_DATA |
407
I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_BLOCK_DATA |
408
I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
409
I2C_FUNC_SMBUS_I2C_BLOCK | I2C_FUNC_SMBUS_PEC;
410
}
411
412
static const struct i2c_algorithm smbus_algorithm = {
413
.smbus_xfer = amd8111_access,
414
.functionality = amd8111_func,
415
};
416
417
418
static const struct pci_device_id amd8111_ids[] = {
419
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS2) },
420
{ 0, }
421
};
422
423
MODULE_DEVICE_TABLE (pci, amd8111_ids);
424
425
static int __devinit amd8111_probe(struct pci_dev *dev,
426
const struct pci_device_id *id)
427
{
428
struct amd_smbus *smbus;
429
int error;
430
431
if (!(pci_resource_flags(dev, 0) & IORESOURCE_IO))
432
return -ENODEV;
433
434
smbus = kzalloc(sizeof(struct amd_smbus), GFP_KERNEL);
435
if (!smbus)
436
return -ENOMEM;
437
438
smbus->dev = dev;
439
smbus->base = pci_resource_start(dev, 0);
440
smbus->size = pci_resource_len(dev, 0);
441
442
error = acpi_check_resource_conflict(&dev->resource[0]);
443
if (error) {
444
error = -ENODEV;
445
goto out_kfree;
446
}
447
448
if (!request_region(smbus->base, smbus->size, amd8111_driver.name)) {
449
error = -EBUSY;
450
goto out_kfree;
451
}
452
453
smbus->adapter.owner = THIS_MODULE;
454
snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
455
"SMBus2 AMD8111 adapter at %04x", smbus->base);
456
smbus->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
457
smbus->adapter.algo = &smbus_algorithm;
458
smbus->adapter.algo_data = smbus;
459
460
/* set up the sysfs linkage to our parent device */
461
smbus->adapter.dev.parent = &dev->dev;
462
463
pci_write_config_dword(smbus->dev, AMD_PCI_MISC, 0);
464
error = i2c_add_adapter(&smbus->adapter);
465
if (error)
466
goto out_release_region;
467
468
pci_set_drvdata(dev, smbus);
469
return 0;
470
471
out_release_region:
472
release_region(smbus->base, smbus->size);
473
out_kfree:
474
kfree(smbus);
475
return error;
476
}
477
478
static void __devexit amd8111_remove(struct pci_dev *dev)
479
{
480
struct amd_smbus *smbus = pci_get_drvdata(dev);
481
482
i2c_del_adapter(&smbus->adapter);
483
release_region(smbus->base, smbus->size);
484
kfree(smbus);
485
}
486
487
static struct pci_driver amd8111_driver = {
488
.name = "amd8111_smbus2",
489
.id_table = amd8111_ids,
490
.probe = amd8111_probe,
491
.remove = __devexit_p(amd8111_remove),
492
};
493
494
static int __init i2c_amd8111_init(void)
495
{
496
return pci_register_driver(&amd8111_driver);
497
}
498
499
static void __exit i2c_amd8111_exit(void)
500
{
501
pci_unregister_driver(&amd8111_driver);
502
}
503
504
module_init(i2c_amd8111_init);
505
module_exit(i2c_amd8111_exit);
506
507