Path: blob/master/drivers/infiniband/hw/cxgb3/iwch_mem.c
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/*1* Copyright (c) 2006 Chelsio, Inc. All rights reserved.2*3* This software is available to you under a choice of one of two4* licenses. You may choose to be licensed under the terms of the GNU5* General Public License (GPL) Version 2, available from the file6* COPYING in the main directory of this source tree, or the7* OpenIB.org BSD license below:8*9* Redistribution and use in source and binary forms, with or10* without modification, are permitted provided that the following11* conditions are met:12*13* - Redistributions of source code must retain the above14* copyright notice, this list of conditions and the following15* disclaimer.16*17* - Redistributions in binary form must reproduce the above18* copyright notice, this list of conditions and the following19* disclaimer in the documentation and/or other materials20* provided with the distribution.21*22* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,23* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF24* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND25* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS26* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN27* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN28* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE29* SOFTWARE.30*/31#include <linux/slab.h>32#include <asm/byteorder.h>3334#include <rdma/iw_cm.h>35#include <rdma/ib_verbs.h>3637#include "cxio_hal.h"38#include "cxio_resource.h"39#include "iwch.h"40#include "iwch_provider.h"4142static int iwch_finish_mem_reg(struct iwch_mr *mhp, u32 stag)43{44u32 mmid;4546mhp->attr.state = 1;47mhp->attr.stag = stag;48mmid = stag >> 8;49mhp->ibmr.rkey = mhp->ibmr.lkey = stag;50PDBG("%s mmid 0x%x mhp %p\n", __func__, mmid, mhp);51return insert_handle(mhp->rhp, &mhp->rhp->mmidr, mhp, mmid);52}5354int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php,55struct iwch_mr *mhp, int shift)56{57u32 stag;58int ret;5960if (cxio_register_phys_mem(&rhp->rdev,61&stag, mhp->attr.pdid,62mhp->attr.perms,63mhp->attr.zbva,64mhp->attr.va_fbo,65mhp->attr.len,66shift - 12,67mhp->attr.pbl_size, mhp->attr.pbl_addr))68return -ENOMEM;6970ret = iwch_finish_mem_reg(mhp, stag);71if (ret)72cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size,73mhp->attr.pbl_addr);74return ret;75}7677int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php,78struct iwch_mr *mhp,79int shift,80int npages)81{82u32 stag;83int ret;8485/* We could support this... */86if (npages > mhp->attr.pbl_size)87return -ENOMEM;8889stag = mhp->attr.stag;90if (cxio_reregister_phys_mem(&rhp->rdev,91&stag, mhp->attr.pdid,92mhp->attr.perms,93mhp->attr.zbva,94mhp->attr.va_fbo,95mhp->attr.len,96shift - 12,97mhp->attr.pbl_size, mhp->attr.pbl_addr))98return -ENOMEM;99100ret = iwch_finish_mem_reg(mhp, stag);101if (ret)102cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size,103mhp->attr.pbl_addr);104105return ret;106}107108int iwch_alloc_pbl(struct iwch_mr *mhp, int npages)109{110mhp->attr.pbl_addr = cxio_hal_pblpool_alloc(&mhp->rhp->rdev,111npages << 3);112113if (!mhp->attr.pbl_addr)114return -ENOMEM;115116mhp->attr.pbl_size = npages;117118return 0;119}120121void iwch_free_pbl(struct iwch_mr *mhp)122{123cxio_hal_pblpool_free(&mhp->rhp->rdev, mhp->attr.pbl_addr,124mhp->attr.pbl_size << 3);125}126127int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset)128{129return cxio_write_pbl(&mhp->rhp->rdev, pages,130mhp->attr.pbl_addr + (offset << 3), npages);131}132133int build_phys_page_list(struct ib_phys_buf *buffer_list,134int num_phys_buf,135u64 *iova_start,136u64 *total_size,137int *npages,138int *shift,139__be64 **page_list)140{141u64 mask;142int i, j, n;143144mask = 0;145*total_size = 0;146for (i = 0; i < num_phys_buf; ++i) {147if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)148return -EINVAL;149if (i != 0 && i != num_phys_buf - 1 &&150(buffer_list[i].size & ~PAGE_MASK))151return -EINVAL;152*total_size += buffer_list[i].size;153if (i > 0)154mask |= buffer_list[i].addr;155else156mask |= buffer_list[i].addr & PAGE_MASK;157if (i != num_phys_buf - 1)158mask |= buffer_list[i].addr + buffer_list[i].size;159else160mask |= (buffer_list[i].addr + buffer_list[i].size +161PAGE_SIZE - 1) & PAGE_MASK;162}163164if (*total_size > 0xFFFFFFFFULL)165return -ENOMEM;166167/* Find largest page shift we can use to cover buffers */168for (*shift = PAGE_SHIFT; *shift < 27; ++(*shift))169if ((1ULL << *shift) & mask)170break;171172buffer_list[0].size += buffer_list[0].addr & ((1ULL << *shift) - 1);173buffer_list[0].addr &= ~0ull << *shift;174175*npages = 0;176for (i = 0; i < num_phys_buf; ++i)177*npages += (buffer_list[i].size +178(1ULL << *shift) - 1) >> *shift;179180if (!*npages)181return -EINVAL;182183*page_list = kmalloc(sizeof(u64) * *npages, GFP_KERNEL);184if (!*page_list)185return -ENOMEM;186187n = 0;188for (i = 0; i < num_phys_buf; ++i)189for (j = 0;190j < (buffer_list[i].size + (1ULL << *shift) - 1) >> *shift;191++j)192(*page_list)[n++] = cpu_to_be64(buffer_list[i].addr +193((u64) j << *shift));194195PDBG("%s va 0x%llx mask 0x%llx shift %d len %lld pbl_size %d\n",196__func__, (unsigned long long) *iova_start,197(unsigned long long) mask, *shift, (unsigned long long) *total_size,198*npages);199200return 0;201202}203204205