Path: blob/master/drivers/infiniband/hw/cxgb3/iwch_provider.h
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/*1* Copyright (c) 2006 Chelsio, Inc. All rights reserved.2*3* This software is available to you under a choice of one of two4* licenses. You may choose to be licensed under the terms of the GNU5* General Public License (GPL) Version 2, available from the file6* COPYING in the main directory of this source tree, or the7* OpenIB.org BSD license below:8*9* Redistribution and use in source and binary forms, with or10* without modification, are permitted provided that the following11* conditions are met:12*13* - Redistributions of source code must retain the above14* copyright notice, this list of conditions and the following15* disclaimer.16*17* - Redistributions in binary form must reproduce the above18* copyright notice, this list of conditions and the following19* disclaimer in the documentation and/or other materials20* provided with the distribution.21*22* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,23* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF24* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND25* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS26* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN27* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN28* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE29* SOFTWARE.30*/31#ifndef __IWCH_PROVIDER_H__32#define __IWCH_PROVIDER_H__3334#include <linux/list.h>35#include <linux/spinlock.h>36#include <rdma/ib_verbs.h>37#include <asm/types.h>38#include "t3cdev.h"39#include "iwch.h"40#include "cxio_wr.h"41#include "cxio_hal.h"4243struct iwch_pd {44struct ib_pd ibpd;45u32 pdid;46struct iwch_dev *rhp;47};4849static inline struct iwch_pd *to_iwch_pd(struct ib_pd *ibpd)50{51return container_of(ibpd, struct iwch_pd, ibpd);52}5354struct tpt_attributes {55u32 stag;56u32 state:1;57u32 type:2;58u32 rsvd:1;59enum tpt_mem_perm perms;60u32 remote_invaliate_disable:1;61u32 zbva:1;62u32 mw_bind_enable:1;63u32 page_size:5;6465u32 pdid;66u32 qpid;67u32 pbl_addr;68u32 len;69u64 va_fbo;70u32 pbl_size;71};7273struct iwch_mr {74struct ib_mr ibmr;75struct ib_umem *umem;76struct iwch_dev *rhp;77u64 kva;78struct tpt_attributes attr;79};8081typedef struct iwch_mw iwch_mw_handle;8283static inline struct iwch_mr *to_iwch_mr(struct ib_mr *ibmr)84{85return container_of(ibmr, struct iwch_mr, ibmr);86}8788struct iwch_mw {89struct ib_mw ibmw;90struct iwch_dev *rhp;91u64 kva;92struct tpt_attributes attr;93};9495static inline struct iwch_mw *to_iwch_mw(struct ib_mw *ibmw)96{97return container_of(ibmw, struct iwch_mw, ibmw);98}99100struct iwch_cq {101struct ib_cq ibcq;102struct iwch_dev *rhp;103struct t3_cq cq;104spinlock_t lock;105atomic_t refcnt;106wait_queue_head_t wait;107u32 __user *user_rptr_addr;108};109110static inline struct iwch_cq *to_iwch_cq(struct ib_cq *ibcq)111{112return container_of(ibcq, struct iwch_cq, ibcq);113}114115enum IWCH_QP_FLAGS {116QP_QUIESCED = 0x01117};118119struct iwch_mpa_attributes {120u8 initiator;121u8 recv_marker_enabled;122u8 xmit_marker_enabled; /* iWARP: enable inbound Read Resp. */123u8 crc_enabled;124u8 version; /* 0 or 1 */125};126127struct iwch_qp_attributes {128u32 scq;129u32 rcq;130u32 sq_num_entries;131u32 rq_num_entries;132u32 sq_max_sges;133u32 sq_max_sges_rdma_write;134u32 rq_max_sges;135u32 state;136u8 enable_rdma_read;137u8 enable_rdma_write; /* enable inbound Read Resp. */138u8 enable_bind;139u8 enable_mmid0_fastreg; /* Enable STAG0 + Fast-register */140/*141* Next QP state. If specify the current state, only the142* QP attributes will be modified.143*/144u32 max_ord;145u32 max_ird;146u32 pd; /* IN */147u32 next_state;148char terminate_buffer[52];149u32 terminate_msg_len;150u8 is_terminate_local;151struct iwch_mpa_attributes mpa_attr; /* IN-OUT */152struct iwch_ep *llp_stream_handle;153char *stream_msg_buf; /* Last stream msg. before Idle -> RTS */154u32 stream_msg_buf_len; /* Only on Idle -> RTS */155};156157struct iwch_qp {158struct ib_qp ibqp;159struct iwch_dev *rhp;160struct iwch_ep *ep;161struct iwch_qp_attributes attr;162struct t3_wq wq;163spinlock_t lock;164atomic_t refcnt;165wait_queue_head_t wait;166enum IWCH_QP_FLAGS flags;167struct timer_list timer;168};169170static inline int qp_quiesced(struct iwch_qp *qhp)171{172return qhp->flags & QP_QUIESCED;173}174175static inline struct iwch_qp *to_iwch_qp(struct ib_qp *ibqp)176{177return container_of(ibqp, struct iwch_qp, ibqp);178}179180void iwch_qp_add_ref(struct ib_qp *qp);181void iwch_qp_rem_ref(struct ib_qp *qp);182183struct iwch_ucontext {184struct ib_ucontext ibucontext;185struct cxio_ucontext uctx;186u32 key;187spinlock_t mmap_lock;188struct list_head mmaps;189};190191static inline struct iwch_ucontext *to_iwch_ucontext(struct ib_ucontext *c)192{193return container_of(c, struct iwch_ucontext, ibucontext);194}195196struct iwch_mm_entry {197struct list_head entry;198u64 addr;199u32 key;200unsigned len;201};202203static inline struct iwch_mm_entry *remove_mmap(struct iwch_ucontext *ucontext,204u32 key, unsigned len)205{206struct list_head *pos, *nxt;207struct iwch_mm_entry *mm;208209spin_lock(&ucontext->mmap_lock);210list_for_each_safe(pos, nxt, &ucontext->mmaps) {211212mm = list_entry(pos, struct iwch_mm_entry, entry);213if (mm->key == key && mm->len == len) {214list_del_init(&mm->entry);215spin_unlock(&ucontext->mmap_lock);216PDBG("%s key 0x%x addr 0x%llx len %d\n", __func__,217key, (unsigned long long) mm->addr, mm->len);218return mm;219}220}221spin_unlock(&ucontext->mmap_lock);222return NULL;223}224225static inline void insert_mmap(struct iwch_ucontext *ucontext,226struct iwch_mm_entry *mm)227{228spin_lock(&ucontext->mmap_lock);229PDBG("%s key 0x%x addr 0x%llx len %d\n", __func__,230mm->key, (unsigned long long) mm->addr, mm->len);231list_add_tail(&mm->entry, &ucontext->mmaps);232spin_unlock(&ucontext->mmap_lock);233}234235enum iwch_qp_attr_mask {236IWCH_QP_ATTR_NEXT_STATE = 1 << 0,237IWCH_QP_ATTR_ENABLE_RDMA_READ = 1 << 7,238IWCH_QP_ATTR_ENABLE_RDMA_WRITE = 1 << 8,239IWCH_QP_ATTR_ENABLE_RDMA_BIND = 1 << 9,240IWCH_QP_ATTR_MAX_ORD = 1 << 11,241IWCH_QP_ATTR_MAX_IRD = 1 << 12,242IWCH_QP_ATTR_LLP_STREAM_HANDLE = 1 << 22,243IWCH_QP_ATTR_STREAM_MSG_BUFFER = 1 << 23,244IWCH_QP_ATTR_MPA_ATTR = 1 << 24,245IWCH_QP_ATTR_QP_CONTEXT_ACTIVATE = 1 << 25,246IWCH_QP_ATTR_VALID_MODIFY = (IWCH_QP_ATTR_ENABLE_RDMA_READ |247IWCH_QP_ATTR_ENABLE_RDMA_WRITE |248IWCH_QP_ATTR_MAX_ORD |249IWCH_QP_ATTR_MAX_IRD |250IWCH_QP_ATTR_LLP_STREAM_HANDLE |251IWCH_QP_ATTR_STREAM_MSG_BUFFER |252IWCH_QP_ATTR_MPA_ATTR |253IWCH_QP_ATTR_QP_CONTEXT_ACTIVATE)254};255256int iwch_modify_qp(struct iwch_dev *rhp,257struct iwch_qp *qhp,258enum iwch_qp_attr_mask mask,259struct iwch_qp_attributes *attrs,260int internal);261262enum iwch_qp_state {263IWCH_QP_STATE_IDLE,264IWCH_QP_STATE_RTS,265IWCH_QP_STATE_ERROR,266IWCH_QP_STATE_TERMINATE,267IWCH_QP_STATE_CLOSING,268IWCH_QP_STATE_TOT269};270271static inline int iwch_convert_state(enum ib_qp_state ib_state)272{273switch (ib_state) {274case IB_QPS_RESET:275case IB_QPS_INIT:276return IWCH_QP_STATE_IDLE;277case IB_QPS_RTS:278return IWCH_QP_STATE_RTS;279case IB_QPS_SQD:280return IWCH_QP_STATE_CLOSING;281case IB_QPS_SQE:282return IWCH_QP_STATE_TERMINATE;283case IB_QPS_ERR:284return IWCH_QP_STATE_ERROR;285default:286return -1;287}288}289290static inline u32 iwch_ib_to_tpt_access(int acc)291{292return (acc & IB_ACCESS_REMOTE_WRITE ? TPT_REMOTE_WRITE : 0) |293(acc & IB_ACCESS_REMOTE_READ ? TPT_REMOTE_READ : 0) |294(acc & IB_ACCESS_LOCAL_WRITE ? TPT_LOCAL_WRITE : 0) |295(acc & IB_ACCESS_MW_BIND ? TPT_MW_BIND : 0) |296TPT_LOCAL_READ;297}298299static inline u32 iwch_ib_to_tpt_bind_access(int acc)300{301return (acc & IB_ACCESS_REMOTE_WRITE ? TPT_REMOTE_WRITE : 0) |302(acc & IB_ACCESS_REMOTE_READ ? TPT_REMOTE_READ : 0);303}304305enum iwch_mmid_state {306IWCH_STAG_STATE_VALID,307IWCH_STAG_STATE_INVALID308};309310enum iwch_qp_query_flags {311IWCH_QP_QUERY_CONTEXT_NONE = 0x0, /* No ctx; Only attrs */312IWCH_QP_QUERY_CONTEXT_GET = 0x1, /* Get ctx + attrs */313IWCH_QP_QUERY_CONTEXT_SUSPEND = 0x2, /* Not Supported */314315/*316* Quiesce QP context; Consumer317* will NOT replay outstanding WR318*/319IWCH_QP_QUERY_CONTEXT_QUIESCE = 0x4,320IWCH_QP_QUERY_CONTEXT_REMOVE = 0x8,321IWCH_QP_QUERY_TEST_USERWRITE = 0x32 /* Test special */322};323324u16 iwch_rqes_posted(struct iwch_qp *qhp);325int iwch_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,326struct ib_send_wr **bad_wr);327int iwch_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,328struct ib_recv_wr **bad_wr);329int iwch_bind_mw(struct ib_qp *qp,330struct ib_mw *mw,331struct ib_mw_bind *mw_bind);332int iwch_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);333int iwch_post_terminate(struct iwch_qp *qhp, struct respQ_msg_t *rsp_msg);334int iwch_post_zb_read(struct iwch_ep *ep);335int iwch_register_device(struct iwch_dev *dev);336void iwch_unregister_device(struct iwch_dev *dev);337void stop_read_rep_timer(struct iwch_qp *qhp);338int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php,339struct iwch_mr *mhp, int shift);340int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php,341struct iwch_mr *mhp,342int shift,343int npages);344int iwch_alloc_pbl(struct iwch_mr *mhp, int npages);345void iwch_free_pbl(struct iwch_mr *mhp);346int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset);347int build_phys_page_list(struct ib_phys_buf *buffer_list,348int num_phys_buf,349u64 *iova_start,350u64 *total_size,351int *npages,352int *shift,353__be64 **page_list);354355356#define IWCH_NODE_DESC "cxgb3 Chelsio Communications"357358#endif359360361