Path: blob/master/drivers/infiniband/hw/cxgb4/ev.c
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/*1* Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.2*3* This software is available to you under a choice of one of two4* licenses. You may choose to be licensed under the terms of the GNU5* General Public License (GPL) Version 2, available from the file6* COPYING in the main directory of this source tree, or the7* OpenIB.org BSD license below:8*9* Redistribution and use in source and binary forms, with or10* without modification, are permitted provided that the following11* conditions are met:12*13* - Redistributions of source code must retain the above14* copyright notice, this list of conditions and the following15* disclaimer.16*17* - Redistributions in binary form must reproduce the above18* copyright notice, this list of conditions and the following19* disclaimer in the documentation and/or other materials20* provided with the distribution.21*22* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,23* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF24* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND25* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS26* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN27* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN28* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE29* SOFTWARE.30*/31#include <linux/slab.h>32#include <linux/mman.h>33#include <net/sock.h>3435#include "iw_cxgb4.h"3637static void post_qp_event(struct c4iw_dev *dev, struct c4iw_cq *chp,38struct c4iw_qp *qhp,39struct t4_cqe *err_cqe,40enum ib_event_type ib_event)41{42struct ib_event event;43struct c4iw_qp_attributes attrs;4445if ((qhp->attr.state == C4IW_QP_STATE_ERROR) ||46(qhp->attr.state == C4IW_QP_STATE_TERMINATE)) {47PDBG("%s AE received after RTS - "48"qp state %d qpid 0x%x status 0x%x\n", __func__,49qhp->attr.state, qhp->wq.sq.qid, CQE_STATUS(err_cqe));50return;51}5253printk(KERN_ERR MOD "AE qpid 0x%x opcode %d status 0x%x "54"type %d wrid.hi 0x%x wrid.lo 0x%x\n",55CQE_QPID(err_cqe), CQE_OPCODE(err_cqe),56CQE_STATUS(err_cqe), CQE_TYPE(err_cqe),57CQE_WRID_HI(err_cqe), CQE_WRID_LOW(err_cqe));5859if (qhp->attr.state == C4IW_QP_STATE_RTS) {60attrs.next_state = C4IW_QP_STATE_TERMINATE;61c4iw_modify_qp(qhp->rhp, qhp, C4IW_QP_ATTR_NEXT_STATE,62&attrs, 0);63}6465event.event = ib_event;66event.device = chp->ibcq.device;67if (ib_event == IB_EVENT_CQ_ERR)68event.element.cq = &chp->ibcq;69else70event.element.qp = &qhp->ibqp;71if (qhp->ibqp.event_handler)72(*qhp->ibqp.event_handler)(&event, qhp->ibqp.qp_context);7374(*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context);75}7677void c4iw_ev_dispatch(struct c4iw_dev *dev, struct t4_cqe *err_cqe)78{79struct c4iw_cq *chp;80struct c4iw_qp *qhp;81u32 cqid;8283spin_lock(&dev->lock);84qhp = get_qhp(dev, CQE_QPID(err_cqe));85if (!qhp) {86printk(KERN_ERR MOD "BAD AE qpid 0x%x opcode %d "87"status 0x%x type %d wrid.hi 0x%x wrid.lo 0x%x\n",88CQE_QPID(err_cqe),89CQE_OPCODE(err_cqe), CQE_STATUS(err_cqe),90CQE_TYPE(err_cqe), CQE_WRID_HI(err_cqe),91CQE_WRID_LOW(err_cqe));92spin_unlock(&dev->lock);93goto out;94}9596if (SQ_TYPE(err_cqe))97cqid = qhp->attr.scq;98else99cqid = qhp->attr.rcq;100chp = get_chp(dev, cqid);101if (!chp) {102printk(KERN_ERR MOD "BAD AE cqid 0x%x qpid 0x%x opcode %d "103"status 0x%x type %d wrid.hi 0x%x wrid.lo 0x%x\n",104cqid, CQE_QPID(err_cqe),105CQE_OPCODE(err_cqe), CQE_STATUS(err_cqe),106CQE_TYPE(err_cqe), CQE_WRID_HI(err_cqe),107CQE_WRID_LOW(err_cqe));108spin_unlock(&dev->lock);109goto out;110}111112c4iw_qp_add_ref(&qhp->ibqp);113atomic_inc(&chp->refcnt);114spin_unlock(&dev->lock);115116/* Bad incoming write */117if (RQ_TYPE(err_cqe) &&118(CQE_OPCODE(err_cqe) == FW_RI_RDMA_WRITE)) {119post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_REQ_ERR);120goto done;121}122123switch (CQE_STATUS(err_cqe)) {124125/* Completion Events */126case T4_ERR_SUCCESS:127printk(KERN_ERR MOD "AE with status 0!\n");128break;129130case T4_ERR_STAG:131case T4_ERR_PDID:132case T4_ERR_QPID:133case T4_ERR_ACCESS:134case T4_ERR_WRAP:135case T4_ERR_BOUND:136case T4_ERR_INVALIDATE_SHARED_MR:137case T4_ERR_INVALIDATE_MR_WITH_MW_BOUND:138post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_ACCESS_ERR);139break;140141/* Device Fatal Errors */142case T4_ERR_ECC:143case T4_ERR_ECC_PSTAG:144case T4_ERR_INTERNAL_ERR:145post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_DEVICE_FATAL);146break;147148/* QP Fatal Errors */149case T4_ERR_OUT_OF_RQE:150case T4_ERR_PBL_ADDR_BOUND:151case T4_ERR_CRC:152case T4_ERR_MARKER:153case T4_ERR_PDU_LEN_ERR:154case T4_ERR_DDP_VERSION:155case T4_ERR_RDMA_VERSION:156case T4_ERR_OPCODE:157case T4_ERR_DDP_QUEUE_NUM:158case T4_ERR_MSN:159case T4_ERR_TBIT:160case T4_ERR_MO:161case T4_ERR_MSN_GAP:162case T4_ERR_MSN_RANGE:163case T4_ERR_RQE_ADDR_BOUND:164case T4_ERR_IRD_OVERFLOW:165post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_FATAL);166break;167168default:169printk(KERN_ERR MOD "Unknown T4 status 0x%x QPID 0x%x\n",170CQE_STATUS(err_cqe), qhp->wq.sq.qid);171post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_FATAL);172break;173}174done:175if (atomic_dec_and_test(&chp->refcnt))176wake_up(&chp->wait);177c4iw_qp_rem_ref(&qhp->ibqp);178out:179return;180}181182int c4iw_ev_handler(struct c4iw_dev *dev, u32 qid)183{184struct c4iw_cq *chp;185186chp = get_chp(dev, qid);187if (chp)188(*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context);189else190PDBG("%s unknown cqid 0x%x\n", __func__, qid);191return 0;192}193194195