Path: blob/master/drivers/input/keyboard/tegra-kbc.c
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/*1* Keyboard class input driver for the NVIDIA Tegra SoC internal matrix2* keyboard controller3*4* Copyright (c) 2009-2011, NVIDIA Corporation.5*6* This program is free software; you can redistribute it and/or modify7* it under the terms of the GNU General Public License as published by8* the Free Software Foundation; either version 2 of the License, or9* (at your option) any later version.10*11* This program is distributed in the hope that it will be useful, but WITHOUT12* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or13* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for14* more details.15*16* You should have received a copy of the GNU General Public License along17* with this program; if not, write to the Free Software Foundation, Inc.,18* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.19*/2021#include <linux/module.h>22#include <linux/input.h>23#include <linux/platform_device.h>24#include <linux/delay.h>25#include <linux/io.h>26#include <linux/interrupt.h>27#include <linux/clk.h>28#include <linux/slab.h>29#include <mach/clk.h>30#include <mach/kbc.h>3132#define KBC_MAX_DEBOUNCE_CNT 0x3ffu3334/* KBC row scan time and delay for beginning the row scan. */35#define KBC_ROW_SCAN_TIME 1636#define KBC_ROW_SCAN_DLY 53738/* KBC uses a 32KHz clock so a cycle = 1/32Khz */39#define KBC_CYCLE_USEC 324041/* KBC Registers */4243/* KBC Control Register */44#define KBC_CONTROL_0 0x045#define KBC_FIFO_TH_CNT_SHIFT(cnt) (cnt << 14)46#define KBC_DEBOUNCE_CNT_SHIFT(cnt) (cnt << 4)47#define KBC_CONTROL_FIFO_CNT_INT_EN (1 << 3)48#define KBC_CONTROL_KBC_EN (1 << 0)4950/* KBC Interrupt Register */51#define KBC_INT_0 0x452#define KBC_INT_FIFO_CNT_INT_STATUS (1 << 2)5354#define KBC_ROW_CFG0_0 0x855#define KBC_COL_CFG0_0 0x1856#define KBC_INIT_DLY_0 0x2857#define KBC_RPT_DLY_0 0x2c58#define KBC_KP_ENT0_0 0x3059#define KBC_KP_ENT1_0 0x3460#define KBC_ROW0_MASK_0 0x386162#define KBC_ROW_SHIFT 36364struct tegra_kbc {65void __iomem *mmio;66struct input_dev *idev;67unsigned int irq;68spinlock_t lock;69unsigned int repoll_dly;70unsigned long cp_dly_jiffies;71bool use_fn_map;72bool use_ghost_filter;73const struct tegra_kbc_platform_data *pdata;74unsigned short keycode[KBC_MAX_KEY * 2];75unsigned short current_keys[KBC_MAX_KPENT];76unsigned int num_pressed_keys;77struct timer_list timer;78struct clk *clk;79};8081static const u32 tegra_kbc_default_keymap[] = {82KEY(0, 2, KEY_W),83KEY(0, 3, KEY_S),84KEY(0, 4, KEY_A),85KEY(0, 5, KEY_Z),86KEY(0, 7, KEY_FN),8788KEY(1, 7, KEY_LEFTMETA),8990KEY(2, 6, KEY_RIGHTALT),91KEY(2, 7, KEY_LEFTALT),9293KEY(3, 0, KEY_5),94KEY(3, 1, KEY_4),95KEY(3, 2, KEY_R),96KEY(3, 3, KEY_E),97KEY(3, 4, KEY_F),98KEY(3, 5, KEY_D),99KEY(3, 6, KEY_X),100101KEY(4, 0, KEY_7),102KEY(4, 1, KEY_6),103KEY(4, 2, KEY_T),104KEY(4, 3, KEY_H),105KEY(4, 4, KEY_G),106KEY(4, 5, KEY_V),107KEY(4, 6, KEY_C),108KEY(4, 7, KEY_SPACE),109110KEY(5, 0, KEY_9),111KEY(5, 1, KEY_8),112KEY(5, 2, KEY_U),113KEY(5, 3, KEY_Y),114KEY(5, 4, KEY_J),115KEY(5, 5, KEY_N),116KEY(5, 6, KEY_B),117KEY(5, 7, KEY_BACKSLASH),118119KEY(6, 0, KEY_MINUS),120KEY(6, 1, KEY_0),121KEY(6, 2, KEY_O),122KEY(6, 3, KEY_I),123KEY(6, 4, KEY_L),124KEY(6, 5, KEY_K),125KEY(6, 6, KEY_COMMA),126KEY(6, 7, KEY_M),127128KEY(7, 1, KEY_EQUAL),129KEY(7, 2, KEY_RIGHTBRACE),130KEY(7, 3, KEY_ENTER),131KEY(7, 7, KEY_MENU),132133KEY(8, 4, KEY_RIGHTSHIFT),134KEY(8, 5, KEY_LEFTSHIFT),135136KEY(9, 5, KEY_RIGHTCTRL),137KEY(9, 7, KEY_LEFTCTRL),138139KEY(11, 0, KEY_LEFTBRACE),140KEY(11, 1, KEY_P),141KEY(11, 2, KEY_APOSTROPHE),142KEY(11, 3, KEY_SEMICOLON),143KEY(11, 4, KEY_SLASH),144KEY(11, 5, KEY_DOT),145146KEY(12, 0, KEY_F10),147KEY(12, 1, KEY_F9),148KEY(12, 2, KEY_BACKSPACE),149KEY(12, 3, KEY_3),150KEY(12, 4, KEY_2),151KEY(12, 5, KEY_UP),152KEY(12, 6, KEY_PRINT),153KEY(12, 7, KEY_PAUSE),154155KEY(13, 0, KEY_INSERT),156KEY(13, 1, KEY_DELETE),157KEY(13, 3, KEY_PAGEUP),158KEY(13, 4, KEY_PAGEDOWN),159KEY(13, 5, KEY_RIGHT),160KEY(13, 6, KEY_DOWN),161KEY(13, 7, KEY_LEFT),162163KEY(14, 0, KEY_F11),164KEY(14, 1, KEY_F12),165KEY(14, 2, KEY_F8),166KEY(14, 3, KEY_Q),167KEY(14, 4, KEY_F4),168KEY(14, 5, KEY_F3),169KEY(14, 6, KEY_1),170KEY(14, 7, KEY_F7),171172KEY(15, 0, KEY_ESC),173KEY(15, 1, KEY_GRAVE),174KEY(15, 2, KEY_F5),175KEY(15, 3, KEY_TAB),176KEY(15, 4, KEY_F1),177KEY(15, 5, KEY_F2),178KEY(15, 6, KEY_CAPSLOCK),179KEY(15, 7, KEY_F6),180181/* Software Handled Function Keys */182KEY(20, 0, KEY_KP7),183184KEY(21, 0, KEY_KP9),185KEY(21, 1, KEY_KP8),186KEY(21, 2, KEY_KP4),187KEY(21, 4, KEY_KP1),188189KEY(22, 1, KEY_KPSLASH),190KEY(22, 2, KEY_KP6),191KEY(22, 3, KEY_KP5),192KEY(22, 4, KEY_KP3),193KEY(22, 5, KEY_KP2),194KEY(22, 7, KEY_KP0),195196KEY(27, 1, KEY_KPASTERISK),197KEY(27, 3, KEY_KPMINUS),198KEY(27, 4, KEY_KPPLUS),199KEY(27, 5, KEY_KPDOT),200201KEY(28, 5, KEY_VOLUMEUP),202203KEY(29, 3, KEY_HOME),204KEY(29, 4, KEY_END),205KEY(29, 5, KEY_BRIGHTNESSDOWN),206KEY(29, 6, KEY_VOLUMEDOWN),207KEY(29, 7, KEY_BRIGHTNESSUP),208209KEY(30, 0, KEY_NUMLOCK),210KEY(30, 1, KEY_SCROLLLOCK),211KEY(30, 2, KEY_MUTE),212213KEY(31, 4, KEY_HELP),214};215216static const struct matrix_keymap_data tegra_kbc_default_keymap_data = {217.keymap = tegra_kbc_default_keymap,218.keymap_size = ARRAY_SIZE(tegra_kbc_default_keymap),219};220221static void tegra_kbc_report_released_keys(struct input_dev *input,222unsigned short old_keycodes[],223unsigned int old_num_keys,224unsigned short new_keycodes[],225unsigned int new_num_keys)226{227unsigned int i, j;228229for (i = 0; i < old_num_keys; i++) {230for (j = 0; j < new_num_keys; j++)231if (old_keycodes[i] == new_keycodes[j])232break;233234if (j == new_num_keys)235input_report_key(input, old_keycodes[i], 0);236}237}238239static void tegra_kbc_report_pressed_keys(struct input_dev *input,240unsigned char scancodes[],241unsigned short keycodes[],242unsigned int num_pressed_keys)243{244unsigned int i;245246for (i = 0; i < num_pressed_keys; i++) {247input_event(input, EV_MSC, MSC_SCAN, scancodes[i]);248input_report_key(input, keycodes[i], 1);249}250}251252static void tegra_kbc_report_keys(struct tegra_kbc *kbc)253{254unsigned char scancodes[KBC_MAX_KPENT];255unsigned short keycodes[KBC_MAX_KPENT];256u32 val = 0;257unsigned int i;258unsigned int num_down = 0;259unsigned long flags;260bool fn_keypress = false;261bool key_in_same_row = false;262bool key_in_same_col = false;263264spin_lock_irqsave(&kbc->lock, flags);265for (i = 0; i < KBC_MAX_KPENT; i++) {266if ((i % 4) == 0)267val = readl(kbc->mmio + KBC_KP_ENT0_0 + i);268269if (val & 0x80) {270unsigned int col = val & 0x07;271unsigned int row = (val >> 3) & 0x0f;272unsigned char scancode =273MATRIX_SCAN_CODE(row, col, KBC_ROW_SHIFT);274275scancodes[num_down] = scancode;276keycodes[num_down] = kbc->keycode[scancode];277/* If driver uses Fn map, do not report the Fn key. */278if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map)279fn_keypress = true;280else281num_down++;282}283284val >>= 8;285}286287/*288* Matrix keyboard designs are prone to keyboard ghosting.289* Ghosting occurs if there are 3 keys such that -290* any 2 of the 3 keys share a row, and any 2 of them share a column.291* If so ignore the key presses for this iteration.292*/293if ((kbc->use_ghost_filter) && (num_down >= 3)) {294for (i = 0; i < num_down; i++) {295unsigned int j;296u8 curr_col = scancodes[i] & 0x07;297u8 curr_row = scancodes[i] >> KBC_ROW_SHIFT;298299/*300* Find 2 keys such that one key is in the same row301* and the other is in the same column as the i-th key.302*/303for (j = i + 1; j < num_down; j++) {304u8 col = scancodes[j] & 0x07;305u8 row = scancodes[j] >> KBC_ROW_SHIFT;306307if (col == curr_col)308key_in_same_col = true;309if (row == curr_row)310key_in_same_row = true;311}312}313}314315/*316* If the platform uses Fn keymaps, translate keys on a Fn keypress.317* Function keycodes are KBC_MAX_KEY apart from the plain keycodes.318*/319if (fn_keypress) {320for (i = 0; i < num_down; i++) {321scancodes[i] += KBC_MAX_KEY;322keycodes[i] = kbc->keycode[scancodes[i]];323}324}325326spin_unlock_irqrestore(&kbc->lock, flags);327328/* Ignore the key presses for this iteration? */329if (key_in_same_col && key_in_same_row)330return;331332tegra_kbc_report_released_keys(kbc->idev,333kbc->current_keys, kbc->num_pressed_keys,334keycodes, num_down);335tegra_kbc_report_pressed_keys(kbc->idev, scancodes, keycodes, num_down);336input_sync(kbc->idev);337338memcpy(kbc->current_keys, keycodes, sizeof(kbc->current_keys));339kbc->num_pressed_keys = num_down;340}341342static void tegra_kbc_keypress_timer(unsigned long data)343{344struct tegra_kbc *kbc = (struct tegra_kbc *)data;345unsigned long flags;346u32 val;347unsigned int i;348349val = (readl(kbc->mmio + KBC_INT_0) >> 4) & 0xf;350if (val) {351unsigned long dly;352353tegra_kbc_report_keys(kbc);354355/*356* If more than one keys are pressed we need not wait357* for the repoll delay.358*/359dly = (val == 1) ? kbc->repoll_dly : 1;360mod_timer(&kbc->timer, jiffies + msecs_to_jiffies(dly));361} else {362/* Release any pressed keys and exit the polling loop */363for (i = 0; i < kbc->num_pressed_keys; i++)364input_report_key(kbc->idev, kbc->current_keys[i], 0);365input_sync(kbc->idev);366367kbc->num_pressed_keys = 0;368369/* All keys are released so enable the keypress interrupt */370spin_lock_irqsave(&kbc->lock, flags);371val = readl(kbc->mmio + KBC_CONTROL_0);372val |= KBC_CONTROL_FIFO_CNT_INT_EN;373writel(val, kbc->mmio + KBC_CONTROL_0);374spin_unlock_irqrestore(&kbc->lock, flags);375}376}377378static irqreturn_t tegra_kbc_isr(int irq, void *args)379{380struct tegra_kbc *kbc = args;381u32 val, ctl;382383/*384* Until all keys are released, defer further processing to385* the polling loop in tegra_kbc_keypress_timer386*/387ctl = readl(kbc->mmio + KBC_CONTROL_0);388ctl &= ~KBC_CONTROL_FIFO_CNT_INT_EN;389writel(ctl, kbc->mmio + KBC_CONTROL_0);390391/*392* Quickly bail out & reenable interrupts if the fifo threshold393* count interrupt wasn't the interrupt source394*/395val = readl(kbc->mmio + KBC_INT_0);396writel(val, kbc->mmio + KBC_INT_0);397398if (val & KBC_INT_FIFO_CNT_INT_STATUS) {399/*400* Schedule timer to run when hardware is in continuous401* polling mode.402*/403mod_timer(&kbc->timer, jiffies + kbc->cp_dly_jiffies);404} else {405ctl |= KBC_CONTROL_FIFO_CNT_INT_EN;406writel(ctl, kbc->mmio + KBC_CONTROL_0);407}408409return IRQ_HANDLED;410}411412static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter)413{414const struct tegra_kbc_platform_data *pdata = kbc->pdata;415int i;416unsigned int rst_val;417418/* Either mask all keys or none. */419rst_val = (filter && !pdata->wakeup) ? ~0 : 0;420421for (i = 0; i < KBC_MAX_ROW; i++)422writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4);423}424425static void tegra_kbc_config_pins(struct tegra_kbc *kbc)426{427const struct tegra_kbc_platform_data *pdata = kbc->pdata;428int i;429430for (i = 0; i < KBC_MAX_GPIO; i++) {431u32 r_shft = 5 * (i % 6);432u32 c_shft = 4 * (i % 8);433u32 r_mask = 0x1f << r_shft;434u32 c_mask = 0x0f << c_shft;435u32 r_offs = (i / 6) * 4 + KBC_ROW_CFG0_0;436u32 c_offs = (i / 8) * 4 + KBC_COL_CFG0_0;437u32 row_cfg = readl(kbc->mmio + r_offs);438u32 col_cfg = readl(kbc->mmio + c_offs);439440row_cfg &= ~r_mask;441col_cfg &= ~c_mask;442443if (pdata->pin_cfg[i].is_row)444row_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << r_shft;445else446col_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << c_shft;447448writel(row_cfg, kbc->mmio + r_offs);449writel(col_cfg, kbc->mmio + c_offs);450}451}452453static int tegra_kbc_start(struct tegra_kbc *kbc)454{455const struct tegra_kbc_platform_data *pdata = kbc->pdata;456unsigned long flags;457unsigned int debounce_cnt;458u32 val = 0;459460clk_enable(kbc->clk);461462/* Reset the KBC controller to clear all previous status.*/463tegra_periph_reset_assert(kbc->clk);464udelay(100);465tegra_periph_reset_deassert(kbc->clk);466udelay(100);467468tegra_kbc_config_pins(kbc);469tegra_kbc_setup_wakekeys(kbc, false);470471writel(pdata->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0);472473/* Keyboard debounce count is maximum of 12 bits. */474debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);475val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt);476val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */477val |= KBC_CONTROL_FIFO_CNT_INT_EN; /* interrupt on FIFO threshold */478val |= KBC_CONTROL_KBC_EN; /* enable */479writel(val, kbc->mmio + KBC_CONTROL_0);480481/*482* Compute the delay(ns) from interrupt mode to continuous polling483* mode so the timer routine is scheduled appropriately.484*/485val = readl(kbc->mmio + KBC_INIT_DLY_0);486kbc->cp_dly_jiffies = usecs_to_jiffies((val & 0xfffff) * 32);487488kbc->num_pressed_keys = 0;489490/*491* Atomically clear out any remaining entries in the key FIFO492* and enable keyboard interrupts.493*/494spin_lock_irqsave(&kbc->lock, flags);495while (1) {496val = readl(kbc->mmio + KBC_INT_0);497val >>= 4;498if (!val)499break;500501val = readl(kbc->mmio + KBC_KP_ENT0_0);502val = readl(kbc->mmio + KBC_KP_ENT1_0);503}504writel(0x7, kbc->mmio + KBC_INT_0);505spin_unlock_irqrestore(&kbc->lock, flags);506507enable_irq(kbc->irq);508509return 0;510}511512static void tegra_kbc_stop(struct tegra_kbc *kbc)513{514unsigned long flags;515u32 val;516517spin_lock_irqsave(&kbc->lock, flags);518val = readl(kbc->mmio + KBC_CONTROL_0);519val &= ~1;520writel(val, kbc->mmio + KBC_CONTROL_0);521spin_unlock_irqrestore(&kbc->lock, flags);522523disable_irq(kbc->irq);524del_timer_sync(&kbc->timer);525526clk_disable(kbc->clk);527}528529static int tegra_kbc_open(struct input_dev *dev)530{531struct tegra_kbc *kbc = input_get_drvdata(dev);532533return tegra_kbc_start(kbc);534}535536static void tegra_kbc_close(struct input_dev *dev)537{538struct tegra_kbc *kbc = input_get_drvdata(dev);539540return tegra_kbc_stop(kbc);541}542543static bool __devinit544tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata,545struct device *dev, unsigned int *num_rows)546{547int i;548549*num_rows = 0;550551for (i = 0; i < KBC_MAX_GPIO; i++) {552const struct tegra_kbc_pin_cfg *pin_cfg = &pdata->pin_cfg[i];553554if (pin_cfg->is_row) {555if (pin_cfg->num >= KBC_MAX_ROW) {556dev_err(dev,557"pin_cfg[%d]: invalid row number %d\n",558i, pin_cfg->num);559return false;560}561(*num_rows)++;562} else {563if (pin_cfg->num >= KBC_MAX_COL) {564dev_err(dev,565"pin_cfg[%d]: invalid column number %d\n",566i, pin_cfg->num);567return false;568}569}570}571572return true;573}574575static int __devinit tegra_kbc_probe(struct platform_device *pdev)576{577const struct tegra_kbc_platform_data *pdata = pdev->dev.platform_data;578const struct matrix_keymap_data *keymap_data;579struct tegra_kbc *kbc;580struct input_dev *input_dev;581struct resource *res;582int irq;583int err;584int num_rows = 0;585unsigned int debounce_cnt;586unsigned int scan_time_rows;587588if (!pdata)589return -EINVAL;590591if (!tegra_kbc_check_pin_cfg(pdata, &pdev->dev, &num_rows))592return -EINVAL;593594res = platform_get_resource(pdev, IORESOURCE_MEM, 0);595if (!res) {596dev_err(&pdev->dev, "failed to get I/O memory\n");597return -ENXIO;598}599600irq = platform_get_irq(pdev, 0);601if (irq < 0) {602dev_err(&pdev->dev, "failed to get keyboard IRQ\n");603return -ENXIO;604}605606kbc = kzalloc(sizeof(*kbc), GFP_KERNEL);607input_dev = input_allocate_device();608if (!kbc || !input_dev) {609err = -ENOMEM;610goto err_free_mem;611}612613kbc->pdata = pdata;614kbc->idev = input_dev;615kbc->irq = irq;616spin_lock_init(&kbc->lock);617setup_timer(&kbc->timer, tegra_kbc_keypress_timer, (unsigned long)kbc);618619res = request_mem_region(res->start, resource_size(res), pdev->name);620if (!res) {621dev_err(&pdev->dev, "failed to request I/O memory\n");622err = -EBUSY;623goto err_free_mem;624}625626kbc->mmio = ioremap(res->start, resource_size(res));627if (!kbc->mmio) {628dev_err(&pdev->dev, "failed to remap I/O memory\n");629err = -ENXIO;630goto err_free_mem_region;631}632633kbc->clk = clk_get(&pdev->dev, NULL);634if (IS_ERR(kbc->clk)) {635dev_err(&pdev->dev, "failed to get keyboard clock\n");636err = PTR_ERR(kbc->clk);637goto err_iounmap;638}639640/*641* The time delay between two consecutive reads of the FIFO is642* the sum of the repeat time and the time taken for scanning643* the rows. There is an additional delay before the row scanning644* starts. The repoll delay is computed in milliseconds.645*/646debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);647scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows;648kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + pdata->repeat_cnt;649kbc->repoll_dly = ((kbc->repoll_dly * KBC_CYCLE_USEC) + 999) / 1000;650651input_dev->name = pdev->name;652input_dev->id.bustype = BUS_HOST;653input_dev->dev.parent = &pdev->dev;654input_dev->open = tegra_kbc_open;655input_dev->close = tegra_kbc_close;656657input_set_drvdata(input_dev, kbc);658659input_dev->evbit[0] = BIT_MASK(EV_KEY);660input_set_capability(input_dev, EV_MSC, MSC_SCAN);661662input_dev->keycode = kbc->keycode;663input_dev->keycodesize = sizeof(kbc->keycode[0]);664input_dev->keycodemax = KBC_MAX_KEY;665if (pdata->use_fn_map)666input_dev->keycodemax *= 2;667668kbc->use_fn_map = pdata->use_fn_map;669kbc->use_ghost_filter = pdata->use_ghost_filter;670keymap_data = pdata->keymap_data ?: &tegra_kbc_default_keymap_data;671matrix_keypad_build_keymap(keymap_data, KBC_ROW_SHIFT,672input_dev->keycode, input_dev->keybit);673674err = request_irq(kbc->irq, tegra_kbc_isr, IRQF_TRIGGER_HIGH,675pdev->name, kbc);676if (err) {677dev_err(&pdev->dev, "failed to request keyboard IRQ\n");678goto err_put_clk;679}680681disable_irq(kbc->irq);682683err = input_register_device(kbc->idev);684if (err) {685dev_err(&pdev->dev, "failed to register input device\n");686goto err_free_irq;687}688689platform_set_drvdata(pdev, kbc);690device_init_wakeup(&pdev->dev, pdata->wakeup);691692return 0;693694err_free_irq:695free_irq(kbc->irq, pdev);696err_put_clk:697clk_put(kbc->clk);698err_iounmap:699iounmap(kbc->mmio);700err_free_mem_region:701release_mem_region(res->start, resource_size(res));702err_free_mem:703input_free_device(kbc->idev);704kfree(kbc);705706return err;707}708709static int __devexit tegra_kbc_remove(struct platform_device *pdev)710{711struct tegra_kbc *kbc = platform_get_drvdata(pdev);712struct resource *res;713714free_irq(kbc->irq, pdev);715clk_put(kbc->clk);716717input_unregister_device(kbc->idev);718iounmap(kbc->mmio);719res = platform_get_resource(pdev, IORESOURCE_MEM, 0);720release_mem_region(res->start, resource_size(res));721722kfree(kbc);723724platform_set_drvdata(pdev, NULL);725726return 0;727}728729#ifdef CONFIG_PM_SLEEP730static int tegra_kbc_suspend(struct device *dev)731{732struct platform_device *pdev = to_platform_device(dev);733struct tegra_kbc *kbc = platform_get_drvdata(pdev);734735if (device_may_wakeup(&pdev->dev)) {736tegra_kbc_setup_wakekeys(kbc, true);737enable_irq_wake(kbc->irq);738/* Forcefully clear the interrupt status */739writel(0x7, kbc->mmio + KBC_INT_0);740msleep(30);741} else {742mutex_lock(&kbc->idev->mutex);743if (kbc->idev->users)744tegra_kbc_stop(kbc);745mutex_unlock(&kbc->idev->mutex);746}747748return 0;749}750751static int tegra_kbc_resume(struct device *dev)752{753struct platform_device *pdev = to_platform_device(dev);754struct tegra_kbc *kbc = platform_get_drvdata(pdev);755int err = 0;756757if (device_may_wakeup(&pdev->dev)) {758disable_irq_wake(kbc->irq);759tegra_kbc_setup_wakekeys(kbc, false);760} else {761mutex_lock(&kbc->idev->mutex);762if (kbc->idev->users)763err = tegra_kbc_start(kbc);764mutex_unlock(&kbc->idev->mutex);765}766767return err;768}769#endif770771static SIMPLE_DEV_PM_OPS(tegra_kbc_pm_ops, tegra_kbc_suspend, tegra_kbc_resume);772773static struct platform_driver tegra_kbc_driver = {774.probe = tegra_kbc_probe,775.remove = __devexit_p(tegra_kbc_remove),776.driver = {777.name = "tegra-kbc",778.owner = THIS_MODULE,779.pm = &tegra_kbc_pm_ops,780},781};782783static void __exit tegra_kbc_exit(void)784{785platform_driver_unregister(&tegra_kbc_driver);786}787module_exit(tegra_kbc_exit);788789static int __init tegra_kbc_init(void)790{791return platform_driver_register(&tegra_kbc_driver);792}793module_init(tegra_kbc_init);794795MODULE_LICENSE("GPL");796MODULE_AUTHOR("Rakesh Iyer <[email protected]>");797MODULE_DESCRIPTION("Tegra matrix keyboard controller driver");798MODULE_ALIAS("platform:tegra-kbc");799800801