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awilliam
GitHub Repository: awilliam/linux-vfio
Path: blob/master/drivers/input/keyboard/tegra-kbc.c
15111 views
1
/*
2
* Keyboard class input driver for the NVIDIA Tegra SoC internal matrix
3
* keyboard controller
4
*
5
* Copyright (c) 2009-2011, NVIDIA Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
13
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15
* more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
20
*/
21
22
#include <linux/module.h>
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#include <linux/input.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include <linux/clk.h>
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#include <linux/slab.h>
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#include <mach/clk.h>
31
#include <mach/kbc.h>
32
33
#define KBC_MAX_DEBOUNCE_CNT 0x3ffu
34
35
/* KBC row scan time and delay for beginning the row scan. */
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#define KBC_ROW_SCAN_TIME 16
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#define KBC_ROW_SCAN_DLY 5
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/* KBC uses a 32KHz clock so a cycle = 1/32Khz */
40
#define KBC_CYCLE_USEC 32
41
42
/* KBC Registers */
43
44
/* KBC Control Register */
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#define KBC_CONTROL_0 0x0
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#define KBC_FIFO_TH_CNT_SHIFT(cnt) (cnt << 14)
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#define KBC_DEBOUNCE_CNT_SHIFT(cnt) (cnt << 4)
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#define KBC_CONTROL_FIFO_CNT_INT_EN (1 << 3)
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#define KBC_CONTROL_KBC_EN (1 << 0)
50
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/* KBC Interrupt Register */
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#define KBC_INT_0 0x4
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#define KBC_INT_FIFO_CNT_INT_STATUS (1 << 2)
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#define KBC_ROW_CFG0_0 0x8
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#define KBC_COL_CFG0_0 0x18
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#define KBC_INIT_DLY_0 0x28
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#define KBC_RPT_DLY_0 0x2c
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#define KBC_KP_ENT0_0 0x30
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#define KBC_KP_ENT1_0 0x34
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#define KBC_ROW0_MASK_0 0x38
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63
#define KBC_ROW_SHIFT 3
64
65
struct tegra_kbc {
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void __iomem *mmio;
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struct input_dev *idev;
68
unsigned int irq;
69
spinlock_t lock;
70
unsigned int repoll_dly;
71
unsigned long cp_dly_jiffies;
72
bool use_fn_map;
73
bool use_ghost_filter;
74
const struct tegra_kbc_platform_data *pdata;
75
unsigned short keycode[KBC_MAX_KEY * 2];
76
unsigned short current_keys[KBC_MAX_KPENT];
77
unsigned int num_pressed_keys;
78
struct timer_list timer;
79
struct clk *clk;
80
};
81
82
static const u32 tegra_kbc_default_keymap[] = {
83
KEY(0, 2, KEY_W),
84
KEY(0, 3, KEY_S),
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KEY(0, 4, KEY_A),
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KEY(0, 5, KEY_Z),
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KEY(0, 7, KEY_FN),
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89
KEY(1, 7, KEY_LEFTMETA),
90
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KEY(2, 6, KEY_RIGHTALT),
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KEY(2, 7, KEY_LEFTALT),
93
94
KEY(3, 0, KEY_5),
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KEY(3, 1, KEY_4),
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KEY(3, 2, KEY_R),
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KEY(3, 3, KEY_E),
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KEY(3, 4, KEY_F),
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KEY(3, 5, KEY_D),
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KEY(3, 6, KEY_X),
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102
KEY(4, 0, KEY_7),
103
KEY(4, 1, KEY_6),
104
KEY(4, 2, KEY_T),
105
KEY(4, 3, KEY_H),
106
KEY(4, 4, KEY_G),
107
KEY(4, 5, KEY_V),
108
KEY(4, 6, KEY_C),
109
KEY(4, 7, KEY_SPACE),
110
111
KEY(5, 0, KEY_9),
112
KEY(5, 1, KEY_8),
113
KEY(5, 2, KEY_U),
114
KEY(5, 3, KEY_Y),
115
KEY(5, 4, KEY_J),
116
KEY(5, 5, KEY_N),
117
KEY(5, 6, KEY_B),
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KEY(5, 7, KEY_BACKSLASH),
119
120
KEY(6, 0, KEY_MINUS),
121
KEY(6, 1, KEY_0),
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KEY(6, 2, KEY_O),
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KEY(6, 3, KEY_I),
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KEY(6, 4, KEY_L),
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KEY(6, 5, KEY_K),
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KEY(6, 6, KEY_COMMA),
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KEY(6, 7, KEY_M),
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KEY(7, 1, KEY_EQUAL),
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KEY(7, 2, KEY_RIGHTBRACE),
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KEY(7, 3, KEY_ENTER),
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KEY(7, 7, KEY_MENU),
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KEY(8, 4, KEY_RIGHTSHIFT),
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KEY(8, 5, KEY_LEFTSHIFT),
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KEY(9, 5, KEY_RIGHTCTRL),
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KEY(9, 7, KEY_LEFTCTRL),
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KEY(11, 0, KEY_LEFTBRACE),
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KEY(11, 1, KEY_P),
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KEY(11, 2, KEY_APOSTROPHE),
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KEY(11, 3, KEY_SEMICOLON),
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KEY(11, 4, KEY_SLASH),
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KEY(11, 5, KEY_DOT),
146
147
KEY(12, 0, KEY_F10),
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KEY(12, 1, KEY_F9),
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KEY(12, 2, KEY_BACKSPACE),
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KEY(12, 3, KEY_3),
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KEY(12, 4, KEY_2),
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KEY(12, 5, KEY_UP),
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KEY(12, 6, KEY_PRINT),
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KEY(12, 7, KEY_PAUSE),
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156
KEY(13, 0, KEY_INSERT),
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KEY(13, 1, KEY_DELETE),
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KEY(13, 3, KEY_PAGEUP),
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KEY(13, 4, KEY_PAGEDOWN),
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KEY(13, 5, KEY_RIGHT),
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KEY(13, 6, KEY_DOWN),
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KEY(13, 7, KEY_LEFT),
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KEY(14, 0, KEY_F11),
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KEY(14, 1, KEY_F12),
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KEY(14, 2, KEY_F8),
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KEY(14, 3, KEY_Q),
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KEY(14, 4, KEY_F4),
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KEY(14, 5, KEY_F3),
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KEY(14, 6, KEY_1),
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KEY(14, 7, KEY_F7),
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KEY(15, 0, KEY_ESC),
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KEY(15, 1, KEY_GRAVE),
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KEY(15, 2, KEY_F5),
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KEY(15, 3, KEY_TAB),
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KEY(15, 4, KEY_F1),
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KEY(15, 5, KEY_F2),
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KEY(15, 6, KEY_CAPSLOCK),
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KEY(15, 7, KEY_F6),
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/* Software Handled Function Keys */
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KEY(20, 0, KEY_KP7),
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185
KEY(21, 0, KEY_KP9),
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KEY(21, 1, KEY_KP8),
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KEY(21, 2, KEY_KP4),
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KEY(21, 4, KEY_KP1),
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KEY(22, 1, KEY_KPSLASH),
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KEY(22, 2, KEY_KP6),
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KEY(22, 3, KEY_KP5),
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KEY(22, 4, KEY_KP3),
194
KEY(22, 5, KEY_KP2),
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KEY(22, 7, KEY_KP0),
196
197
KEY(27, 1, KEY_KPASTERISK),
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KEY(27, 3, KEY_KPMINUS),
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KEY(27, 4, KEY_KPPLUS),
200
KEY(27, 5, KEY_KPDOT),
201
202
KEY(28, 5, KEY_VOLUMEUP),
203
204
KEY(29, 3, KEY_HOME),
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KEY(29, 4, KEY_END),
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KEY(29, 5, KEY_BRIGHTNESSDOWN),
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KEY(29, 6, KEY_VOLUMEDOWN),
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KEY(29, 7, KEY_BRIGHTNESSUP),
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KEY(30, 0, KEY_NUMLOCK),
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KEY(30, 1, KEY_SCROLLLOCK),
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KEY(30, 2, KEY_MUTE),
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KEY(31, 4, KEY_HELP),
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};
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static const struct matrix_keymap_data tegra_kbc_default_keymap_data = {
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.keymap = tegra_kbc_default_keymap,
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.keymap_size = ARRAY_SIZE(tegra_kbc_default_keymap),
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};
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static void tegra_kbc_report_released_keys(struct input_dev *input,
223
unsigned short old_keycodes[],
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unsigned int old_num_keys,
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unsigned short new_keycodes[],
226
unsigned int new_num_keys)
227
{
228
unsigned int i, j;
229
230
for (i = 0; i < old_num_keys; i++) {
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for (j = 0; j < new_num_keys; j++)
232
if (old_keycodes[i] == new_keycodes[j])
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break;
234
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if (j == new_num_keys)
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input_report_key(input, old_keycodes[i], 0);
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}
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}
239
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static void tegra_kbc_report_pressed_keys(struct input_dev *input,
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unsigned char scancodes[],
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unsigned short keycodes[],
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unsigned int num_pressed_keys)
244
{
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unsigned int i;
246
247
for (i = 0; i < num_pressed_keys; i++) {
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input_event(input, EV_MSC, MSC_SCAN, scancodes[i]);
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input_report_key(input, keycodes[i], 1);
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}
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}
252
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static void tegra_kbc_report_keys(struct tegra_kbc *kbc)
254
{
255
unsigned char scancodes[KBC_MAX_KPENT];
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unsigned short keycodes[KBC_MAX_KPENT];
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u32 val = 0;
258
unsigned int i;
259
unsigned int num_down = 0;
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unsigned long flags;
261
bool fn_keypress = false;
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bool key_in_same_row = false;
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bool key_in_same_col = false;
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spin_lock_irqsave(&kbc->lock, flags);
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for (i = 0; i < KBC_MAX_KPENT; i++) {
267
if ((i % 4) == 0)
268
val = readl(kbc->mmio + KBC_KP_ENT0_0 + i);
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270
if (val & 0x80) {
271
unsigned int col = val & 0x07;
272
unsigned int row = (val >> 3) & 0x0f;
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unsigned char scancode =
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MATRIX_SCAN_CODE(row, col, KBC_ROW_SHIFT);
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276
scancodes[num_down] = scancode;
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keycodes[num_down] = kbc->keycode[scancode];
278
/* If driver uses Fn map, do not report the Fn key. */
279
if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map)
280
fn_keypress = true;
281
else
282
num_down++;
283
}
284
285
val >>= 8;
286
}
287
288
/*
289
* Matrix keyboard designs are prone to keyboard ghosting.
290
* Ghosting occurs if there are 3 keys such that -
291
* any 2 of the 3 keys share a row, and any 2 of them share a column.
292
* If so ignore the key presses for this iteration.
293
*/
294
if ((kbc->use_ghost_filter) && (num_down >= 3)) {
295
for (i = 0; i < num_down; i++) {
296
unsigned int j;
297
u8 curr_col = scancodes[i] & 0x07;
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u8 curr_row = scancodes[i] >> KBC_ROW_SHIFT;
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300
/*
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* Find 2 keys such that one key is in the same row
302
* and the other is in the same column as the i-th key.
303
*/
304
for (j = i + 1; j < num_down; j++) {
305
u8 col = scancodes[j] & 0x07;
306
u8 row = scancodes[j] >> KBC_ROW_SHIFT;
307
308
if (col == curr_col)
309
key_in_same_col = true;
310
if (row == curr_row)
311
key_in_same_row = true;
312
}
313
}
314
}
315
316
/*
317
* If the platform uses Fn keymaps, translate keys on a Fn keypress.
318
* Function keycodes are KBC_MAX_KEY apart from the plain keycodes.
319
*/
320
if (fn_keypress) {
321
for (i = 0; i < num_down; i++) {
322
scancodes[i] += KBC_MAX_KEY;
323
keycodes[i] = kbc->keycode[scancodes[i]];
324
}
325
}
326
327
spin_unlock_irqrestore(&kbc->lock, flags);
328
329
/* Ignore the key presses for this iteration? */
330
if (key_in_same_col && key_in_same_row)
331
return;
332
333
tegra_kbc_report_released_keys(kbc->idev,
334
kbc->current_keys, kbc->num_pressed_keys,
335
keycodes, num_down);
336
tegra_kbc_report_pressed_keys(kbc->idev, scancodes, keycodes, num_down);
337
input_sync(kbc->idev);
338
339
memcpy(kbc->current_keys, keycodes, sizeof(kbc->current_keys));
340
kbc->num_pressed_keys = num_down;
341
}
342
343
static void tegra_kbc_keypress_timer(unsigned long data)
344
{
345
struct tegra_kbc *kbc = (struct tegra_kbc *)data;
346
unsigned long flags;
347
u32 val;
348
unsigned int i;
349
350
val = (readl(kbc->mmio + KBC_INT_0) >> 4) & 0xf;
351
if (val) {
352
unsigned long dly;
353
354
tegra_kbc_report_keys(kbc);
355
356
/*
357
* If more than one keys are pressed we need not wait
358
* for the repoll delay.
359
*/
360
dly = (val == 1) ? kbc->repoll_dly : 1;
361
mod_timer(&kbc->timer, jiffies + msecs_to_jiffies(dly));
362
} else {
363
/* Release any pressed keys and exit the polling loop */
364
for (i = 0; i < kbc->num_pressed_keys; i++)
365
input_report_key(kbc->idev, kbc->current_keys[i], 0);
366
input_sync(kbc->idev);
367
368
kbc->num_pressed_keys = 0;
369
370
/* All keys are released so enable the keypress interrupt */
371
spin_lock_irqsave(&kbc->lock, flags);
372
val = readl(kbc->mmio + KBC_CONTROL_0);
373
val |= KBC_CONTROL_FIFO_CNT_INT_EN;
374
writel(val, kbc->mmio + KBC_CONTROL_0);
375
spin_unlock_irqrestore(&kbc->lock, flags);
376
}
377
}
378
379
static irqreturn_t tegra_kbc_isr(int irq, void *args)
380
{
381
struct tegra_kbc *kbc = args;
382
u32 val, ctl;
383
384
/*
385
* Until all keys are released, defer further processing to
386
* the polling loop in tegra_kbc_keypress_timer
387
*/
388
ctl = readl(kbc->mmio + KBC_CONTROL_0);
389
ctl &= ~KBC_CONTROL_FIFO_CNT_INT_EN;
390
writel(ctl, kbc->mmio + KBC_CONTROL_0);
391
392
/*
393
* Quickly bail out & reenable interrupts if the fifo threshold
394
* count interrupt wasn't the interrupt source
395
*/
396
val = readl(kbc->mmio + KBC_INT_0);
397
writel(val, kbc->mmio + KBC_INT_0);
398
399
if (val & KBC_INT_FIFO_CNT_INT_STATUS) {
400
/*
401
* Schedule timer to run when hardware is in continuous
402
* polling mode.
403
*/
404
mod_timer(&kbc->timer, jiffies + kbc->cp_dly_jiffies);
405
} else {
406
ctl |= KBC_CONTROL_FIFO_CNT_INT_EN;
407
writel(ctl, kbc->mmio + KBC_CONTROL_0);
408
}
409
410
return IRQ_HANDLED;
411
}
412
413
static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter)
414
{
415
const struct tegra_kbc_platform_data *pdata = kbc->pdata;
416
int i;
417
unsigned int rst_val;
418
419
/* Either mask all keys or none. */
420
rst_val = (filter && !pdata->wakeup) ? ~0 : 0;
421
422
for (i = 0; i < KBC_MAX_ROW; i++)
423
writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4);
424
}
425
426
static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
427
{
428
const struct tegra_kbc_platform_data *pdata = kbc->pdata;
429
int i;
430
431
for (i = 0; i < KBC_MAX_GPIO; i++) {
432
u32 r_shft = 5 * (i % 6);
433
u32 c_shft = 4 * (i % 8);
434
u32 r_mask = 0x1f << r_shft;
435
u32 c_mask = 0x0f << c_shft;
436
u32 r_offs = (i / 6) * 4 + KBC_ROW_CFG0_0;
437
u32 c_offs = (i / 8) * 4 + KBC_COL_CFG0_0;
438
u32 row_cfg = readl(kbc->mmio + r_offs);
439
u32 col_cfg = readl(kbc->mmio + c_offs);
440
441
row_cfg &= ~r_mask;
442
col_cfg &= ~c_mask;
443
444
if (pdata->pin_cfg[i].is_row)
445
row_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << r_shft;
446
else
447
col_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << c_shft;
448
449
writel(row_cfg, kbc->mmio + r_offs);
450
writel(col_cfg, kbc->mmio + c_offs);
451
}
452
}
453
454
static int tegra_kbc_start(struct tegra_kbc *kbc)
455
{
456
const struct tegra_kbc_platform_data *pdata = kbc->pdata;
457
unsigned long flags;
458
unsigned int debounce_cnt;
459
u32 val = 0;
460
461
clk_enable(kbc->clk);
462
463
/* Reset the KBC controller to clear all previous status.*/
464
tegra_periph_reset_assert(kbc->clk);
465
udelay(100);
466
tegra_periph_reset_deassert(kbc->clk);
467
udelay(100);
468
469
tegra_kbc_config_pins(kbc);
470
tegra_kbc_setup_wakekeys(kbc, false);
471
472
writel(pdata->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0);
473
474
/* Keyboard debounce count is maximum of 12 bits. */
475
debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
476
val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt);
477
val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */
478
val |= KBC_CONTROL_FIFO_CNT_INT_EN; /* interrupt on FIFO threshold */
479
val |= KBC_CONTROL_KBC_EN; /* enable */
480
writel(val, kbc->mmio + KBC_CONTROL_0);
481
482
/*
483
* Compute the delay(ns) from interrupt mode to continuous polling
484
* mode so the timer routine is scheduled appropriately.
485
*/
486
val = readl(kbc->mmio + KBC_INIT_DLY_0);
487
kbc->cp_dly_jiffies = usecs_to_jiffies((val & 0xfffff) * 32);
488
489
kbc->num_pressed_keys = 0;
490
491
/*
492
* Atomically clear out any remaining entries in the key FIFO
493
* and enable keyboard interrupts.
494
*/
495
spin_lock_irqsave(&kbc->lock, flags);
496
while (1) {
497
val = readl(kbc->mmio + KBC_INT_0);
498
val >>= 4;
499
if (!val)
500
break;
501
502
val = readl(kbc->mmio + KBC_KP_ENT0_0);
503
val = readl(kbc->mmio + KBC_KP_ENT1_0);
504
}
505
writel(0x7, kbc->mmio + KBC_INT_0);
506
spin_unlock_irqrestore(&kbc->lock, flags);
507
508
enable_irq(kbc->irq);
509
510
return 0;
511
}
512
513
static void tegra_kbc_stop(struct tegra_kbc *kbc)
514
{
515
unsigned long flags;
516
u32 val;
517
518
spin_lock_irqsave(&kbc->lock, flags);
519
val = readl(kbc->mmio + KBC_CONTROL_0);
520
val &= ~1;
521
writel(val, kbc->mmio + KBC_CONTROL_0);
522
spin_unlock_irqrestore(&kbc->lock, flags);
523
524
disable_irq(kbc->irq);
525
del_timer_sync(&kbc->timer);
526
527
clk_disable(kbc->clk);
528
}
529
530
static int tegra_kbc_open(struct input_dev *dev)
531
{
532
struct tegra_kbc *kbc = input_get_drvdata(dev);
533
534
return tegra_kbc_start(kbc);
535
}
536
537
static void tegra_kbc_close(struct input_dev *dev)
538
{
539
struct tegra_kbc *kbc = input_get_drvdata(dev);
540
541
return tegra_kbc_stop(kbc);
542
}
543
544
static bool __devinit
545
tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata,
546
struct device *dev, unsigned int *num_rows)
547
{
548
int i;
549
550
*num_rows = 0;
551
552
for (i = 0; i < KBC_MAX_GPIO; i++) {
553
const struct tegra_kbc_pin_cfg *pin_cfg = &pdata->pin_cfg[i];
554
555
if (pin_cfg->is_row) {
556
if (pin_cfg->num >= KBC_MAX_ROW) {
557
dev_err(dev,
558
"pin_cfg[%d]: invalid row number %d\n",
559
i, pin_cfg->num);
560
return false;
561
}
562
(*num_rows)++;
563
} else {
564
if (pin_cfg->num >= KBC_MAX_COL) {
565
dev_err(dev,
566
"pin_cfg[%d]: invalid column number %d\n",
567
i, pin_cfg->num);
568
return false;
569
}
570
}
571
}
572
573
return true;
574
}
575
576
static int __devinit tegra_kbc_probe(struct platform_device *pdev)
577
{
578
const struct tegra_kbc_platform_data *pdata = pdev->dev.platform_data;
579
const struct matrix_keymap_data *keymap_data;
580
struct tegra_kbc *kbc;
581
struct input_dev *input_dev;
582
struct resource *res;
583
int irq;
584
int err;
585
int num_rows = 0;
586
unsigned int debounce_cnt;
587
unsigned int scan_time_rows;
588
589
if (!pdata)
590
return -EINVAL;
591
592
if (!tegra_kbc_check_pin_cfg(pdata, &pdev->dev, &num_rows))
593
return -EINVAL;
594
595
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
596
if (!res) {
597
dev_err(&pdev->dev, "failed to get I/O memory\n");
598
return -ENXIO;
599
}
600
601
irq = platform_get_irq(pdev, 0);
602
if (irq < 0) {
603
dev_err(&pdev->dev, "failed to get keyboard IRQ\n");
604
return -ENXIO;
605
}
606
607
kbc = kzalloc(sizeof(*kbc), GFP_KERNEL);
608
input_dev = input_allocate_device();
609
if (!kbc || !input_dev) {
610
err = -ENOMEM;
611
goto err_free_mem;
612
}
613
614
kbc->pdata = pdata;
615
kbc->idev = input_dev;
616
kbc->irq = irq;
617
spin_lock_init(&kbc->lock);
618
setup_timer(&kbc->timer, tegra_kbc_keypress_timer, (unsigned long)kbc);
619
620
res = request_mem_region(res->start, resource_size(res), pdev->name);
621
if (!res) {
622
dev_err(&pdev->dev, "failed to request I/O memory\n");
623
err = -EBUSY;
624
goto err_free_mem;
625
}
626
627
kbc->mmio = ioremap(res->start, resource_size(res));
628
if (!kbc->mmio) {
629
dev_err(&pdev->dev, "failed to remap I/O memory\n");
630
err = -ENXIO;
631
goto err_free_mem_region;
632
}
633
634
kbc->clk = clk_get(&pdev->dev, NULL);
635
if (IS_ERR(kbc->clk)) {
636
dev_err(&pdev->dev, "failed to get keyboard clock\n");
637
err = PTR_ERR(kbc->clk);
638
goto err_iounmap;
639
}
640
641
/*
642
* The time delay between two consecutive reads of the FIFO is
643
* the sum of the repeat time and the time taken for scanning
644
* the rows. There is an additional delay before the row scanning
645
* starts. The repoll delay is computed in milliseconds.
646
*/
647
debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
648
scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows;
649
kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + pdata->repeat_cnt;
650
kbc->repoll_dly = ((kbc->repoll_dly * KBC_CYCLE_USEC) + 999) / 1000;
651
652
input_dev->name = pdev->name;
653
input_dev->id.bustype = BUS_HOST;
654
input_dev->dev.parent = &pdev->dev;
655
input_dev->open = tegra_kbc_open;
656
input_dev->close = tegra_kbc_close;
657
658
input_set_drvdata(input_dev, kbc);
659
660
input_dev->evbit[0] = BIT_MASK(EV_KEY);
661
input_set_capability(input_dev, EV_MSC, MSC_SCAN);
662
663
input_dev->keycode = kbc->keycode;
664
input_dev->keycodesize = sizeof(kbc->keycode[0]);
665
input_dev->keycodemax = KBC_MAX_KEY;
666
if (pdata->use_fn_map)
667
input_dev->keycodemax *= 2;
668
669
kbc->use_fn_map = pdata->use_fn_map;
670
kbc->use_ghost_filter = pdata->use_ghost_filter;
671
keymap_data = pdata->keymap_data ?: &tegra_kbc_default_keymap_data;
672
matrix_keypad_build_keymap(keymap_data, KBC_ROW_SHIFT,
673
input_dev->keycode, input_dev->keybit);
674
675
err = request_irq(kbc->irq, tegra_kbc_isr, IRQF_TRIGGER_HIGH,
676
pdev->name, kbc);
677
if (err) {
678
dev_err(&pdev->dev, "failed to request keyboard IRQ\n");
679
goto err_put_clk;
680
}
681
682
disable_irq(kbc->irq);
683
684
err = input_register_device(kbc->idev);
685
if (err) {
686
dev_err(&pdev->dev, "failed to register input device\n");
687
goto err_free_irq;
688
}
689
690
platform_set_drvdata(pdev, kbc);
691
device_init_wakeup(&pdev->dev, pdata->wakeup);
692
693
return 0;
694
695
err_free_irq:
696
free_irq(kbc->irq, pdev);
697
err_put_clk:
698
clk_put(kbc->clk);
699
err_iounmap:
700
iounmap(kbc->mmio);
701
err_free_mem_region:
702
release_mem_region(res->start, resource_size(res));
703
err_free_mem:
704
input_free_device(kbc->idev);
705
kfree(kbc);
706
707
return err;
708
}
709
710
static int __devexit tegra_kbc_remove(struct platform_device *pdev)
711
{
712
struct tegra_kbc *kbc = platform_get_drvdata(pdev);
713
struct resource *res;
714
715
free_irq(kbc->irq, pdev);
716
clk_put(kbc->clk);
717
718
input_unregister_device(kbc->idev);
719
iounmap(kbc->mmio);
720
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
721
release_mem_region(res->start, resource_size(res));
722
723
kfree(kbc);
724
725
platform_set_drvdata(pdev, NULL);
726
727
return 0;
728
}
729
730
#ifdef CONFIG_PM_SLEEP
731
static int tegra_kbc_suspend(struct device *dev)
732
{
733
struct platform_device *pdev = to_platform_device(dev);
734
struct tegra_kbc *kbc = platform_get_drvdata(pdev);
735
736
if (device_may_wakeup(&pdev->dev)) {
737
tegra_kbc_setup_wakekeys(kbc, true);
738
enable_irq_wake(kbc->irq);
739
/* Forcefully clear the interrupt status */
740
writel(0x7, kbc->mmio + KBC_INT_0);
741
msleep(30);
742
} else {
743
mutex_lock(&kbc->idev->mutex);
744
if (kbc->idev->users)
745
tegra_kbc_stop(kbc);
746
mutex_unlock(&kbc->idev->mutex);
747
}
748
749
return 0;
750
}
751
752
static int tegra_kbc_resume(struct device *dev)
753
{
754
struct platform_device *pdev = to_platform_device(dev);
755
struct tegra_kbc *kbc = platform_get_drvdata(pdev);
756
int err = 0;
757
758
if (device_may_wakeup(&pdev->dev)) {
759
disable_irq_wake(kbc->irq);
760
tegra_kbc_setup_wakekeys(kbc, false);
761
} else {
762
mutex_lock(&kbc->idev->mutex);
763
if (kbc->idev->users)
764
err = tegra_kbc_start(kbc);
765
mutex_unlock(&kbc->idev->mutex);
766
}
767
768
return err;
769
}
770
#endif
771
772
static SIMPLE_DEV_PM_OPS(tegra_kbc_pm_ops, tegra_kbc_suspend, tegra_kbc_resume);
773
774
static struct platform_driver tegra_kbc_driver = {
775
.probe = tegra_kbc_probe,
776
.remove = __devexit_p(tegra_kbc_remove),
777
.driver = {
778
.name = "tegra-kbc",
779
.owner = THIS_MODULE,
780
.pm = &tegra_kbc_pm_ops,
781
},
782
};
783
784
static void __exit tegra_kbc_exit(void)
785
{
786
platform_driver_unregister(&tegra_kbc_driver);
787
}
788
module_exit(tegra_kbc_exit);
789
790
static int __init tegra_kbc_init(void)
791
{
792
return platform_driver_register(&tegra_kbc_driver);
793
}
794
module_init(tegra_kbc_init);
795
796
MODULE_LICENSE("GPL");
797
MODULE_AUTHOR("Rakesh Iyer <[email protected]>");
798
MODULE_DESCRIPTION("Tegra matrix keyboard controller driver");
799
MODULE_ALIAS("platform:tegra-kbc");
800
801