Path: blob/master/drivers/media/common/tuners/max2165.c
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/*1* Driver for Maxim MAX2165 silicon tuner2*3* Copyright (c) 2009 David T. L. Wong <[email protected]>4*5* This program is free software; you can redistribute it and/or modify6* it under the terms of the GNU General Public License as published by7* the Free Software Foundation; either version 2 of the License, or8* (at your option) any later version.9*10* This program is distributed in the hope that it will be useful,11* but WITHOUT ANY WARRANTY; without even the implied warranty of12* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the13*14* GNU General Public License for more details.15*16* You should have received a copy of the GNU General Public License17* along with this program; if not, write to the Free Software18* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.19*/2021#include <linux/module.h>22#include <linux/moduleparam.h>23#include <linux/videodev2.h>24#include <linux/delay.h>25#include <linux/dvb/frontend.h>26#include <linux/i2c.h>27#include <linux/slab.h>2829#include "dvb_frontend.h"3031#include "max2165.h"32#include "max2165_priv.h"33#include "tuner-i2c.h"3435#define dprintk(args...) \36do { \37if (debug) \38printk(KERN_DEBUG "max2165: " args); \39} while (0)4041static int debug;42module_param(debug, int, 0644);43MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");4445static int max2165_write_reg(struct max2165_priv *priv, u8 reg, u8 data)46{47int ret;48u8 buf[] = { reg, data };49struct i2c_msg msg = { .flags = 0, .buf = buf, .len = 2 };5051msg.addr = priv->config->i2c_address;5253if (debug >= 2)54dprintk("%s: reg=0x%02X, data=0x%02X\n", __func__, reg, data);5556ret = i2c_transfer(priv->i2c, &msg, 1);5758if (ret != 1)59dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n",60__func__, reg, data, ret);6162return (ret != 1) ? -EIO : 0;63}6465static int max2165_read_reg(struct max2165_priv *priv, u8 reg, u8 *p_data)66{67int ret;68u8 dev_addr = priv->config->i2c_address;6970u8 b0[] = { reg };71u8 b1[] = { 0 };72struct i2c_msg msg[] = {73{ .addr = dev_addr, .flags = 0, .buf = b0, .len = 1 },74{ .addr = dev_addr, .flags = I2C_M_RD, .buf = b1, .len = 1 },75};7677ret = i2c_transfer(priv->i2c, msg, 2);78if (ret != 2) {79dprintk("%s: error reg=0x%x, ret=%i\n", __func__, reg, ret);80return -EIO;81}8283*p_data = b1[0];84if (debug >= 2)85dprintk("%s: reg=0x%02X, data=0x%02X\n",86__func__, reg, b1[0]);87return 0;88}8990static int max2165_mask_write_reg(struct max2165_priv *priv, u8 reg,91u8 mask, u8 data)92{93int ret;94u8 v;9596data &= mask;97ret = max2165_read_reg(priv, reg, &v);98if (ret != 0)99return ret;100v &= ~mask;101v |= data;102ret = max2165_write_reg(priv, reg, v);103104return ret;105}106107static int max2165_read_rom_table(struct max2165_priv *priv)108{109u8 dat[3];110int i;111112for (i = 0; i < 3; i++) {113max2165_write_reg(priv, REG_ROM_TABLE_ADDR, i + 1);114max2165_read_reg(priv, REG_ROM_TABLE_DATA, &dat[i]);115}116117priv->tf_ntch_low_cfg = dat[0] >> 4;118priv->tf_ntch_hi_cfg = dat[0] & 0x0F;119priv->tf_balun_low_ref = dat[1] & 0x0F;120priv->tf_balun_hi_ref = dat[1] >> 4;121priv->bb_filter_7mhz_cfg = dat[2] & 0x0F;122priv->bb_filter_8mhz_cfg = dat[2] >> 4;123124dprintk("tf_ntch_low_cfg = 0x%X\n", priv->tf_ntch_low_cfg);125dprintk("tf_ntch_hi_cfg = 0x%X\n", priv->tf_ntch_hi_cfg);126dprintk("tf_balun_low_ref = 0x%X\n", priv->tf_balun_low_ref);127dprintk("tf_balun_hi_ref = 0x%X\n", priv->tf_balun_hi_ref);128dprintk("bb_filter_7mhz_cfg = 0x%X\n", priv->bb_filter_7mhz_cfg);129dprintk("bb_filter_8mhz_cfg = 0x%X\n", priv->bb_filter_8mhz_cfg);130131return 0;132}133134static int max2165_set_osc(struct max2165_priv *priv, u8 osc /*MHz*/)135{136u8 v;137138v = (osc / 2);139if (v == 2)140v = 0x7;141else142v -= 8;143144max2165_mask_write_reg(priv, REG_PLL_CFG, 0x07, v);145146return 0;147}148149static int max2165_set_bandwidth(struct max2165_priv *priv, u32 bw)150{151u8 val;152153if (bw == BANDWIDTH_8_MHZ)154val = priv->bb_filter_8mhz_cfg;155else156val = priv->bb_filter_7mhz_cfg;157158max2165_mask_write_reg(priv, REG_BASEBAND_CTRL, 0xF0, val << 4);159160return 0;161}162163int fixpt_div32(u32 dividend, u32 divisor, u32 *quotient, u32 *fraction)164{165u32 remainder;166u32 q, f = 0;167int i;168169if (0 == divisor)170return -1;171172q = dividend / divisor;173remainder = dividend - q * divisor;174175for (i = 0; i < 31; i++) {176remainder <<= 1;177if (remainder >= divisor) {178f += 1;179remainder -= divisor;180}181f <<= 1;182}183184*quotient = q;185*fraction = f;186187return 0;188}189190static int max2165_set_rf(struct max2165_priv *priv, u32 freq)191{192u8 tf;193u8 tf_ntch;194u32 t;195u32 quotient, fraction;196197/* Set PLL divider according to RF frequency */198fixpt_div32(freq / 1000, priv->config->osc_clk * 1000,199"ient, &fraction);200201/* 20-bit fraction */202fraction >>= 12;203204max2165_write_reg(priv, REG_NDIV_INT, quotient);205max2165_mask_write_reg(priv, REG_NDIV_FRAC2, 0x0F, fraction >> 16);206max2165_write_reg(priv, REG_NDIV_FRAC1, fraction >> 8);207max2165_write_reg(priv, REG_NDIV_FRAC0, fraction);208209/* Norch Filter */210tf_ntch = (freq < 725000000) ?211priv->tf_ntch_low_cfg : priv->tf_ntch_hi_cfg;212213/* Tracking filter balun */214t = priv->tf_balun_low_ref;215t += (priv->tf_balun_hi_ref - priv->tf_balun_low_ref)216* (freq / 1000 - 470000) / (780000 - 470000);217218tf = t;219dprintk("tf = %X\n", tf);220tf |= tf_ntch << 4;221222max2165_write_reg(priv, REG_TRACK_FILTER, tf);223224return 0;225}226227static void max2165_debug_status(struct max2165_priv *priv)228{229u8 status, autotune;230u8 auto_vco_success, auto_vco_active;231u8 pll_locked;232u8 dc_offset_low, dc_offset_hi;233u8 signal_lv_over_threshold;234u8 vco, vco_sub_band, adc;235236max2165_read_reg(priv, REG_STATUS, &status);237max2165_read_reg(priv, REG_AUTOTUNE, &autotune);238239auto_vco_success = (status >> 6) & 0x01;240auto_vco_active = (status >> 5) & 0x01;241pll_locked = (status >> 4) & 0x01;242dc_offset_low = (status >> 3) & 0x01;243dc_offset_hi = (status >> 2) & 0x01;244signal_lv_over_threshold = status & 0x01;245246vco = autotune >> 6;247vco_sub_band = (autotune >> 3) & 0x7;248adc = autotune & 0x7;249250dprintk("auto VCO active: %d, auto VCO success: %d\n",251auto_vco_active, auto_vco_success);252dprintk("PLL locked: %d\n", pll_locked);253dprintk("DC offset low: %d, DC offset high: %d\n",254dc_offset_low, dc_offset_hi);255dprintk("Signal lvl over threshold: %d\n", signal_lv_over_threshold);256dprintk("VCO: %d, VCO Sub-band: %d, ADC: %d\n", vco, vco_sub_band, adc);257}258259static int max2165_set_params(struct dvb_frontend *fe,260struct dvb_frontend_parameters *params)261{262struct max2165_priv *priv = fe->tuner_priv;263int ret;264265dprintk("%s() frequency=%d (Hz)\n", __func__, params->frequency);266if (fe->ops.info.type == FE_ATSC) {267return -EINVAL;268} else if (fe->ops.info.type == FE_OFDM) {269dprintk("%s() OFDM\n", __func__);270switch (params->u.ofdm.bandwidth) {271case BANDWIDTH_6_MHZ:272return -EINVAL;273case BANDWIDTH_7_MHZ:274case BANDWIDTH_8_MHZ:275priv->frequency = params->frequency;276priv->bandwidth = params->u.ofdm.bandwidth;277break;278default:279printk(KERN_ERR "MAX2165 bandwidth not set!\n");280return -EINVAL;281}282} else {283printk(KERN_ERR "MAX2165 modulation type not supported!\n");284return -EINVAL;285}286287dprintk("%s() frequency=%d\n", __func__, priv->frequency);288289if (fe->ops.i2c_gate_ctrl)290fe->ops.i2c_gate_ctrl(fe, 1);291max2165_set_bandwidth(priv, priv->bandwidth);292ret = max2165_set_rf(priv, priv->frequency);293mdelay(50);294max2165_debug_status(priv);295if (fe->ops.i2c_gate_ctrl)296fe->ops.i2c_gate_ctrl(fe, 0);297298if (ret != 0)299return -EREMOTEIO;300301return 0;302}303304static int max2165_get_frequency(struct dvb_frontend *fe, u32 *freq)305{306struct max2165_priv *priv = fe->tuner_priv;307dprintk("%s()\n", __func__);308*freq = priv->frequency;309return 0;310}311312static int max2165_get_bandwidth(struct dvb_frontend *fe, u32 *bw)313{314struct max2165_priv *priv = fe->tuner_priv;315dprintk("%s()\n", __func__);316317*bw = priv->bandwidth;318return 0;319}320321static int max2165_get_status(struct dvb_frontend *fe, u32 *status)322{323struct max2165_priv *priv = fe->tuner_priv;324u16 lock_status = 0;325326dprintk("%s()\n", __func__);327328if (fe->ops.i2c_gate_ctrl)329fe->ops.i2c_gate_ctrl(fe, 1);330331max2165_debug_status(priv);332*status = lock_status;333334if (fe->ops.i2c_gate_ctrl)335fe->ops.i2c_gate_ctrl(fe, 0);336337return 0;338}339340static int max2165_sleep(struct dvb_frontend *fe)341{342dprintk("%s()\n", __func__);343return 0;344}345346static int max2165_init(struct dvb_frontend *fe)347{348struct max2165_priv *priv = fe->tuner_priv;349dprintk("%s()\n", __func__);350351if (fe->ops.i2c_gate_ctrl)352fe->ops.i2c_gate_ctrl(fe, 1);353354/* Setup initial values */355/* Fractional Mode on */356max2165_write_reg(priv, REG_NDIV_FRAC2, 0x18);357/* LNA on */358max2165_write_reg(priv, REG_LNA, 0x01);359max2165_write_reg(priv, REG_PLL_CFG, 0x7A);360max2165_write_reg(priv, REG_TEST, 0x08);361max2165_write_reg(priv, REG_SHUTDOWN, 0x40);362max2165_write_reg(priv, REG_VCO_CTRL, 0x84);363max2165_write_reg(priv, REG_BASEBAND_CTRL, 0xC3);364max2165_write_reg(priv, REG_DC_OFFSET_CTRL, 0x75);365max2165_write_reg(priv, REG_DC_OFFSET_DAC, 0x00);366max2165_write_reg(priv, REG_ROM_TABLE_ADDR, 0x00);367368max2165_set_osc(priv, priv->config->osc_clk);369370max2165_read_rom_table(priv);371372max2165_set_bandwidth(priv, BANDWIDTH_8_MHZ);373374if (fe->ops.i2c_gate_ctrl)375fe->ops.i2c_gate_ctrl(fe, 0);376377return 0;378}379380static int max2165_release(struct dvb_frontend *fe)381{382struct max2165_priv *priv = fe->tuner_priv;383dprintk("%s()\n", __func__);384385kfree(priv);386fe->tuner_priv = NULL;387388return 0;389}390391static const struct dvb_tuner_ops max2165_tuner_ops = {392.info = {393.name = "Maxim MAX2165",394.frequency_min = 470000000,395.frequency_max = 780000000,396.frequency_step = 50000,397},398399.release = max2165_release,400.init = max2165_init,401.sleep = max2165_sleep,402403.set_params = max2165_set_params,404.set_analog_params = NULL,405.get_frequency = max2165_get_frequency,406.get_bandwidth = max2165_get_bandwidth,407.get_status = max2165_get_status408};409410struct dvb_frontend *max2165_attach(struct dvb_frontend *fe,411struct i2c_adapter *i2c,412struct max2165_config *cfg)413{414struct max2165_priv *priv = NULL;415416dprintk("%s(%d-%04x)\n", __func__,417i2c ? i2c_adapter_id(i2c) : -1,418cfg ? cfg->i2c_address : -1);419420priv = kzalloc(sizeof(struct max2165_priv), GFP_KERNEL);421if (priv == NULL)422return NULL;423424memcpy(&fe->ops.tuner_ops, &max2165_tuner_ops,425sizeof(struct dvb_tuner_ops));426427priv->config = cfg;428priv->i2c = i2c;429fe->tuner_priv = priv;430431max2165_init(fe);432max2165_debug_status(priv);433434return fe;435}436EXPORT_SYMBOL(max2165_attach);437438MODULE_AUTHOR("David T. L. Wong <[email protected]>");439MODULE_DESCRIPTION("Maxim MAX2165 silicon tuner driver");440MODULE_LICENSE("GPL");441442443