Path: blob/master/drivers/media/common/tuners/mxl5007t.c
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/*1* mxl5007t.c - driver for the MaxLinear MxL5007T silicon tuner2*3* Copyright (C) 2008, 2009 Michael Krufky <[email protected]>4*5* This program is free software; you can redistribute it and/or modify6* it under the terms of the GNU General Public License as published by7* the Free Software Foundation; either version 2 of the License, or8* (at your option) any later version.9*10* This program is distributed in the hope that it will be useful,11* but WITHOUT ANY WARRANTY; without even the implied warranty of12* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the13* GNU General Public License for more details.14*15* You should have received a copy of the GNU General Public License16* along with this program; if not, write to the Free Software17* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.18*/1920#include <linux/i2c.h>21#include <linux/types.h>22#include <linux/videodev2.h>23#include "tuner-i2c.h"24#include "mxl5007t.h"2526static DEFINE_MUTEX(mxl5007t_list_mutex);27static LIST_HEAD(hybrid_tuner_instance_list);2829static int mxl5007t_debug;30module_param_named(debug, mxl5007t_debug, int, 0644);31MODULE_PARM_DESC(debug, "set debug level");3233/* ------------------------------------------------------------------------- */3435#define mxl_printk(kern, fmt, arg...) \36printk(kern "%s: " fmt "\n", __func__, ##arg)3738#define mxl_err(fmt, arg...) \39mxl_printk(KERN_ERR, "%d: " fmt, __LINE__, ##arg)4041#define mxl_warn(fmt, arg...) \42mxl_printk(KERN_WARNING, fmt, ##arg)4344#define mxl_info(fmt, arg...) \45mxl_printk(KERN_INFO, fmt, ##arg)4647#define mxl_debug(fmt, arg...) \48({ \49if (mxl5007t_debug) \50mxl_printk(KERN_DEBUG, fmt, ##arg); \51})5253#define mxl_fail(ret) \54({ \55int __ret; \56__ret = (ret < 0); \57if (__ret) \58mxl_printk(KERN_ERR, "error %d on line %d", \59ret, __LINE__); \60__ret; \61})6263/* ------------------------------------------------------------------------- */6465#define MHz 10000006667enum mxl5007t_mode {68MxL_MODE_ISDBT = 0,69MxL_MODE_DVBT = 1,70MxL_MODE_ATSC = 2,71MxL_MODE_CABLE = 0x10,72};7374enum mxl5007t_chip_version {75MxL_UNKNOWN_ID = 0x00,76MxL_5007_V1_F1 = 0x11,77MxL_5007_V1_F2 = 0x12,78MxL_5007_V4 = 0x14,79MxL_5007_V2_100_F1 = 0x21,80MxL_5007_V2_100_F2 = 0x22,81MxL_5007_V2_200_F1 = 0x23,82MxL_5007_V2_200_F2 = 0x24,83};8485struct reg_pair_t {86u8 reg;87u8 val;88};8990/* ------------------------------------------------------------------------- */9192static struct reg_pair_t init_tab[] = {93{ 0x02, 0x06 },94{ 0x03, 0x48 },95{ 0x05, 0x04 },96{ 0x06, 0x10 },97{ 0x2e, 0x15 }, /* OVERRIDE */98{ 0x30, 0x10 }, /* OVERRIDE */99{ 0x45, 0x58 }, /* OVERRIDE */100{ 0x48, 0x19 }, /* OVERRIDE */101{ 0x52, 0x03 }, /* OVERRIDE */102{ 0x53, 0x44 }, /* OVERRIDE */103{ 0x6a, 0x4b }, /* OVERRIDE */104{ 0x76, 0x00 }, /* OVERRIDE */105{ 0x78, 0x18 }, /* OVERRIDE */106{ 0x7a, 0x17 }, /* OVERRIDE */107{ 0x85, 0x06 }, /* OVERRIDE */108{ 0x01, 0x01 }, /* TOP_MASTER_ENABLE */109{ 0, 0 }110};111112static struct reg_pair_t init_tab_cable[] = {113{ 0x02, 0x06 },114{ 0x03, 0x48 },115{ 0x05, 0x04 },116{ 0x06, 0x10 },117{ 0x09, 0x3f },118{ 0x0a, 0x3f },119{ 0x0b, 0x3f },120{ 0x2e, 0x15 }, /* OVERRIDE */121{ 0x30, 0x10 }, /* OVERRIDE */122{ 0x45, 0x58 }, /* OVERRIDE */123{ 0x48, 0x19 }, /* OVERRIDE */124{ 0x52, 0x03 }, /* OVERRIDE */125{ 0x53, 0x44 }, /* OVERRIDE */126{ 0x6a, 0x4b }, /* OVERRIDE */127{ 0x76, 0x00 }, /* OVERRIDE */128{ 0x78, 0x18 }, /* OVERRIDE */129{ 0x7a, 0x17 }, /* OVERRIDE */130{ 0x85, 0x06 }, /* OVERRIDE */131{ 0x01, 0x01 }, /* TOP_MASTER_ENABLE */132{ 0, 0 }133};134135/* ------------------------------------------------------------------------- */136137static struct reg_pair_t reg_pair_rftune[] = {138{ 0x0f, 0x00 }, /* abort tune */139{ 0x0c, 0x15 },140{ 0x0d, 0x40 },141{ 0x0e, 0x0e },142{ 0x1f, 0x87 }, /* OVERRIDE */143{ 0x20, 0x1f }, /* OVERRIDE */144{ 0x21, 0x87 }, /* OVERRIDE */145{ 0x22, 0x1f }, /* OVERRIDE */146{ 0x80, 0x01 }, /* freq dependent */147{ 0x0f, 0x01 }, /* start tune */148{ 0, 0 }149};150151/* ------------------------------------------------------------------------- */152153struct mxl5007t_state {154struct list_head hybrid_tuner_instance_list;155struct tuner_i2c_props i2c_props;156157struct mutex lock;158159struct mxl5007t_config *config;160161enum mxl5007t_chip_version chip_id;162163struct reg_pair_t tab_init[ARRAY_SIZE(init_tab)];164struct reg_pair_t tab_init_cable[ARRAY_SIZE(init_tab_cable)];165struct reg_pair_t tab_rftune[ARRAY_SIZE(reg_pair_rftune)];166167u32 frequency;168u32 bandwidth;169};170171/* ------------------------------------------------------------------------- */172173/* called by _init and _rftun to manipulate the register arrays */174175static void set_reg_bits(struct reg_pair_t *reg_pair, u8 reg, u8 mask, u8 val)176{177unsigned int i = 0;178179while (reg_pair[i].reg || reg_pair[i].val) {180if (reg_pair[i].reg == reg) {181reg_pair[i].val &= ~mask;182reg_pair[i].val |= val;183}184i++;185186}187return;188}189190static void copy_reg_bits(struct reg_pair_t *reg_pair1,191struct reg_pair_t *reg_pair2)192{193unsigned int i, j;194195i = j = 0;196197while (reg_pair1[i].reg || reg_pair1[i].val) {198while (reg_pair2[j].reg || reg_pair2[j].val) {199if (reg_pair1[i].reg != reg_pair2[j].reg) {200j++;201continue;202}203reg_pair2[j].val = reg_pair1[i].val;204break;205}206i++;207}208return;209}210211/* ------------------------------------------------------------------------- */212213static void mxl5007t_set_mode_bits(struct mxl5007t_state *state,214enum mxl5007t_mode mode,215s32 if_diff_out_level)216{217switch (mode) {218case MxL_MODE_ATSC:219set_reg_bits(state->tab_init, 0x06, 0x1f, 0x12);220break;221case MxL_MODE_DVBT:222set_reg_bits(state->tab_init, 0x06, 0x1f, 0x11);223break;224case MxL_MODE_ISDBT:225set_reg_bits(state->tab_init, 0x06, 0x1f, 0x10);226break;227case MxL_MODE_CABLE:228set_reg_bits(state->tab_init_cable, 0x09, 0xff, 0xc1);229set_reg_bits(state->tab_init_cable, 0x0a, 0xff,2308 - if_diff_out_level);231set_reg_bits(state->tab_init_cable, 0x0b, 0xff, 0x17);232break;233default:234mxl_fail(-EINVAL);235}236return;237}238239static void mxl5007t_set_if_freq_bits(struct mxl5007t_state *state,240enum mxl5007t_if_freq if_freq,241int invert_if)242{243u8 val;244245switch (if_freq) {246case MxL_IF_4_MHZ:247val = 0x00;248break;249case MxL_IF_4_5_MHZ:250val = 0x02;251break;252case MxL_IF_4_57_MHZ:253val = 0x03;254break;255case MxL_IF_5_MHZ:256val = 0x04;257break;258case MxL_IF_5_38_MHZ:259val = 0x05;260break;261case MxL_IF_6_MHZ:262val = 0x06;263break;264case MxL_IF_6_28_MHZ:265val = 0x07;266break;267case MxL_IF_9_1915_MHZ:268val = 0x08;269break;270case MxL_IF_35_25_MHZ:271val = 0x09;272break;273case MxL_IF_36_15_MHZ:274val = 0x0a;275break;276case MxL_IF_44_MHZ:277val = 0x0b;278break;279default:280mxl_fail(-EINVAL);281return;282}283set_reg_bits(state->tab_init, 0x02, 0x0f, val);284285/* set inverted IF or normal IF */286set_reg_bits(state->tab_init, 0x02, 0x10, invert_if ? 0x10 : 0x00);287288return;289}290291static void mxl5007t_set_xtal_freq_bits(struct mxl5007t_state *state,292enum mxl5007t_xtal_freq xtal_freq)293{294switch (xtal_freq) {295case MxL_XTAL_16_MHZ:296/* select xtal freq & ref freq */297set_reg_bits(state->tab_init, 0x03, 0xf0, 0x00);298set_reg_bits(state->tab_init, 0x05, 0x0f, 0x00);299break;300case MxL_XTAL_20_MHZ:301set_reg_bits(state->tab_init, 0x03, 0xf0, 0x10);302set_reg_bits(state->tab_init, 0x05, 0x0f, 0x01);303break;304case MxL_XTAL_20_25_MHZ:305set_reg_bits(state->tab_init, 0x03, 0xf0, 0x20);306set_reg_bits(state->tab_init, 0x05, 0x0f, 0x02);307break;308case MxL_XTAL_20_48_MHZ:309set_reg_bits(state->tab_init, 0x03, 0xf0, 0x30);310set_reg_bits(state->tab_init, 0x05, 0x0f, 0x03);311break;312case MxL_XTAL_24_MHZ:313set_reg_bits(state->tab_init, 0x03, 0xf0, 0x40);314set_reg_bits(state->tab_init, 0x05, 0x0f, 0x04);315break;316case MxL_XTAL_25_MHZ:317set_reg_bits(state->tab_init, 0x03, 0xf0, 0x50);318set_reg_bits(state->tab_init, 0x05, 0x0f, 0x05);319break;320case MxL_XTAL_25_14_MHZ:321set_reg_bits(state->tab_init, 0x03, 0xf0, 0x60);322set_reg_bits(state->tab_init, 0x05, 0x0f, 0x06);323break;324case MxL_XTAL_27_MHZ:325set_reg_bits(state->tab_init, 0x03, 0xf0, 0x70);326set_reg_bits(state->tab_init, 0x05, 0x0f, 0x07);327break;328case MxL_XTAL_28_8_MHZ:329set_reg_bits(state->tab_init, 0x03, 0xf0, 0x80);330set_reg_bits(state->tab_init, 0x05, 0x0f, 0x08);331break;332case MxL_XTAL_32_MHZ:333set_reg_bits(state->tab_init, 0x03, 0xf0, 0x90);334set_reg_bits(state->tab_init, 0x05, 0x0f, 0x09);335break;336case MxL_XTAL_40_MHZ:337set_reg_bits(state->tab_init, 0x03, 0xf0, 0xa0);338set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0a);339break;340case MxL_XTAL_44_MHZ:341set_reg_bits(state->tab_init, 0x03, 0xf0, 0xb0);342set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0b);343break;344case MxL_XTAL_48_MHZ:345set_reg_bits(state->tab_init, 0x03, 0xf0, 0xc0);346set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0c);347break;348case MxL_XTAL_49_3811_MHZ:349set_reg_bits(state->tab_init, 0x03, 0xf0, 0xd0);350set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0d);351break;352default:353mxl_fail(-EINVAL);354return;355}356357return;358}359360static struct reg_pair_t *mxl5007t_calc_init_regs(struct mxl5007t_state *state,361enum mxl5007t_mode mode)362{363struct mxl5007t_config *cfg = state->config;364365memcpy(&state->tab_init, &init_tab, sizeof(init_tab));366memcpy(&state->tab_init_cable, &init_tab_cable, sizeof(init_tab_cable));367368mxl5007t_set_mode_bits(state, mode, cfg->if_diff_out_level);369mxl5007t_set_if_freq_bits(state, cfg->if_freq_hz, cfg->invert_if);370mxl5007t_set_xtal_freq_bits(state, cfg->xtal_freq_hz);371372set_reg_bits(state->tab_init, 0x04, 0x01, cfg->loop_thru_enable);373set_reg_bits(state->tab_init, 0x03, 0x08, cfg->clk_out_enable << 3);374set_reg_bits(state->tab_init, 0x03, 0x07, cfg->clk_out_amp);375376if (mode >= MxL_MODE_CABLE) {377copy_reg_bits(state->tab_init, state->tab_init_cable);378return state->tab_init_cable;379} else380return state->tab_init;381}382383/* ------------------------------------------------------------------------- */384385enum mxl5007t_bw_mhz {386MxL_BW_6MHz = 6,387MxL_BW_7MHz = 7,388MxL_BW_8MHz = 8,389};390391static void mxl5007t_set_bw_bits(struct mxl5007t_state *state,392enum mxl5007t_bw_mhz bw)393{394u8 val;395396switch (bw) {397case MxL_BW_6MHz:398val = 0x15; /* set DIG_MODEINDEX, DIG_MODEINDEX_A,399* and DIG_MODEINDEX_CSF */400break;401case MxL_BW_7MHz:402val = 0x2a;403break;404case MxL_BW_8MHz:405val = 0x3f;406break;407default:408mxl_fail(-EINVAL);409return;410}411set_reg_bits(state->tab_rftune, 0x0c, 0x3f, val);412413return;414}415416static struct417reg_pair_t *mxl5007t_calc_rf_tune_regs(struct mxl5007t_state *state,418u32 rf_freq, enum mxl5007t_bw_mhz bw)419{420u32 dig_rf_freq = 0;421u32 temp;422u32 frac_divider = 1000000;423unsigned int i;424425memcpy(&state->tab_rftune, ®_pair_rftune, sizeof(reg_pair_rftune));426427mxl5007t_set_bw_bits(state, bw);428429/* Convert RF frequency into 16 bits =>430* 10 bit integer (MHz) + 6 bit fraction */431dig_rf_freq = rf_freq / MHz;432433temp = rf_freq % MHz;434435for (i = 0; i < 6; i++) {436dig_rf_freq <<= 1;437frac_divider /= 2;438if (temp > frac_divider) {439temp -= frac_divider;440dig_rf_freq++;441}442}443444/* add to have shift center point by 7.8124 kHz */445if (temp > 7812)446dig_rf_freq++;447448set_reg_bits(state->tab_rftune, 0x0d, 0xff, (u8) dig_rf_freq);449set_reg_bits(state->tab_rftune, 0x0e, 0xff, (u8) (dig_rf_freq >> 8));450451if (rf_freq >= 333000000)452set_reg_bits(state->tab_rftune, 0x80, 0x40, 0x40);453454return state->tab_rftune;455}456457/* ------------------------------------------------------------------------- */458459static int mxl5007t_write_reg(struct mxl5007t_state *state, u8 reg, u8 val)460{461u8 buf[] = { reg, val };462struct i2c_msg msg = { .addr = state->i2c_props.addr, .flags = 0,463.buf = buf, .len = 2 };464int ret;465466ret = i2c_transfer(state->i2c_props.adap, &msg, 1);467if (ret != 1) {468mxl_err("failed!");469return -EREMOTEIO;470}471return 0;472}473474static int mxl5007t_write_regs(struct mxl5007t_state *state,475struct reg_pair_t *reg_pair)476{477unsigned int i = 0;478int ret = 0;479480while ((ret == 0) && (reg_pair[i].reg || reg_pair[i].val)) {481ret = mxl5007t_write_reg(state,482reg_pair[i].reg, reg_pair[i].val);483i++;484}485return ret;486}487488static int mxl5007t_read_reg(struct mxl5007t_state *state, u8 reg, u8 *val)489{490struct i2c_msg msg[] = {491{ .addr = state->i2c_props.addr, .flags = 0,492.buf = ®, .len = 1 },493{ .addr = state->i2c_props.addr, .flags = I2C_M_RD,494.buf = val, .len = 1 },495};496int ret;497498ret = i2c_transfer(state->i2c_props.adap, msg, 2);499if (ret != 2) {500mxl_err("failed!");501return -EREMOTEIO;502}503return 0;504}505506static int mxl5007t_soft_reset(struct mxl5007t_state *state)507{508u8 d = 0xff;509struct i2c_msg msg = {510.addr = state->i2c_props.addr, .flags = 0,511.buf = &d, .len = 1512};513int ret = i2c_transfer(state->i2c_props.adap, &msg, 1);514515if (ret != 1) {516mxl_err("failed!");517return -EREMOTEIO;518}519return 0;520}521522static int mxl5007t_tuner_init(struct mxl5007t_state *state,523enum mxl5007t_mode mode)524{525struct reg_pair_t *init_regs;526int ret;527528ret = mxl5007t_soft_reset(state);529if (mxl_fail(ret))530goto fail;531532/* calculate initialization reg array */533init_regs = mxl5007t_calc_init_regs(state, mode);534535ret = mxl5007t_write_regs(state, init_regs);536if (mxl_fail(ret))537goto fail;538mdelay(1);539fail:540return ret;541}542543static int mxl5007t_tuner_rf_tune(struct mxl5007t_state *state, u32 rf_freq_hz,544enum mxl5007t_bw_mhz bw)545{546struct reg_pair_t *rf_tune_regs;547int ret;548549/* calculate channel change reg array */550rf_tune_regs = mxl5007t_calc_rf_tune_regs(state, rf_freq_hz, bw);551552ret = mxl5007t_write_regs(state, rf_tune_regs);553if (mxl_fail(ret))554goto fail;555msleep(3);556fail:557return ret;558}559560/* ------------------------------------------------------------------------- */561562static int mxl5007t_synth_lock_status(struct mxl5007t_state *state,563int *rf_locked, int *ref_locked)564{565u8 d;566int ret;567568*rf_locked = 0;569*ref_locked = 0;570571ret = mxl5007t_read_reg(state, 0xd8, &d);572if (mxl_fail(ret))573goto fail;574575if ((d & 0x0c) == 0x0c)576*rf_locked = 1;577578if ((d & 0x03) == 0x03)579*ref_locked = 1;580fail:581return ret;582}583584/* ------------------------------------------------------------------------- */585586static int mxl5007t_get_status(struct dvb_frontend *fe, u32 *status)587{588struct mxl5007t_state *state = fe->tuner_priv;589int rf_locked, ref_locked, ret;590591*status = 0;592593if (fe->ops.i2c_gate_ctrl)594fe->ops.i2c_gate_ctrl(fe, 1);595596ret = mxl5007t_synth_lock_status(state, &rf_locked, &ref_locked);597if (mxl_fail(ret))598goto fail;599mxl_debug("%s%s", rf_locked ? "rf locked " : "",600ref_locked ? "ref locked" : "");601602if ((rf_locked) || (ref_locked))603*status |= TUNER_STATUS_LOCKED;604fail:605if (fe->ops.i2c_gate_ctrl)606fe->ops.i2c_gate_ctrl(fe, 0);607608return ret;609}610611/* ------------------------------------------------------------------------- */612613static int mxl5007t_set_params(struct dvb_frontend *fe,614struct dvb_frontend_parameters *params)615{616struct mxl5007t_state *state = fe->tuner_priv;617enum mxl5007t_bw_mhz bw;618enum mxl5007t_mode mode;619int ret;620u32 freq = params->frequency;621622if (fe->ops.info.type == FE_ATSC) {623switch (params->u.vsb.modulation) {624case VSB_8:625case VSB_16:626mode = MxL_MODE_ATSC;627break;628case QAM_64:629case QAM_256:630mode = MxL_MODE_CABLE;631break;632default:633mxl_err("modulation not set!");634return -EINVAL;635}636bw = MxL_BW_6MHz;637} else if (fe->ops.info.type == FE_OFDM) {638switch (params->u.ofdm.bandwidth) {639case BANDWIDTH_6_MHZ:640bw = MxL_BW_6MHz;641break;642case BANDWIDTH_7_MHZ:643bw = MxL_BW_7MHz;644break;645case BANDWIDTH_8_MHZ:646bw = MxL_BW_8MHz;647break;648default:649mxl_err("bandwidth not set!");650return -EINVAL;651}652mode = MxL_MODE_DVBT;653} else {654mxl_err("modulation type not supported!");655return -EINVAL;656}657658if (fe->ops.i2c_gate_ctrl)659fe->ops.i2c_gate_ctrl(fe, 1);660661mutex_lock(&state->lock);662663ret = mxl5007t_tuner_init(state, mode);664if (mxl_fail(ret))665goto fail;666667ret = mxl5007t_tuner_rf_tune(state, freq, bw);668if (mxl_fail(ret))669goto fail;670671state->frequency = freq;672state->bandwidth = (fe->ops.info.type == FE_OFDM) ?673params->u.ofdm.bandwidth : 0;674fail:675mutex_unlock(&state->lock);676677if (fe->ops.i2c_gate_ctrl)678fe->ops.i2c_gate_ctrl(fe, 0);679680return ret;681}682683/* ------------------------------------------------------------------------- */684685static int mxl5007t_init(struct dvb_frontend *fe)686{687struct mxl5007t_state *state = fe->tuner_priv;688int ret;689690if (fe->ops.i2c_gate_ctrl)691fe->ops.i2c_gate_ctrl(fe, 1);692693/* wake from standby */694ret = mxl5007t_write_reg(state, 0x01, 0x01);695mxl_fail(ret);696697if (fe->ops.i2c_gate_ctrl)698fe->ops.i2c_gate_ctrl(fe, 0);699700return ret;701}702703static int mxl5007t_sleep(struct dvb_frontend *fe)704{705struct mxl5007t_state *state = fe->tuner_priv;706int ret;707708if (fe->ops.i2c_gate_ctrl)709fe->ops.i2c_gate_ctrl(fe, 1);710711/* enter standby mode */712ret = mxl5007t_write_reg(state, 0x01, 0x00);713mxl_fail(ret);714ret = mxl5007t_write_reg(state, 0x0f, 0x00);715mxl_fail(ret);716717if (fe->ops.i2c_gate_ctrl)718fe->ops.i2c_gate_ctrl(fe, 0);719720return ret;721}722723/* ------------------------------------------------------------------------- */724725static int mxl5007t_get_frequency(struct dvb_frontend *fe, u32 *frequency)726{727struct mxl5007t_state *state = fe->tuner_priv;728*frequency = state->frequency;729return 0;730}731732static int mxl5007t_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)733{734struct mxl5007t_state *state = fe->tuner_priv;735*bandwidth = state->bandwidth;736return 0;737}738739static int mxl5007t_release(struct dvb_frontend *fe)740{741struct mxl5007t_state *state = fe->tuner_priv;742743mutex_lock(&mxl5007t_list_mutex);744745if (state)746hybrid_tuner_release_state(state);747748mutex_unlock(&mxl5007t_list_mutex);749750fe->tuner_priv = NULL;751752return 0;753}754755/* ------------------------------------------------------------------------- */756757static struct dvb_tuner_ops mxl5007t_tuner_ops = {758.info = {759.name = "MaxLinear MxL5007T",760},761.init = mxl5007t_init,762.sleep = mxl5007t_sleep,763.set_params = mxl5007t_set_params,764.get_status = mxl5007t_get_status,765.get_frequency = mxl5007t_get_frequency,766.get_bandwidth = mxl5007t_get_bandwidth,767.release = mxl5007t_release,768};769770static int mxl5007t_get_chip_id(struct mxl5007t_state *state)771{772char *name;773int ret;774u8 id;775776ret = mxl5007t_read_reg(state, 0xd9, &id);777if (mxl_fail(ret))778goto fail;779780switch (id) {781case MxL_5007_V1_F1:782name = "MxL5007.v1.f1";783break;784case MxL_5007_V1_F2:785name = "MxL5007.v1.f2";786break;787case MxL_5007_V2_100_F1:788name = "MxL5007.v2.100.f1";789break;790case MxL_5007_V2_100_F2:791name = "MxL5007.v2.100.f2";792break;793case MxL_5007_V2_200_F1:794name = "MxL5007.v2.200.f1";795break;796case MxL_5007_V2_200_F2:797name = "MxL5007.v2.200.f2";798break;799case MxL_5007_V4:800name = "MxL5007T.v4";801break;802default:803name = "MxL5007T";804printk(KERN_WARNING "%s: unknown rev (%02x)\n", __func__, id);805id = MxL_UNKNOWN_ID;806}807state->chip_id = id;808mxl_info("%s detected @ %d-%04x", name,809i2c_adapter_id(state->i2c_props.adap),810state->i2c_props.addr);811return 0;812fail:813mxl_warn("unable to identify device @ %d-%04x",814i2c_adapter_id(state->i2c_props.adap),815state->i2c_props.addr);816817state->chip_id = MxL_UNKNOWN_ID;818return ret;819}820821struct dvb_frontend *mxl5007t_attach(struct dvb_frontend *fe,822struct i2c_adapter *i2c, u8 addr,823struct mxl5007t_config *cfg)824{825struct mxl5007t_state *state = NULL;826int instance, ret;827828mutex_lock(&mxl5007t_list_mutex);829instance = hybrid_tuner_request_state(struct mxl5007t_state, state,830hybrid_tuner_instance_list,831i2c, addr, "mxl5007t");832switch (instance) {833case 0:834goto fail;835case 1:836/* new tuner instance */837state->config = cfg;838839mutex_init(&state->lock);840841if (fe->ops.i2c_gate_ctrl)842fe->ops.i2c_gate_ctrl(fe, 1);843844ret = mxl5007t_get_chip_id(state);845846if (fe->ops.i2c_gate_ctrl)847fe->ops.i2c_gate_ctrl(fe, 0);848849/* check return value of mxl5007t_get_chip_id */850if (mxl_fail(ret))851goto fail;852break;853default:854/* existing tuner instance */855break;856}857fe->tuner_priv = state;858mutex_unlock(&mxl5007t_list_mutex);859860memcpy(&fe->ops.tuner_ops, &mxl5007t_tuner_ops,861sizeof(struct dvb_tuner_ops));862863return fe;864fail:865mutex_unlock(&mxl5007t_list_mutex);866867mxl5007t_release(fe);868return NULL;869}870EXPORT_SYMBOL_GPL(mxl5007t_attach);871MODULE_DESCRIPTION("MaxLinear MxL5007T Silicon IC tuner driver");872MODULE_AUTHOR("Michael Krufky <[email protected]>");873MODULE_LICENSE("GPL");874MODULE_VERSION("0.2");875876/*877* Overrides for Emacs so that we follow Linus's tabbing style.878* ---------------------------------------------------------------------------879* Local variables:880* c-basic-offset: 8881* End:882*/883884885