Path: blob/master/drivers/media/dvb/b2c2/flexcop-dma.c
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/*1* Linux driver for digital TV devices equipped with B2C2 FlexcopII(b)/III2* flexcop-dma.c - configuring and controlling the DMA of the FlexCop3* see flexcop.c for copyright information4*/5#include "flexcop.h"67int flexcop_dma_allocate(struct pci_dev *pdev,8struct flexcop_dma *dma, u32 size)9{10u8 *tcpu;11dma_addr_t tdma = 0;1213if (size % 2) {14err("dma buffersize has to be even.");15return -EINVAL;16}1718if ((tcpu = pci_alloc_consistent(pdev, size, &tdma)) != NULL) {19dma->pdev = pdev;20dma->cpu_addr0 = tcpu;21dma->dma_addr0 = tdma;22dma->cpu_addr1 = tcpu + size/2;23dma->dma_addr1 = tdma + size/2;24dma->size = size/2;25return 0;26}27return -ENOMEM;28}29EXPORT_SYMBOL(flexcop_dma_allocate);3031void flexcop_dma_free(struct flexcop_dma *dma)32{33pci_free_consistent(dma->pdev, dma->size*2,34dma->cpu_addr0, dma->dma_addr0);35memset(dma,0,sizeof(struct flexcop_dma));36}37EXPORT_SYMBOL(flexcop_dma_free);3839int flexcop_dma_config(struct flexcop_device *fc,40struct flexcop_dma *dma,41flexcop_dma_index_t dma_idx)42{43flexcop_ibi_value v0x0,v0x4,v0xc;44v0x0.raw = v0x4.raw = v0xc.raw = 0;4546v0x0.dma_0x0.dma_address0 = dma->dma_addr0 >> 2;47v0xc.dma_0xc.dma_address1 = dma->dma_addr1 >> 2;48v0x4.dma_0x4_write.dma_addr_size = dma->size / 4;4950if ((dma_idx & FC_DMA_1) == dma_idx) {51fc->write_ibi_reg(fc,dma1_000,v0x0);52fc->write_ibi_reg(fc,dma1_004,v0x4);53fc->write_ibi_reg(fc,dma1_00c,v0xc);54} else if ((dma_idx & FC_DMA_2) == dma_idx) {55fc->write_ibi_reg(fc,dma2_010,v0x0);56fc->write_ibi_reg(fc,dma2_014,v0x4);57fc->write_ibi_reg(fc,dma2_01c,v0xc);58} else {59err("either DMA1 or DMA2 can be configured within one "60"flexcop_dma_config call.");61return -EINVAL;62}6364return 0;65}66EXPORT_SYMBOL(flexcop_dma_config);6768/* start the DMA transfers, but not the DMA IRQs */69int flexcop_dma_xfer_control(struct flexcop_device *fc,70flexcop_dma_index_t dma_idx,71flexcop_dma_addr_index_t index,72int onoff)73{74flexcop_ibi_value v0x0,v0xc;75flexcop_ibi_register r0x0,r0xc;7677if ((dma_idx & FC_DMA_1) == dma_idx) {78r0x0 = dma1_000;79r0xc = dma1_00c;80} else if ((dma_idx & FC_DMA_2) == dma_idx) {81r0x0 = dma2_010;82r0xc = dma2_01c;83} else {84err("either transfer DMA1 or DMA2 can be started within one "85"flexcop_dma_xfer_control call.");86return -EINVAL;87}8889v0x0 = fc->read_ibi_reg(fc,r0x0);90v0xc = fc->read_ibi_reg(fc,r0xc);9192deb_rdump("reg: %03x: %x\n",r0x0,v0x0.raw);93deb_rdump("reg: %03x: %x\n",r0xc,v0xc.raw);9495if (index & FC_DMA_SUBADDR_0)96v0x0.dma_0x0.dma_0start = onoff;9798if (index & FC_DMA_SUBADDR_1)99v0xc.dma_0xc.dma_1start = onoff;100101fc->write_ibi_reg(fc,r0x0,v0x0);102fc->write_ibi_reg(fc,r0xc,v0xc);103104deb_rdump("reg: %03x: %x\n",r0x0,v0x0.raw);105deb_rdump("reg: %03x: %x\n",r0xc,v0xc.raw);106return 0;107}108EXPORT_SYMBOL(flexcop_dma_xfer_control);109110static int flexcop_dma_remap(struct flexcop_device *fc,111flexcop_dma_index_t dma_idx,112int onoff)113{114flexcop_ibi_register r = (dma_idx & FC_DMA_1) ? dma1_00c : dma2_01c;115flexcop_ibi_value v = fc->read_ibi_reg(fc,r);116deb_info("%s\n",__func__);117v.dma_0xc.remap_enable = onoff;118fc->write_ibi_reg(fc,r,v);119return 0;120}121122int flexcop_dma_control_size_irq(struct flexcop_device *fc,123flexcop_dma_index_t no,124int onoff)125{126flexcop_ibi_value v = fc->read_ibi_reg(fc,ctrl_208);127128if (no & FC_DMA_1)129v.ctrl_208.DMA1_IRQ_Enable_sig = onoff;130131if (no & FC_DMA_2)132v.ctrl_208.DMA2_IRQ_Enable_sig = onoff;133134fc->write_ibi_reg(fc,ctrl_208,v);135return 0;136}137EXPORT_SYMBOL(flexcop_dma_control_size_irq);138139int flexcop_dma_control_timer_irq(struct flexcop_device *fc,140flexcop_dma_index_t no,141int onoff)142{143flexcop_ibi_value v = fc->read_ibi_reg(fc,ctrl_208);144145if (no & FC_DMA_1)146v.ctrl_208.DMA1_Timer_Enable_sig = onoff;147148if (no & FC_DMA_2)149v.ctrl_208.DMA2_Timer_Enable_sig = onoff;150151fc->write_ibi_reg(fc,ctrl_208,v);152return 0;153}154EXPORT_SYMBOL(flexcop_dma_control_timer_irq);155156/* 1 cycles = 1.97 msec */157int flexcop_dma_config_timer(struct flexcop_device *fc,158flexcop_dma_index_t dma_idx, u8 cycles)159{160flexcop_ibi_register r = (dma_idx & FC_DMA_1) ? dma1_004 : dma2_014;161flexcop_ibi_value v = fc->read_ibi_reg(fc,r);162163flexcop_dma_remap(fc,dma_idx,0);164165deb_info("%s\n",__func__);166v.dma_0x4_write.dmatimer = cycles;167fc->write_ibi_reg(fc,r,v);168return 0;169}170EXPORT_SYMBOL(flexcop_dma_config_timer);171172173174