Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
awilliam
GitHub Repository: awilliam/linux-vfio
Path: blob/master/drivers/media/dvb/ttpci/av7110_hw.h
15111 views
1
#ifndef _AV7110_HW_H_
2
#define _AV7110_HW_H_
3
4
#include "av7110.h"
5
6
/* DEBI transfer mode defs */
7
8
#define DEBINOSWAP 0x000e0000
9
#define DEBISWAB 0x001e0000
10
#define DEBISWAP 0x002e0000
11
12
#define ARM_WAIT_FREE (HZ)
13
#define ARM_WAIT_SHAKE (HZ/5)
14
#define ARM_WAIT_OSD (HZ)
15
16
17
enum av7110_bootstate
18
{
19
BOOTSTATE_BUFFER_EMPTY = 0,
20
BOOTSTATE_BUFFER_FULL = 1,
21
BOOTSTATE_AV7110_BOOT_COMPLETE = 2
22
};
23
24
enum av7110_type_rec_play_format
25
{ RP_None,
26
AudioPES,
27
AudioMp2,
28
AudioPCM,
29
VideoPES,
30
AV_PES
31
};
32
33
enum av7110_osd_palette_type
34
{
35
NoPalet = 0, /* No palette */
36
Pal1Bit = 2, /* 2 colors for 1 Bit Palette */
37
Pal2Bit = 4, /* 4 colors for 2 bit palette */
38
Pal4Bit = 16, /* 16 colors for 4 bit palette */
39
Pal8Bit = 256 /* 256 colors for 16 bit palette */
40
};
41
42
/* switch defines */
43
#define SB_GPIO 3
44
#define SB_OFF SAA7146_GPIO_OUTLO /* SlowBlank off (TV-Mode) */
45
#define SB_ON SAA7146_GPIO_INPUT /* SlowBlank on (AV-Mode) */
46
#define SB_WIDE SAA7146_GPIO_OUTHI /* SlowBlank 6V (16/9-Mode) (not implemented) */
47
48
#define FB_GPIO 1
49
#define FB_OFF SAA7146_GPIO_LO /* FastBlank off (CVBS-Mode) */
50
#define FB_ON SAA7146_GPIO_OUTHI /* FastBlank on (RGB-Mode) */
51
#define FB_LOOP SAA7146_GPIO_INPUT /* FastBlank loop-through (PC graphics ???) */
52
53
enum av7110_video_output_mode
54
{
55
NO_OUT = 0, /* disable analog output */
56
CVBS_RGB_OUT = 1,
57
CVBS_YC_OUT = 2,
58
YC_OUT = 3
59
};
60
61
/* firmware internal msg q status: */
62
#define GPMQFull 0x0001 /* Main Message Queue Full */
63
#define GPMQOver 0x0002 /* Main Message Queue Overflow */
64
#define HPQFull 0x0004 /* High Priority Msg Queue Full */
65
#define HPQOver 0x0008
66
#define OSDQFull 0x0010 /* OSD Queue Full */
67
#define OSDQOver 0x0020
68
#define GPMQBusy 0x0040 /* Queue not empty, FW >= 261d */
69
#define HPQBusy 0x0080
70
#define OSDQBusy 0x0100
71
72
/* hw section filter flags */
73
#define SECTION_EIT 0x01
74
#define SECTION_SINGLE 0x00
75
#define SECTION_CYCLE 0x02
76
#define SECTION_CONTINUOS 0x04
77
#define SECTION_MODE 0x06
78
#define SECTION_IPMPE 0x0C /* size up to 4k */
79
#define SECTION_HIGH_SPEED 0x1C /* larger buffer */
80
#define DATA_PIPING_FLAG 0x20 /* for Data Piping Filter */
81
82
#define PBUFSIZE_NONE 0x0000
83
#define PBUFSIZE_1P 0x0100
84
#define PBUFSIZE_2P 0x0200
85
#define PBUFSIZE_1K 0x0300
86
#define PBUFSIZE_2K 0x0400
87
#define PBUFSIZE_4K 0x0500
88
#define PBUFSIZE_8K 0x0600
89
#define PBUFSIZE_16K 0x0700
90
#define PBUFSIZE_32K 0x0800
91
92
93
/* firmware command codes */
94
enum av7110_osd_command {
95
WCreate,
96
WDestroy,
97
WMoveD,
98
WMoveA,
99
WHide,
100
WTop,
101
DBox,
102
DLine,
103
DText,
104
Set_Font,
105
SetColor,
106
SetBlend,
107
SetWBlend,
108
SetCBlend,
109
SetNonBlend,
110
LoadBmp,
111
BlitBmp,
112
ReleaseBmp,
113
SetWTrans,
114
SetWNoTrans,
115
Set_Palette
116
};
117
118
enum av7110_pid_command {
119
MultiPID,
120
VideoPID,
121
AudioPID,
122
InitFilt,
123
FiltError,
124
NewVersion,
125
CacheError,
126
AddPIDFilter,
127
DelPIDFilter,
128
Scan,
129
SetDescr,
130
SetIR,
131
FlushTSQueue
132
};
133
134
enum av7110_mpeg_command {
135
SelAudChannels
136
};
137
138
enum av7110_audio_command {
139
AudioDAC,
140
CabADAC,
141
ON22K,
142
OFF22K,
143
MainSwitch,
144
ADSwitch,
145
SendDiSEqC,
146
SetRegister,
147
SpdifSwitch
148
};
149
150
enum av7110_request_command {
151
AudioState,
152
AudioBuffState,
153
VideoState1,
154
VideoState2,
155
VideoState3,
156
CrashCounter,
157
ReqVersion,
158
ReqVCXO,
159
ReqRegister,
160
ReqSecFilterError,
161
ReqSTC
162
};
163
164
enum av7110_encoder_command {
165
SetVidMode,
166
SetTestMode,
167
LoadVidCode,
168
SetMonitorType,
169
SetPanScanType,
170
SetFreezeMode,
171
SetWSSConfig
172
};
173
174
enum av7110_rec_play_state {
175
__Record,
176
__Stop,
177
__Play,
178
__Pause,
179
__Slow,
180
__FF_IP,
181
__Scan_I,
182
__Continue
183
};
184
185
enum av7110_fw_cmd_misc {
186
AV7110_FW_VIDEO_ZOOM = 1,
187
AV7110_FW_VIDEO_COMMAND,
188
AV7110_FW_AUDIO_COMMAND
189
};
190
191
enum av7110_command_type {
192
COMTYPE_NOCOM,
193
COMTYPE_PIDFILTER,
194
COMTYPE_MPEGDECODER,
195
COMTYPE_OSD,
196
COMTYPE_BMP,
197
COMTYPE_ENCODER,
198
COMTYPE_AUDIODAC,
199
COMTYPE_REQUEST,
200
COMTYPE_SYSTEM,
201
COMTYPE_REC_PLAY,
202
COMTYPE_COMMON_IF,
203
COMTYPE_PID_FILTER,
204
COMTYPE_PES,
205
COMTYPE_TS,
206
COMTYPE_VIDEO,
207
COMTYPE_AUDIO,
208
COMTYPE_CI_LL,
209
COMTYPE_MISC = 0x80
210
};
211
212
#define VID_NONE_PREF 0x00 /* No aspect ration processing preferred */
213
#define VID_PAN_SCAN_PREF 0x01 /* Pan and Scan Display preferred */
214
#define VID_VERT_COMP_PREF 0x02 /* Vertical compression display preferred */
215
#define VID_VC_AND_PS_PREF 0x03 /* PanScan and vertical Compression if allowed */
216
#define VID_CENTRE_CUT_PREF 0x05 /* PanScan with zero vector */
217
218
/* MPEG video decoder commands */
219
#define AV_VIDEO_CMD_STOP 0x000e
220
#define AV_VIDEO_CMD_PLAY 0x000d
221
#define AV_VIDEO_CMD_FREEZE 0x0102
222
#define AV_VIDEO_CMD_FFWD 0x0016
223
#define AV_VIDEO_CMD_SLOW 0x0022
224
225
/* MPEG audio decoder commands */
226
#define AUDIO_CMD_MUTE 0x0001
227
#define AUDIO_CMD_UNMUTE 0x0002
228
#define AUDIO_CMD_PCM16 0x0010
229
#define AUDIO_CMD_STEREO 0x0080
230
#define AUDIO_CMD_MONO_L 0x0100
231
#define AUDIO_CMD_MONO_R 0x0200
232
#define AUDIO_CMD_SYNC_OFF 0x000e
233
#define AUDIO_CMD_SYNC_ON 0x000f
234
235
/* firmware data interface codes */
236
#define DATA_NONE 0x00
237
#define DATA_FSECTION 0x01
238
#define DATA_IPMPE 0x02
239
#define DATA_MPEG_RECORD 0x03
240
#define DATA_DEBUG_MESSAGE 0x04
241
#define DATA_COMMON_INTERFACE 0x05
242
#define DATA_MPEG_PLAY 0x06
243
#define DATA_BMP_LOAD 0x07
244
#define DATA_IRCOMMAND 0x08
245
#define DATA_PIPING 0x09
246
#define DATA_STREAMING 0x0a
247
#define DATA_CI_GET 0x0b
248
#define DATA_CI_PUT 0x0c
249
#define DATA_MPEG_VIDEO_EVENT 0x0d
250
251
#define DATA_PES_RECORD 0x10
252
#define DATA_PES_PLAY 0x11
253
#define DATA_TS_RECORD 0x12
254
#define DATA_TS_PLAY 0x13
255
256
/* ancient CI command codes, only two are actually still used
257
* by the link level CI firmware */
258
#define CI_CMD_ERROR 0x00
259
#define CI_CMD_ACK 0x01
260
#define CI_CMD_SYSTEM_READY 0x02
261
#define CI_CMD_KEYPRESS 0x03
262
#define CI_CMD_ON_TUNED 0x04
263
#define CI_CMD_ON_SWITCH_PROGRAM 0x05
264
#define CI_CMD_SECTION_ARRIVED 0x06
265
#define CI_CMD_SECTION_TIMEOUT 0x07
266
#define CI_CMD_TIME 0x08
267
#define CI_CMD_ENTER_MENU 0x09
268
#define CI_CMD_FAST_PSI 0x0a
269
#define CI_CMD_GET_SLOT_INFO 0x0b
270
271
#define CI_MSG_NONE 0x00
272
#define CI_MSG_CI_INFO 0x01
273
#define CI_MSG_MENU 0x02
274
#define CI_MSG_LIST 0x03
275
#define CI_MSG_TEXT 0x04
276
#define CI_MSG_REQUEST_INPUT 0x05
277
#define CI_MSG_INPUT_COMPLETE 0x06
278
#define CI_MSG_LIST_MORE 0x07
279
#define CI_MSG_MENU_MORE 0x08
280
#define CI_MSG_CLOSE_MMI_IMM 0x09
281
#define CI_MSG_SECTION_REQUEST 0x0a
282
#define CI_MSG_CLOSE_FILTER 0x0b
283
#define CI_PSI_COMPLETE 0x0c
284
#define CI_MODULE_READY 0x0d
285
#define CI_SWITCH_PRG_REPLY 0x0e
286
#define CI_MSG_TEXT_MORE 0x0f
287
288
#define CI_MSG_CA_PMT 0xe0
289
#define CI_MSG_ERROR 0xf0
290
291
292
/* base address of the dual ported RAM which serves as communication
293
* area between PCI bus and av7110,
294
* as seen by the DEBI bus of the saa7146 */
295
#define DPRAM_BASE 0x4000
296
297
/* boot protocol area */
298
#define AV7110_BOOT_STATE (DPRAM_BASE + 0x3F8)
299
#define AV7110_BOOT_SIZE (DPRAM_BASE + 0x3FA)
300
#define AV7110_BOOT_BASE (DPRAM_BASE + 0x3FC)
301
#define AV7110_BOOT_BLOCK (DPRAM_BASE + 0x400)
302
#define AV7110_BOOT_MAX_SIZE 0xc00
303
304
/* firmware command protocol area */
305
#define IRQ_STATE (DPRAM_BASE + 0x0F4)
306
#define IRQ_STATE_EXT (DPRAM_BASE + 0x0F6)
307
#define MSGSTATE (DPRAM_BASE + 0x0F8)
308
#define COMMAND (DPRAM_BASE + 0x0FC)
309
#define COM_BUFF (DPRAM_BASE + 0x100)
310
#define COM_BUFF_SIZE 0x20
311
312
/* various data buffers */
313
#define BUFF1_BASE (DPRAM_BASE + 0x120)
314
#define BUFF1_SIZE 0xE0
315
316
#define DATA_BUFF0_BASE (DPRAM_BASE + 0x200)
317
#define DATA_BUFF0_SIZE 0x0800
318
319
#define DATA_BUFF1_BASE (DATA_BUFF0_BASE+DATA_BUFF0_SIZE)
320
#define DATA_BUFF1_SIZE 0x0800
321
322
#define DATA_BUFF2_BASE (DATA_BUFF1_BASE+DATA_BUFF1_SIZE)
323
#define DATA_BUFF2_SIZE 0x0800
324
325
#define DATA_BUFF3_BASE (DATA_BUFF2_BASE+DATA_BUFF2_SIZE)
326
#define DATA_BUFF3_SIZE 0x0400
327
328
#define Reserved (DPRAM_BASE + 0x1E00)
329
#define Reserved_SIZE 0x1C0
330
331
332
/* firmware status area */
333
#define STATUS_BASE (DPRAM_BASE + 0x1FC0)
334
#define STATUS_LOOPS (STATUS_BASE + 0x08)
335
336
#define STATUS_MPEG_WIDTH (STATUS_BASE + 0x0C)
337
/* ((aspect_ratio & 0xf) << 12) | (height & 0xfff) */
338
#define STATUS_MPEG_HEIGHT_AR (STATUS_BASE + 0x0E)
339
340
/* firmware data protocol area */
341
#define RX_TYPE (DPRAM_BASE + 0x1FE8)
342
#define RX_LEN (DPRAM_BASE + 0x1FEA)
343
#define TX_TYPE (DPRAM_BASE + 0x1FEC)
344
#define TX_LEN (DPRAM_BASE + 0x1FEE)
345
346
#define RX_BUFF (DPRAM_BASE + 0x1FF4)
347
#define TX_BUFF (DPRAM_BASE + 0x1FF6)
348
349
#define HANDSHAKE_REG (DPRAM_BASE + 0x1FF8)
350
#define COM_IF_LOCK (DPRAM_BASE + 0x1FFA)
351
352
#define IRQ_RX (DPRAM_BASE + 0x1FFC)
353
#define IRQ_TX (DPRAM_BASE + 0x1FFE)
354
355
/* used by boot protocol to load firmware into av7110 DRAM */
356
#define DRAM_START_CODE 0x2e000404
357
#define DRAM_MAX_CODE_SIZE 0x00100000
358
359
/* saa7146 gpio lines */
360
#define RESET_LINE 2
361
#define DEBI_DONE_LINE 1
362
#define ARM_IRQ_LINE 0
363
364
365
366
extern int av7110_bootarm(struct av7110 *av7110);
367
extern int av7110_firmversion(struct av7110 *av7110);
368
#define FW_CI_LL_SUPPORT(arm_app) ((arm_app) & 0x80000000)
369
#define FW_4M_SDRAM(arm_app) ((arm_app) & 0x40000000)
370
#define FW_VERSION(arm_app) ((arm_app) & 0x0000FFFF)
371
372
extern int av7110_wait_msgstate(struct av7110 *av7110, u16 flags);
373
extern int av7110_fw_cmd(struct av7110 *av7110, int type, int com, int num, ...);
374
extern int av7110_fw_request(struct av7110 *av7110, u16 *request_buf,
375
int request_buf_len, u16 *reply_buf, int reply_buf_len);
376
377
378
/* DEBI (saa7146 data extension bus interface) access */
379
extern int av7110_debiwrite(struct av7110 *av7110, u32 config,
380
int addr, u32 val, int count);
381
extern u32 av7110_debiread(struct av7110 *av7110, u32 config,
382
int addr, int count);
383
384
385
/* DEBI during interrupt */
386
/* single word writes */
387
static inline void iwdebi(struct av7110 *av7110, u32 config, int addr, u32 val, int count)
388
{
389
av7110_debiwrite(av7110, config, addr, val, count);
390
}
391
392
/* buffer writes */
393
static inline void mwdebi(struct av7110 *av7110, u32 config, int addr,
394
const u8 *val, int count)
395
{
396
memcpy(av7110->debi_virt, val, count);
397
av7110_debiwrite(av7110, config, addr, 0, count);
398
}
399
400
static inline u32 irdebi(struct av7110 *av7110, u32 config, int addr, u32 val, int count)
401
{
402
u32 res;
403
404
res=av7110_debiread(av7110, config, addr, count);
405
if (count<=4)
406
memcpy(av7110->debi_virt, (char *) &res, count);
407
return res;
408
}
409
410
/* DEBI outside interrupts, only for count <= 4! */
411
static inline void wdebi(struct av7110 *av7110, u32 config, int addr, u32 val, int count)
412
{
413
unsigned long flags;
414
415
spin_lock_irqsave(&av7110->debilock, flags);
416
av7110_debiwrite(av7110, config, addr, val, count);
417
spin_unlock_irqrestore(&av7110->debilock, flags);
418
}
419
420
static inline u32 rdebi(struct av7110 *av7110, u32 config, int addr, u32 val, int count)
421
{
422
unsigned long flags;
423
u32 res;
424
425
spin_lock_irqsave(&av7110->debilock, flags);
426
res=av7110_debiread(av7110, config, addr, count);
427
spin_unlock_irqrestore(&av7110->debilock, flags);
428
return res;
429
}
430
431
/* handle mailbox registers of the dual ported RAM */
432
static inline void ARM_ResetMailBox(struct av7110 *av7110)
433
{
434
unsigned long flags;
435
436
spin_lock_irqsave(&av7110->debilock, flags);
437
av7110_debiread(av7110, DEBINOSWAP, IRQ_RX, 2);
438
av7110_debiwrite(av7110, DEBINOSWAP, IRQ_RX, 0, 2);
439
spin_unlock_irqrestore(&av7110->debilock, flags);
440
}
441
442
static inline void ARM_ClearMailBox(struct av7110 *av7110)
443
{
444
iwdebi(av7110, DEBINOSWAP, IRQ_RX, 0, 2);
445
}
446
447
static inline void ARM_ClearIrq(struct av7110 *av7110)
448
{
449
irdebi(av7110, DEBINOSWAP, IRQ_RX, 0, 2);
450
}
451
452
/****************************************************************************
453
* Firmware commands
454
****************************************************************************/
455
456
static inline int SendDAC(struct av7110 *av7110, u8 addr, u8 data)
457
{
458
return av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, AudioDAC, 2, addr, data);
459
}
460
461
static inline int av7710_set_video_mode(struct av7110 *av7110, int mode)
462
{
463
return av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetVidMode, 1, mode);
464
}
465
466
static inline int vidcom(struct av7110 *av7110, u32 com, u32 arg)
467
{
468
return av7110_fw_cmd(av7110, COMTYPE_MISC, AV7110_FW_VIDEO_COMMAND, 4,
469
(com>>16), (com&0xffff),
470
(arg>>16), (arg&0xffff));
471
}
472
473
static inline int audcom(struct av7110 *av7110, u32 com)
474
{
475
return av7110_fw_cmd(av7110, COMTYPE_MISC, AV7110_FW_AUDIO_COMMAND, 2,
476
(com>>16), (com&0xffff));
477
}
478
479
static inline int Set22K(struct av7110 *av7110, int state)
480
{
481
return av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, (state ? ON22K : OFF22K), 0);
482
}
483
484
485
extern int av7110_diseqc_send(struct av7110 *av7110, int len, u8 *msg, unsigned long burst);
486
487
488
#ifdef CONFIG_DVB_AV7110_OSD
489
extern int av7110_osd_cmd(struct av7110 *av7110, osd_cmd_t *dc);
490
extern int av7110_osd_capability(struct av7110 *av7110, osd_cap_t *cap);
491
#endif /* CONFIG_DVB_AV7110_OSD */
492
493
494
495
#endif /* _AV7110_HW_H_ */
496
497