Path: blob/master/drivers/media/dvb/ttpci/av7110_hw.h
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#ifndef _AV7110_HW_H_1#define _AV7110_HW_H_23#include "av7110.h"45/* DEBI transfer mode defs */67#define DEBINOSWAP 0x000e00008#define DEBISWAB 0x001e00009#define DEBISWAP 0x002e00001011#define ARM_WAIT_FREE (HZ)12#define ARM_WAIT_SHAKE (HZ/5)13#define ARM_WAIT_OSD (HZ)141516enum av7110_bootstate17{18BOOTSTATE_BUFFER_EMPTY = 0,19BOOTSTATE_BUFFER_FULL = 1,20BOOTSTATE_AV7110_BOOT_COMPLETE = 221};2223enum av7110_type_rec_play_format24{ RP_None,25AudioPES,26AudioMp2,27AudioPCM,28VideoPES,29AV_PES30};3132enum av7110_osd_palette_type33{34NoPalet = 0, /* No palette */35Pal1Bit = 2, /* 2 colors for 1 Bit Palette */36Pal2Bit = 4, /* 4 colors for 2 bit palette */37Pal4Bit = 16, /* 16 colors for 4 bit palette */38Pal8Bit = 256 /* 256 colors for 16 bit palette */39};4041/* switch defines */42#define SB_GPIO 343#define SB_OFF SAA7146_GPIO_OUTLO /* SlowBlank off (TV-Mode) */44#define SB_ON SAA7146_GPIO_INPUT /* SlowBlank on (AV-Mode) */45#define SB_WIDE SAA7146_GPIO_OUTHI /* SlowBlank 6V (16/9-Mode) (not implemented) */4647#define FB_GPIO 148#define FB_OFF SAA7146_GPIO_LO /* FastBlank off (CVBS-Mode) */49#define FB_ON SAA7146_GPIO_OUTHI /* FastBlank on (RGB-Mode) */50#define FB_LOOP SAA7146_GPIO_INPUT /* FastBlank loop-through (PC graphics ???) */5152enum av7110_video_output_mode53{54NO_OUT = 0, /* disable analog output */55CVBS_RGB_OUT = 1,56CVBS_YC_OUT = 2,57YC_OUT = 358};5960/* firmware internal msg q status: */61#define GPMQFull 0x0001 /* Main Message Queue Full */62#define GPMQOver 0x0002 /* Main Message Queue Overflow */63#define HPQFull 0x0004 /* High Priority Msg Queue Full */64#define HPQOver 0x000865#define OSDQFull 0x0010 /* OSD Queue Full */66#define OSDQOver 0x002067#define GPMQBusy 0x0040 /* Queue not empty, FW >= 261d */68#define HPQBusy 0x008069#define OSDQBusy 0x01007071/* hw section filter flags */72#define SECTION_EIT 0x0173#define SECTION_SINGLE 0x0074#define SECTION_CYCLE 0x0275#define SECTION_CONTINUOS 0x0476#define SECTION_MODE 0x0677#define SECTION_IPMPE 0x0C /* size up to 4k */78#define SECTION_HIGH_SPEED 0x1C /* larger buffer */79#define DATA_PIPING_FLAG 0x20 /* for Data Piping Filter */8081#define PBUFSIZE_NONE 0x000082#define PBUFSIZE_1P 0x010083#define PBUFSIZE_2P 0x020084#define PBUFSIZE_1K 0x030085#define PBUFSIZE_2K 0x040086#define PBUFSIZE_4K 0x050087#define PBUFSIZE_8K 0x060088#define PBUFSIZE_16K 0x070089#define PBUFSIZE_32K 0x0800909192/* firmware command codes */93enum av7110_osd_command {94WCreate,95WDestroy,96WMoveD,97WMoveA,98WHide,99WTop,100DBox,101DLine,102DText,103Set_Font,104SetColor,105SetBlend,106SetWBlend,107SetCBlend,108SetNonBlend,109LoadBmp,110BlitBmp,111ReleaseBmp,112SetWTrans,113SetWNoTrans,114Set_Palette115};116117enum av7110_pid_command {118MultiPID,119VideoPID,120AudioPID,121InitFilt,122FiltError,123NewVersion,124CacheError,125AddPIDFilter,126DelPIDFilter,127Scan,128SetDescr,129SetIR,130FlushTSQueue131};132133enum av7110_mpeg_command {134SelAudChannels135};136137enum av7110_audio_command {138AudioDAC,139CabADAC,140ON22K,141OFF22K,142MainSwitch,143ADSwitch,144SendDiSEqC,145SetRegister,146SpdifSwitch147};148149enum av7110_request_command {150AudioState,151AudioBuffState,152VideoState1,153VideoState2,154VideoState3,155CrashCounter,156ReqVersion,157ReqVCXO,158ReqRegister,159ReqSecFilterError,160ReqSTC161};162163enum av7110_encoder_command {164SetVidMode,165SetTestMode,166LoadVidCode,167SetMonitorType,168SetPanScanType,169SetFreezeMode,170SetWSSConfig171};172173enum av7110_rec_play_state {174__Record,175__Stop,176__Play,177__Pause,178__Slow,179__FF_IP,180__Scan_I,181__Continue182};183184enum av7110_fw_cmd_misc {185AV7110_FW_VIDEO_ZOOM = 1,186AV7110_FW_VIDEO_COMMAND,187AV7110_FW_AUDIO_COMMAND188};189190enum av7110_command_type {191COMTYPE_NOCOM,192COMTYPE_PIDFILTER,193COMTYPE_MPEGDECODER,194COMTYPE_OSD,195COMTYPE_BMP,196COMTYPE_ENCODER,197COMTYPE_AUDIODAC,198COMTYPE_REQUEST,199COMTYPE_SYSTEM,200COMTYPE_REC_PLAY,201COMTYPE_COMMON_IF,202COMTYPE_PID_FILTER,203COMTYPE_PES,204COMTYPE_TS,205COMTYPE_VIDEO,206COMTYPE_AUDIO,207COMTYPE_CI_LL,208COMTYPE_MISC = 0x80209};210211#define VID_NONE_PREF 0x00 /* No aspect ration processing preferred */212#define VID_PAN_SCAN_PREF 0x01 /* Pan and Scan Display preferred */213#define VID_VERT_COMP_PREF 0x02 /* Vertical compression display preferred */214#define VID_VC_AND_PS_PREF 0x03 /* PanScan and vertical Compression if allowed */215#define VID_CENTRE_CUT_PREF 0x05 /* PanScan with zero vector */216217/* MPEG video decoder commands */218#define AV_VIDEO_CMD_STOP 0x000e219#define AV_VIDEO_CMD_PLAY 0x000d220#define AV_VIDEO_CMD_FREEZE 0x0102221#define AV_VIDEO_CMD_FFWD 0x0016222#define AV_VIDEO_CMD_SLOW 0x0022223224/* MPEG audio decoder commands */225#define AUDIO_CMD_MUTE 0x0001226#define AUDIO_CMD_UNMUTE 0x0002227#define AUDIO_CMD_PCM16 0x0010228#define AUDIO_CMD_STEREO 0x0080229#define AUDIO_CMD_MONO_L 0x0100230#define AUDIO_CMD_MONO_R 0x0200231#define AUDIO_CMD_SYNC_OFF 0x000e232#define AUDIO_CMD_SYNC_ON 0x000f233234/* firmware data interface codes */235#define DATA_NONE 0x00236#define DATA_FSECTION 0x01237#define DATA_IPMPE 0x02238#define DATA_MPEG_RECORD 0x03239#define DATA_DEBUG_MESSAGE 0x04240#define DATA_COMMON_INTERFACE 0x05241#define DATA_MPEG_PLAY 0x06242#define DATA_BMP_LOAD 0x07243#define DATA_IRCOMMAND 0x08244#define DATA_PIPING 0x09245#define DATA_STREAMING 0x0a246#define DATA_CI_GET 0x0b247#define DATA_CI_PUT 0x0c248#define DATA_MPEG_VIDEO_EVENT 0x0d249250#define DATA_PES_RECORD 0x10251#define DATA_PES_PLAY 0x11252#define DATA_TS_RECORD 0x12253#define DATA_TS_PLAY 0x13254255/* ancient CI command codes, only two are actually still used256* by the link level CI firmware */257#define CI_CMD_ERROR 0x00258#define CI_CMD_ACK 0x01259#define CI_CMD_SYSTEM_READY 0x02260#define CI_CMD_KEYPRESS 0x03261#define CI_CMD_ON_TUNED 0x04262#define CI_CMD_ON_SWITCH_PROGRAM 0x05263#define CI_CMD_SECTION_ARRIVED 0x06264#define CI_CMD_SECTION_TIMEOUT 0x07265#define CI_CMD_TIME 0x08266#define CI_CMD_ENTER_MENU 0x09267#define CI_CMD_FAST_PSI 0x0a268#define CI_CMD_GET_SLOT_INFO 0x0b269270#define CI_MSG_NONE 0x00271#define CI_MSG_CI_INFO 0x01272#define CI_MSG_MENU 0x02273#define CI_MSG_LIST 0x03274#define CI_MSG_TEXT 0x04275#define CI_MSG_REQUEST_INPUT 0x05276#define CI_MSG_INPUT_COMPLETE 0x06277#define CI_MSG_LIST_MORE 0x07278#define CI_MSG_MENU_MORE 0x08279#define CI_MSG_CLOSE_MMI_IMM 0x09280#define CI_MSG_SECTION_REQUEST 0x0a281#define CI_MSG_CLOSE_FILTER 0x0b282#define CI_PSI_COMPLETE 0x0c283#define CI_MODULE_READY 0x0d284#define CI_SWITCH_PRG_REPLY 0x0e285#define CI_MSG_TEXT_MORE 0x0f286287#define CI_MSG_CA_PMT 0xe0288#define CI_MSG_ERROR 0xf0289290291/* base address of the dual ported RAM which serves as communication292* area between PCI bus and av7110,293* as seen by the DEBI bus of the saa7146 */294#define DPRAM_BASE 0x4000295296/* boot protocol area */297#define AV7110_BOOT_STATE (DPRAM_BASE + 0x3F8)298#define AV7110_BOOT_SIZE (DPRAM_BASE + 0x3FA)299#define AV7110_BOOT_BASE (DPRAM_BASE + 0x3FC)300#define AV7110_BOOT_BLOCK (DPRAM_BASE + 0x400)301#define AV7110_BOOT_MAX_SIZE 0xc00302303/* firmware command protocol area */304#define IRQ_STATE (DPRAM_BASE + 0x0F4)305#define IRQ_STATE_EXT (DPRAM_BASE + 0x0F6)306#define MSGSTATE (DPRAM_BASE + 0x0F8)307#define COMMAND (DPRAM_BASE + 0x0FC)308#define COM_BUFF (DPRAM_BASE + 0x100)309#define COM_BUFF_SIZE 0x20310311/* various data buffers */312#define BUFF1_BASE (DPRAM_BASE + 0x120)313#define BUFF1_SIZE 0xE0314315#define DATA_BUFF0_BASE (DPRAM_BASE + 0x200)316#define DATA_BUFF0_SIZE 0x0800317318#define DATA_BUFF1_BASE (DATA_BUFF0_BASE+DATA_BUFF0_SIZE)319#define DATA_BUFF1_SIZE 0x0800320321#define DATA_BUFF2_BASE (DATA_BUFF1_BASE+DATA_BUFF1_SIZE)322#define DATA_BUFF2_SIZE 0x0800323324#define DATA_BUFF3_BASE (DATA_BUFF2_BASE+DATA_BUFF2_SIZE)325#define DATA_BUFF3_SIZE 0x0400326327#define Reserved (DPRAM_BASE + 0x1E00)328#define Reserved_SIZE 0x1C0329330331/* firmware status area */332#define STATUS_BASE (DPRAM_BASE + 0x1FC0)333#define STATUS_LOOPS (STATUS_BASE + 0x08)334335#define STATUS_MPEG_WIDTH (STATUS_BASE + 0x0C)336/* ((aspect_ratio & 0xf) << 12) | (height & 0xfff) */337#define STATUS_MPEG_HEIGHT_AR (STATUS_BASE + 0x0E)338339/* firmware data protocol area */340#define RX_TYPE (DPRAM_BASE + 0x1FE8)341#define RX_LEN (DPRAM_BASE + 0x1FEA)342#define TX_TYPE (DPRAM_BASE + 0x1FEC)343#define TX_LEN (DPRAM_BASE + 0x1FEE)344345#define RX_BUFF (DPRAM_BASE + 0x1FF4)346#define TX_BUFF (DPRAM_BASE + 0x1FF6)347348#define HANDSHAKE_REG (DPRAM_BASE + 0x1FF8)349#define COM_IF_LOCK (DPRAM_BASE + 0x1FFA)350351#define IRQ_RX (DPRAM_BASE + 0x1FFC)352#define IRQ_TX (DPRAM_BASE + 0x1FFE)353354/* used by boot protocol to load firmware into av7110 DRAM */355#define DRAM_START_CODE 0x2e000404356#define DRAM_MAX_CODE_SIZE 0x00100000357358/* saa7146 gpio lines */359#define RESET_LINE 2360#define DEBI_DONE_LINE 1361#define ARM_IRQ_LINE 0362363364365extern int av7110_bootarm(struct av7110 *av7110);366extern int av7110_firmversion(struct av7110 *av7110);367#define FW_CI_LL_SUPPORT(arm_app) ((arm_app) & 0x80000000)368#define FW_4M_SDRAM(arm_app) ((arm_app) & 0x40000000)369#define FW_VERSION(arm_app) ((arm_app) & 0x0000FFFF)370371extern int av7110_wait_msgstate(struct av7110 *av7110, u16 flags);372extern int av7110_fw_cmd(struct av7110 *av7110, int type, int com, int num, ...);373extern int av7110_fw_request(struct av7110 *av7110, u16 *request_buf,374int request_buf_len, u16 *reply_buf, int reply_buf_len);375376377/* DEBI (saa7146 data extension bus interface) access */378extern int av7110_debiwrite(struct av7110 *av7110, u32 config,379int addr, u32 val, int count);380extern u32 av7110_debiread(struct av7110 *av7110, u32 config,381int addr, int count);382383384/* DEBI during interrupt */385/* single word writes */386static inline void iwdebi(struct av7110 *av7110, u32 config, int addr, u32 val, int count)387{388av7110_debiwrite(av7110, config, addr, val, count);389}390391/* buffer writes */392static inline void mwdebi(struct av7110 *av7110, u32 config, int addr,393const u8 *val, int count)394{395memcpy(av7110->debi_virt, val, count);396av7110_debiwrite(av7110, config, addr, 0, count);397}398399static inline u32 irdebi(struct av7110 *av7110, u32 config, int addr, u32 val, int count)400{401u32 res;402403res=av7110_debiread(av7110, config, addr, count);404if (count<=4)405memcpy(av7110->debi_virt, (char *) &res, count);406return res;407}408409/* DEBI outside interrupts, only for count <= 4! */410static inline void wdebi(struct av7110 *av7110, u32 config, int addr, u32 val, int count)411{412unsigned long flags;413414spin_lock_irqsave(&av7110->debilock, flags);415av7110_debiwrite(av7110, config, addr, val, count);416spin_unlock_irqrestore(&av7110->debilock, flags);417}418419static inline u32 rdebi(struct av7110 *av7110, u32 config, int addr, u32 val, int count)420{421unsigned long flags;422u32 res;423424spin_lock_irqsave(&av7110->debilock, flags);425res=av7110_debiread(av7110, config, addr, count);426spin_unlock_irqrestore(&av7110->debilock, flags);427return res;428}429430/* handle mailbox registers of the dual ported RAM */431static inline void ARM_ResetMailBox(struct av7110 *av7110)432{433unsigned long flags;434435spin_lock_irqsave(&av7110->debilock, flags);436av7110_debiread(av7110, DEBINOSWAP, IRQ_RX, 2);437av7110_debiwrite(av7110, DEBINOSWAP, IRQ_RX, 0, 2);438spin_unlock_irqrestore(&av7110->debilock, flags);439}440441static inline void ARM_ClearMailBox(struct av7110 *av7110)442{443iwdebi(av7110, DEBINOSWAP, IRQ_RX, 0, 2);444}445446static inline void ARM_ClearIrq(struct av7110 *av7110)447{448irdebi(av7110, DEBINOSWAP, IRQ_RX, 0, 2);449}450451/****************************************************************************452* Firmware commands453****************************************************************************/454455static inline int SendDAC(struct av7110 *av7110, u8 addr, u8 data)456{457return av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, AudioDAC, 2, addr, data);458}459460static inline int av7710_set_video_mode(struct av7110 *av7110, int mode)461{462return av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetVidMode, 1, mode);463}464465static inline int vidcom(struct av7110 *av7110, u32 com, u32 arg)466{467return av7110_fw_cmd(av7110, COMTYPE_MISC, AV7110_FW_VIDEO_COMMAND, 4,468(com>>16), (com&0xffff),469(arg>>16), (arg&0xffff));470}471472static inline int audcom(struct av7110 *av7110, u32 com)473{474return av7110_fw_cmd(av7110, COMTYPE_MISC, AV7110_FW_AUDIO_COMMAND, 2,475(com>>16), (com&0xffff));476}477478static inline int Set22K(struct av7110 *av7110, int state)479{480return av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, (state ? ON22K : OFF22K), 0);481}482483484extern int av7110_diseqc_send(struct av7110 *av7110, int len, u8 *msg, unsigned long burst);485486487#ifdef CONFIG_DVB_AV7110_OSD488extern int av7110_osd_cmd(struct av7110 *av7110, osd_cmd_t *dc);489extern int av7110_osd_capability(struct av7110 *av7110, osd_cap_t *cap);490#endif /* CONFIG_DVB_AV7110_OSD */491492493494#endif /* _AV7110_HW_H_ */495496497