Path: blob/master/drivers/media/dvb/ttpci/budget-patch.c
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/*1* budget-patch.c: driver for Budget Patch,2* hardware modification of DVB-S cards enabling full TS3*4* Written by Emard <[email protected]>5*6* Original idea by Roberto Deza <[email protected]>7*8* Special thanks to Holger Waechtler, Michael Hunold, Marian Durkovic9* and Metzlerbros10*11* This program is free software; you can redistribute it and/or12* modify it under the terms of the GNU General Public License13* as published by the Free Software Foundation; either version 214* of the License, or (at your option) any later version.15*16*17* This program is distributed in the hope that it will be useful,18* but WITHOUT ANY WARRANTY; without even the implied warranty of19* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the20* GNU General Public License for more details.21*22*23* You should have received a copy of the GNU General Public License24* along with this program; if not, write to the Free Software25* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.26* Or, point your browser to http://www.gnu.org/copyleft/gpl.html27*28*29* the project's page is at http://www.linuxtv.org/30*/3132#include "av7110.h"33#include "av7110_hw.h"34#include "budget.h"35#include "stv0299.h"36#include "ves1x93.h"37#include "tda8083.h"3839#include "bsru6.h"4041DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);4243#define budget_patch budget4445static struct saa7146_extension budget_extension;4647MAKE_BUDGET_INFO(ttbp, "TT-Budget/Patch DVB-S 1.x PCI", BUDGET_PATCH);48//MAKE_BUDGET_INFO(satel,"TT-Budget/Patch SATELCO PCI", BUDGET_TT_HW_DISEQC);4950static struct pci_device_id pci_tbl[] = {51MAKE_EXTENSION_PCI(ttbp,0x13c2, 0x0000),52// MAKE_EXTENSION_PCI(satel, 0x13c2, 0x1013),53{54.vendor = 0,55}56};5758/* those lines are for budget-patch to be tried59** on a true budget card and observe the60** behaviour of VSYNC generated by rps1.61** this code was shamelessly copy/pasted from budget.c62*/63static void gpio_Set22K (struct budget *budget, int state)64{65struct saa7146_dev *dev=budget->dev;66dprintk(2, "budget: %p\n", budget);67saa7146_setgpio(dev, 3, (state ? SAA7146_GPIO_OUTHI : SAA7146_GPIO_OUTLO));68}6970/* Diseqc functions only for TT Budget card */71/* taken from the Skyvision DVB driver by72Ralph Metzler <[email protected]> */7374static void DiseqcSendBit (struct budget *budget, int data)75{76struct saa7146_dev *dev=budget->dev;77dprintk(2, "budget: %p\n", budget);7879saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);80udelay(data ? 500 : 1000);81saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);82udelay(data ? 1000 : 500);83}8485static void DiseqcSendByte (struct budget *budget, int data)86{87int i, par=1, d;8889dprintk(2, "budget: %p\n", budget);9091for (i=7; i>=0; i--) {92d = (data>>i)&1;93par ^= d;94DiseqcSendBit(budget, d);95}9697DiseqcSendBit(budget, par);98}99100static int SendDiSEqCMsg (struct budget *budget, int len, u8 *msg, unsigned long burst)101{102struct saa7146_dev *dev=budget->dev;103int i;104105dprintk(2, "budget: %p\n", budget);106107saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);108mdelay(16);109110for (i=0; i<len; i++)111DiseqcSendByte(budget, msg[i]);112113mdelay(16);114115if (burst!=-1) {116if (burst)117DiseqcSendByte(budget, 0xff);118else {119saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);120mdelay(12);121udelay(500);122saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);123}124msleep(20);125}126127return 0;128}129130/* shamelessly copy/pasted from budget.c131*/132static int budget_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)133{134struct budget* budget = (struct budget*) fe->dvb->priv;135136switch (tone) {137case SEC_TONE_ON:138gpio_Set22K (budget, 1);139break;140141case SEC_TONE_OFF:142gpio_Set22K (budget, 0);143break;144145default:146return -EINVAL;147}148149return 0;150}151152static int budget_diseqc_send_master_cmd(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd)153{154struct budget* budget = (struct budget*) fe->dvb->priv;155156SendDiSEqCMsg (budget, cmd->msg_len, cmd->msg, 0);157158return 0;159}160161static int budget_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd)162{163struct budget* budget = (struct budget*) fe->dvb->priv;164165SendDiSEqCMsg (budget, 0, NULL, minicmd);166167return 0;168}169170static int budget_av7110_send_fw_cmd(struct budget_patch *budget, u16* buf, int length)171{172int i;173174dprintk(2, "budget: %p\n", budget);175176for (i = 2; i < length; i++)177{178ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2*i, 2, (u32) buf[i], 0,0);179msleep(5);180}181if (length)182ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, (u32) buf[1], 0,0);183else184ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, 0, 0,0);185msleep(5);186ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND, 2, (u32) buf[0], 0,0);187msleep(5);188return 0;189}190191static void av7110_set22k(struct budget_patch *budget, int state)192{193u16 buf[2] = {( COMTYPE_AUDIODAC << 8) | (state ? ON22K : OFF22K), 0};194195dprintk(2, "budget: %p\n", budget);196budget_av7110_send_fw_cmd(budget, buf, 2);197}198199static int av7110_send_diseqc_msg(struct budget_patch *budget, int len, u8 *msg, int burst)200{201int i;202u16 buf[18] = { ((COMTYPE_AUDIODAC << 8) | SendDiSEqC),20316, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };204205dprintk(2, "budget: %p\n", budget);206207if (len>10)208len=10;209210buf[1] = len+2;211buf[2] = len;212213if (burst != -1)214buf[3]=burst ? 0x01 : 0x00;215else216buf[3]=0xffff;217218for (i=0; i<len; i++)219buf[i+4]=msg[i];220221budget_av7110_send_fw_cmd(budget, buf, 18);222return 0;223}224225static int budget_patch_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)226{227struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;228229switch (tone) {230case SEC_TONE_ON:231av7110_set22k (budget, 1);232break;233234case SEC_TONE_OFF:235av7110_set22k (budget, 0);236break;237238default:239return -EINVAL;240}241242return 0;243}244245static int budget_patch_diseqc_send_master_cmd(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd)246{247struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;248249av7110_send_diseqc_msg (budget, cmd->msg_len, cmd->msg, 0);250251return 0;252}253254static int budget_patch_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd)255{256struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;257258av7110_send_diseqc_msg (budget, 0, NULL, minicmd);259260return 0;261}262263static int alps_bsrv2_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)264{265struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;266u8 pwr = 0;267u8 buf[4];268struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };269u32 div = (params->frequency + 479500) / 125;270271if (params->frequency > 2000000) pwr = 3;272else if (params->frequency > 1800000) pwr = 2;273else if (params->frequency > 1600000) pwr = 1;274else if (params->frequency > 1200000) pwr = 0;275else if (params->frequency >= 1100000) pwr = 1;276else pwr = 2;277278buf[0] = (div >> 8) & 0x7f;279buf[1] = div & 0xff;280buf[2] = ((div & 0x18000) >> 10) | 0x95;281buf[3] = (pwr << 6) | 0x30;282283// NOTE: since we're using a prescaler of 2, we set the284// divisor frequency to 62.5kHz and divide by 125 above285286if (fe->ops.i2c_gate_ctrl)287fe->ops.i2c_gate_ctrl(fe, 1);288if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1)289return -EIO;290return 0;291}292293static struct ves1x93_config alps_bsrv2_config = {294.demod_address = 0x08,295.xin = 90100000UL,296.invert_pwm = 0,297};298299static int grundig_29504_451_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)300{301struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;302u32 div;303u8 data[4];304struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };305306div = params->frequency / 125;307data[0] = (div >> 8) & 0x7f;308data[1] = div & 0xff;309data[2] = 0x8e;310data[3] = 0x00;311312if (fe->ops.i2c_gate_ctrl)313fe->ops.i2c_gate_ctrl(fe, 1);314if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1)315return -EIO;316return 0;317}318319static struct tda8083_config grundig_29504_451_config = {320.demod_address = 0x68,321};322323static void frontend_init(struct budget_patch* budget)324{325switch(budget->dev->pci->subsystem_device) {326case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X327case 0x1013: // SATELCO Multimedia PCI328329// try the ALPS BSRV2 first of all330budget->dvb_frontend = dvb_attach(ves1x93_attach, &alps_bsrv2_config, &budget->i2c_adap);331if (budget->dvb_frontend) {332budget->dvb_frontend->ops.tuner_ops.set_params = alps_bsrv2_tuner_set_params;333budget->dvb_frontend->ops.diseqc_send_master_cmd = budget_patch_diseqc_send_master_cmd;334budget->dvb_frontend->ops.diseqc_send_burst = budget_patch_diseqc_send_burst;335budget->dvb_frontend->ops.set_tone = budget_patch_set_tone;336break;337}338339// try the ALPS BSRU6 now340budget->dvb_frontend = dvb_attach(stv0299_attach, &alps_bsru6_config, &budget->i2c_adap);341if (budget->dvb_frontend) {342budget->dvb_frontend->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params;343budget->dvb_frontend->tuner_priv = &budget->i2c_adap;344345budget->dvb_frontend->ops.diseqc_send_master_cmd = budget_diseqc_send_master_cmd;346budget->dvb_frontend->ops.diseqc_send_burst = budget_diseqc_send_burst;347budget->dvb_frontend->ops.set_tone = budget_set_tone;348break;349}350351// Try the grundig 29504-451352budget->dvb_frontend = dvb_attach(tda8083_attach, &grundig_29504_451_config, &budget->i2c_adap);353if (budget->dvb_frontend) {354budget->dvb_frontend->ops.tuner_ops.set_params = grundig_29504_451_tuner_set_params;355budget->dvb_frontend->ops.diseqc_send_master_cmd = budget_diseqc_send_master_cmd;356budget->dvb_frontend->ops.diseqc_send_burst = budget_diseqc_send_burst;357budget->dvb_frontend->ops.set_tone = budget_set_tone;358break;359}360break;361}362363if (budget->dvb_frontend == NULL) {364printk("dvb-ttpci: A frontend driver was not found for device [%04x:%04x] subsystem [%04x:%04x]\n",365budget->dev->pci->vendor,366budget->dev->pci->device,367budget->dev->pci->subsystem_vendor,368budget->dev->pci->subsystem_device);369} else {370if (dvb_register_frontend(&budget->dvb_adapter, budget->dvb_frontend)) {371printk("budget-av: Frontend registration failed!\n");372dvb_frontend_detach(budget->dvb_frontend);373budget->dvb_frontend = NULL;374}375}376}377378/* written by Emard */379static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_extension_data *info)380{381struct budget_patch *budget;382int err;383int count = 0;384int detected = 0;385386#define PATCH_RESET 0387#define RPS_IRQ 0388#define HPS_SETUP 0389#if PATCH_RESET390saa7146_write(dev, MC1, MASK_31);391msleep(40);392#endif393#if HPS_SETUP394// initialize registers. Better to have it like this395// than leaving something unconfigured396saa7146_write(dev, DD1_STREAM_B, 0);397// port B VSYNC at rising edge398saa7146_write(dev, DD1_INIT, 0x00000200); // have this in budget-core too!399saa7146_write(dev, BRS_CTRL, 0x00000000); // VBI400401// debi config402// saa7146_write(dev, DEBI_CONFIG, MASK_30|MASK_28|MASK_18);403404// zero all HPS registers405saa7146_write(dev, HPS_H_PRESCALE, 0); // r68406saa7146_write(dev, HPS_H_SCALE, 0); // r6c407saa7146_write(dev, BCS_CTRL, 0); // r70408saa7146_write(dev, HPS_V_SCALE, 0); // r60409saa7146_write(dev, HPS_V_GAIN, 0); // r64410saa7146_write(dev, CHROMA_KEY_RANGE, 0); // r74411saa7146_write(dev, CLIP_FORMAT_CTRL, 0); // r78412// Set HPS prescaler for port B input413saa7146_write(dev, HPS_CTRL, (1<<30) | (0<<29) | (1<<28) | (0<<12) );414saa7146_write(dev, MC2,4150 * (MASK_08 | MASK_24) | // BRS control4160 * (MASK_09 | MASK_25) | // a4170 * (MASK_10 | MASK_26) | // b4181 * (MASK_06 | MASK_22) | // HPS_CTRL14191 * (MASK_05 | MASK_21) | // HPS_CTRL24200 * (MASK_01 | MASK_15) // DEBI421);422#endif423// Disable RPS1 and RPS0424saa7146_write(dev, MC1, ( MASK_29 | MASK_28));425// RPS1 timeout disable426saa7146_write(dev, RPS_TOV1, 0);427428// code for autodetection429// will wait for VBI_B event (vertical blank at port B)430// and will reset GPIO3 after VBI_B is detected.431// (GPIO3 should be raised high by CPU to432// test if GPIO3 will generate vertical blank signal433// in budget patch GPIO3 is connected to VSYNC_B434count = 0;435#if 0436WRITE_RPS1(CMD_UPLOAD |437MASK_10 | MASK_09 | MASK_08 | MASK_06 | MASK_05 | MASK_04 | MASK_03 | MASK_02 );438#endif439WRITE_RPS1(CMD_PAUSE | EVT_VBI_B);440WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));441WRITE_RPS1(GPIO3_MSK);442WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);443#if RPS_IRQ444// issue RPS1 interrupt to increment counter445WRITE_RPS1(CMD_INTERRUPT);446// at least a NOP is neede between two interrupts447WRITE_RPS1(CMD_NOP);448// interrupt again449WRITE_RPS1(CMD_INTERRUPT);450#endif451WRITE_RPS1(CMD_STOP);452453#if RPS_IRQ454// set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)455// use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled456// use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called457saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );458// set event counter 1 threshold to maximum allowed value (rEC p55)459saa7146_write(dev, ECT1R, 0x3fff );460#endif461// Fix VSYNC level462saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);463// Set RPS1 Address register to point to RPS code (r108 p42)464saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);465// Enable RPS1, (rFC p33)466saa7146_write(dev, MC1, (MASK_13 | MASK_29 ));467468469mdelay(50);470saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);471mdelay(150);472473474if( (saa7146_read(dev, GPIO_CTRL) & 0x10000000) == 0)475detected = 1;476477#if RPS_IRQ478printk("Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff );479#endif480// Disable RPS1481saa7146_write(dev, MC1, ( MASK_29 ));482483if(detected == 0)484printk("budget-patch not detected or saa7146 in non-default state.\n"485"try enabling ressetting of 7146 with MASK_31 in MC1 register\n");486487else488printk("BUDGET-PATCH DETECTED.\n");489490491/* OLD (Original design by Roberto Deza):492** This code will setup the SAA7146_RPS1 to generate a square493** wave on GPIO3, changing when a field (TS_HEIGHT/2 "lines" of494** TS_WIDTH packets) has been acquired on SAA7146_D1B video port;495** then, this GPIO3 output which is connected to the D1B_VSYNC496** input, will trigger the acquisition of the alternate field497** and so on.498** Currently, the TT_budget / WinTV_Nova cards have two ICs499** (74HCT4040, LVC74) for the generation of this VSYNC signal,500** which seems that can be done perfectly without this :-)).501*/502503/* New design (By Emard)504** this rps1 code will copy internal HS event to GPIO3 pin.505** GPIO3 is in budget-patch hardware connected to port B VSYNC506507** HS is an internal event of 7146, accessible with RPS508** and temporarily raised high every n lines509** (n in defined in the RPS_THRESH1 counter threshold)510** I think HS is raised high on the beginning of the n-th line511** and remains high until this n-th line that triggered512** it is completely received. When the reception of n-th line513** ends, HS is lowered.514515** To transmit data over DMA, 7146 needs changing state at516** port B VSYNC pin. Any changing of port B VSYNC will517** cause some DMA data transfer, with more or less packets loss.518** It depends on the phase and frequency of VSYNC and519** the way of 7146 is instructed to trigger on port B (defined520** in DD1_INIT register, 3rd nibble from the right valid521** numbers are 0-7, see datasheet)522**523** The correct triggering can minimize packet loss,524** dvbtraffic should give this stable bandwidths:525** 22k transponder = 33814 kbit/s526** 27.5k transponder = 38045 kbit/s527** by experiment it is found that the best results528** (stable bandwidths and almost no packet loss)529** are obtained using DD1_INIT triggering number 2530** (Va at rising edge of VS Fa = HS x VS-failing forced toggle)531** and a VSYNC phase that occurs in the middle of DMA transfer532** (about byte 188*512=96256 in the DMA window).533**534** Phase of HS is still not clear to me how to control,535** It just happens to be so. It can be seen if one enables536** RPS_IRQ and print Event Counter 1 in vpeirq(). Every537** time RPS_INTERRUPT is called, the Event Counter 1 will538** increment. That's how the 7146 is programmed to do event539** counting in this budget-patch.c540** I *think* HPS setting has something to do with the phase541** of HS but I can't be 100% sure in that.542543** hardware debug note: a working budget card (including budget patch)544** with vpeirq() interrupt setup in mode "0x90" (every 64K) will545** generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes546** and that means 3*25=75 Hz of interrupt frequency, as seen by547** watch cat /proc/interrupts548**549** If this frequency is 3x lower (and data received in the DMA550** buffer don't start with 0x47, but in the middle of packets,551** whose lengths appear to be like 188 292 188 104 etc.552** this means VSYNC line is not connected in the hardware.553** (check soldering pcb and pins)554** The same behaviour of missing VSYNC can be duplicated on budget555** cards, by setting DD1_INIT trigger mode 7 in 3rd nibble.556*/557558// Setup RPS1 "program" (p35)559count = 0;560561562// Wait Source Line Counter Threshold (p36)563WRITE_RPS1(CMD_PAUSE | EVT_HS);564// Set GPIO3=1 (p42)565WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));566WRITE_RPS1(GPIO3_MSK);567WRITE_RPS1(SAA7146_GPIO_OUTHI<<24);568#if RPS_IRQ569// issue RPS1 interrupt570WRITE_RPS1(CMD_INTERRUPT);571#endif572// Wait reset Source Line Counter Threshold (p36)573WRITE_RPS1(CMD_PAUSE | RPS_INV | EVT_HS);574// Set GPIO3=0 (p42)575WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));576WRITE_RPS1(GPIO3_MSK);577WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);578#if RPS_IRQ579// issue RPS1 interrupt580WRITE_RPS1(CMD_INTERRUPT);581#endif582// Jump to begin of RPS program (p37)583WRITE_RPS1(CMD_JUMP);584WRITE_RPS1(dev->d_rps1.dma_handle);585586// Fix VSYNC level587saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);588// Set RPS1 Address register to point to RPS code (r108 p42)589saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);590591if (!(budget = kmalloc (sizeof(struct budget_patch), GFP_KERNEL)))592return -ENOMEM;593594dprintk(2, "budget: %p\n", budget);595596err = ttpci_budget_init(budget, dev, info, THIS_MODULE, adapter_nr);597if (err) {598kfree(budget);599return err;600}601602// Set Source Line Counter Threshold, using BRS (rCC p43)603// It generates HS event every TS_HEIGHT lines604// this is related to TS_WIDTH set in register605// NUM_LINE_BYTE3 in budget-core.c. If NUM_LINE_BYTE606// low 16 bits are set to TS_WIDTH bytes (TS_WIDTH=2*188607//,then RPS_THRESH1608// should be set to trigger every TS_HEIGHT (512) lines.609//610saa7146_write(dev, RPS_THRESH1, budget->buffer_height | MASK_12 );611612// saa7146_write(dev, RPS_THRESH0, ((TS_HEIGHT/2)<<16) |MASK_28| (TS_HEIGHT/2) |MASK_12 );613// Enable RPS1 (rFC p33)614saa7146_write(dev, MC1, (MASK_13 | MASK_29));615616617dev->ext_priv = budget;618619budget->dvb_adapter.priv = budget;620frontend_init(budget);621622ttpci_budget_init_hooks(budget);623624return 0;625}626627static int budget_patch_detach (struct saa7146_dev* dev)628{629struct budget_patch *budget = (struct budget_patch*) dev->ext_priv;630int err;631632if (budget->dvb_frontend) {633dvb_unregister_frontend(budget->dvb_frontend);634dvb_frontend_detach(budget->dvb_frontend);635}636err = ttpci_budget_deinit (budget);637638kfree (budget);639640return err;641}642643static int __init budget_patch_init(void)644{645return saa7146_register_extension(&budget_extension);646}647648static void __exit budget_patch_exit(void)649{650saa7146_unregister_extension(&budget_extension);651}652653static struct saa7146_extension budget_extension = {654.name = "budget_patch dvb",655.flags = 0,656657.module = THIS_MODULE,658.pci_tbl = pci_tbl,659.attach = budget_patch_attach,660.detach = budget_patch_detach,661662.irq_mask = MASK_10,663.irq_func = ttpci_budget_irq10_handler,664};665666module_init(budget_patch_init);667module_exit(budget_patch_exit);668669MODULE_LICENSE("GPL");670MODULE_AUTHOR("Emard, Roberto Deza, Holger Waechtler, Michael Hunold, others");671MODULE_DESCRIPTION("Driver for full TS modified DVB-S SAA7146+AV7110 "672"based so-called Budget Patch cards");673674675