Path: blob/master/drivers/media/video/bt8xx/bt848.h
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/*1bt848.h - Bt848 register offsets23Copyright (C) 1996,97,98 Ralph Metzler ([email protected])45This program is free software; you can redistribute it and/or modify6it under the terms of the GNU General Public License as published by7the Free Software Foundation; either version 2 of the License, or8(at your option) any later version.910This program is distributed in the hope that it will be useful,11but WITHOUT ANY WARRANTY; without even the implied warranty of12MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the13GNU General Public License for more details.1415You should have received a copy of the GNU General Public License16along with this program; if not, write to the Free Software17Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.18*/1920#ifndef _BT848_H_21#define _BT848_H_2223#ifndef PCI_VENDOR_ID_BROOKTREE24#define PCI_VENDOR_ID_BROOKTREE 0x109e25#endif26#ifndef PCI_DEVICE_ID_BT84827#define PCI_DEVICE_ID_BT848 0x35028#endif29#ifndef PCI_DEVICE_ID_BT84930#define PCI_DEVICE_ID_BT849 0x35131#endif32#ifndef PCI_DEVICE_ID_BT87833#define PCI_DEVICE_ID_BT878 0x36e34#endif35#ifndef PCI_DEVICE_ID_BT87936#define PCI_DEVICE_ID_BT879 0x36f37#endif383940/* Brooktree 848 registers */4142#define BT848_DSTATUS 0x00043#define BT848_DSTATUS_PRES (1<<7)44#define BT848_DSTATUS_HLOC (1<<6)45#define BT848_DSTATUS_FIELD (1<<5)46#define BT848_DSTATUS_NUML (1<<4)47#define BT848_DSTATUS_CSEL (1<<3)48#define BT848_DSTATUS_PLOCK (1<<2)49#define BT848_DSTATUS_LOF (1<<1)50#define BT848_DSTATUS_COF (1<<0)5152#define BT848_IFORM 0x00453#define BT848_IFORM_HACTIVE (1<<7)54#define BT848_IFORM_MUXSEL (3<<5)55#define BT848_IFORM_MUX0 (2<<5)56#define BT848_IFORM_MUX1 (3<<5)57#define BT848_IFORM_MUX2 (1<<5)58#define BT848_IFORM_XTSEL (3<<3)59#define BT848_IFORM_XT0 (1<<3)60#define BT848_IFORM_XT1 (2<<3)61#define BT848_IFORM_XTAUTO (3<<3)62#define BT848_IFORM_XTBOTH (3<<3)63#define BT848_IFORM_NTSC 164#define BT848_IFORM_NTSC_J 265#define BT848_IFORM_PAL_BDGHI 366#define BT848_IFORM_PAL_M 467#define BT848_IFORM_PAL_N 568#define BT848_IFORM_SECAM 669#define BT848_IFORM_PAL_NC 770#define BT848_IFORM_AUTO 071#define BT848_IFORM_NORM 77273#define BT848_TDEC 0x00874#define BT848_TDEC_DEC_FIELD (1<<7)75#define BT848_TDEC_FLDALIGN (1<<6)76#define BT848_TDEC_DEC_RAT (0x1f)7778#define BT848_E_CROP 0x00C79#define BT848_O_CROP 0x08C8081#define BT848_E_VDELAY_LO 0x01082#define BT848_O_VDELAY_LO 0x0908384#define BT848_E_VACTIVE_LO 0x01485#define BT848_O_VACTIVE_LO 0x0948687#define BT848_E_HDELAY_LO 0x01888#define BT848_O_HDELAY_LO 0x0988990#define BT848_E_HACTIVE_LO 0x01C91#define BT848_O_HACTIVE_LO 0x09C9293#define BT848_E_HSCALE_HI 0x02094#define BT848_O_HSCALE_HI 0x0A09596#define BT848_E_HSCALE_LO 0x02497#define BT848_O_HSCALE_LO 0x0A49899#define BT848_BRIGHT 0x028100101#define BT848_E_CONTROL 0x02C102#define BT848_O_CONTROL 0x0AC103#define BT848_CONTROL_LNOTCH (1<<7)104#define BT848_CONTROL_COMP (1<<6)105#define BT848_CONTROL_LDEC (1<<5)106#define BT848_CONTROL_CBSENSE (1<<4)107#define BT848_CONTROL_CON_MSB (1<<2)108#define BT848_CONTROL_SAT_U_MSB (1<<1)109#define BT848_CONTROL_SAT_V_MSB (1<<0)110111#define BT848_CONTRAST_LO 0x030112#define BT848_SAT_U_LO 0x034113#define BT848_SAT_V_LO 0x038114#define BT848_HUE 0x03C115116#define BT848_E_SCLOOP 0x040117#define BT848_O_SCLOOP 0x0C0118#define BT848_SCLOOP_CAGC (1<<6)119#define BT848_SCLOOP_CKILL (1<<5)120#define BT848_SCLOOP_HFILT_AUTO (0<<3)121#define BT848_SCLOOP_HFILT_CIF (1<<3)122#define BT848_SCLOOP_HFILT_QCIF (2<<3)123#define BT848_SCLOOP_HFILT_ICON (3<<3)124125#define BT848_SCLOOP_PEAK (1<<7)126#define BT848_SCLOOP_HFILT_MINP (1<<3)127#define BT848_SCLOOP_HFILT_MEDP (2<<3)128#define BT848_SCLOOP_HFILT_MAXP (3<<3)129130131#define BT848_OFORM 0x048132#define BT848_OFORM_RANGE (1<<7)133#define BT848_OFORM_CORE0 (0<<5)134#define BT848_OFORM_CORE8 (1<<5)135#define BT848_OFORM_CORE16 (2<<5)136#define BT848_OFORM_CORE32 (3<<5)137138#define BT848_E_VSCALE_HI 0x04C139#define BT848_O_VSCALE_HI 0x0CC140#define BT848_VSCALE_YCOMB (1<<7)141#define BT848_VSCALE_COMB (1<<6)142#define BT848_VSCALE_INT (1<<5)143#define BT848_VSCALE_HI 15144145#define BT848_E_VSCALE_LO 0x050146#define BT848_O_VSCALE_LO 0x0D0147#define BT848_TEST 0x054148#define BT848_ADELAY 0x060149#define BT848_BDELAY 0x064150151#define BT848_ADC 0x068152#define BT848_ADC_RESERVED (2<<6)153#define BT848_ADC_SYNC_T (1<<5)154#define BT848_ADC_AGC_EN (1<<4)155#define BT848_ADC_CLK_SLEEP (1<<3)156#define BT848_ADC_Y_SLEEP (1<<2)157#define BT848_ADC_C_SLEEP (1<<1)158#define BT848_ADC_CRUSH (1<<0)159160#define BT848_WC_UP 0x044161#define BT848_WC_DOWN 0x078162163#define BT848_E_VTC 0x06C164#define BT848_O_VTC 0x0EC165#define BT848_VTC_HSFMT (1<<7)166#define BT848_VTC_VFILT_2TAP 0167#define BT848_VTC_VFILT_3TAP 1168#define BT848_VTC_VFILT_4TAP 2169#define BT848_VTC_VFILT_5TAP 3170171#define BT848_SRESET 0x07C172173#define BT848_COLOR_FMT 0x0D4174#define BT848_COLOR_FMT_O_RGB32 (0<<4)175#define BT848_COLOR_FMT_O_RGB24 (1<<4)176#define BT848_COLOR_FMT_O_RGB16 (2<<4)177#define BT848_COLOR_FMT_O_RGB15 (3<<4)178#define BT848_COLOR_FMT_O_YUY2 (4<<4)179#define BT848_COLOR_FMT_O_BtYUV (5<<4)180#define BT848_COLOR_FMT_O_Y8 (6<<4)181#define BT848_COLOR_FMT_O_RGB8 (7<<4)182#define BT848_COLOR_FMT_O_YCrCb422 (8<<4)183#define BT848_COLOR_FMT_O_YCrCb411 (9<<4)184#define BT848_COLOR_FMT_O_RAW (14<<4)185#define BT848_COLOR_FMT_E_RGB32 0186#define BT848_COLOR_FMT_E_RGB24 1187#define BT848_COLOR_FMT_E_RGB16 2188#define BT848_COLOR_FMT_E_RGB15 3189#define BT848_COLOR_FMT_E_YUY2 4190#define BT848_COLOR_FMT_E_BtYUV 5191#define BT848_COLOR_FMT_E_Y8 6192#define BT848_COLOR_FMT_E_RGB8 7193#define BT848_COLOR_FMT_E_YCrCb422 8194#define BT848_COLOR_FMT_E_YCrCb411 9195#define BT848_COLOR_FMT_E_RAW 14196197#define BT848_COLOR_FMT_RGB32 0x00198#define BT848_COLOR_FMT_RGB24 0x11199#define BT848_COLOR_FMT_RGB16 0x22200#define BT848_COLOR_FMT_RGB15 0x33201#define BT848_COLOR_FMT_YUY2 0x44202#define BT848_COLOR_FMT_BtYUV 0x55203#define BT848_COLOR_FMT_Y8 0x66204#define BT848_COLOR_FMT_RGB8 0x77205#define BT848_COLOR_FMT_YCrCb422 0x88206#define BT848_COLOR_FMT_YCrCb411 0x99207#define BT848_COLOR_FMT_RAW 0xee208209#define BT848_VTOTAL_LO 0xB0210#define BT848_VTOTAL_HI 0xB4211212#define BT848_COLOR_CTL 0x0D8213#define BT848_COLOR_CTL_EXT_FRMRATE (1<<7)214#define BT848_COLOR_CTL_COLOR_BARS (1<<6)215#define BT848_COLOR_CTL_RGB_DED (1<<5)216#define BT848_COLOR_CTL_GAMMA (1<<4)217#define BT848_COLOR_CTL_WSWAP_ODD (1<<3)218#define BT848_COLOR_CTL_WSWAP_EVEN (1<<2)219#define BT848_COLOR_CTL_BSWAP_ODD (1<<1)220#define BT848_COLOR_CTL_BSWAP_EVEN (1<<0)221222#define BT848_CAP_CTL 0x0DC223#define BT848_CAP_CTL_DITH_FRAME (1<<4)224#define BT848_CAP_CTL_CAPTURE_VBI_ODD (1<<3)225#define BT848_CAP_CTL_CAPTURE_VBI_EVEN (1<<2)226#define BT848_CAP_CTL_CAPTURE_ODD (1<<1)227#define BT848_CAP_CTL_CAPTURE_EVEN (1<<0)228229#define BT848_VBI_PACK_SIZE 0x0E0230231#define BT848_VBI_PACK_DEL 0x0E4232#define BT848_VBI_PACK_DEL_VBI_HDELAY 0xfc233#define BT848_VBI_PACK_DEL_EXT_FRAME 2234#define BT848_VBI_PACK_DEL_VBI_PKT_HI 1235236237#define BT848_INT_STAT 0x100238#define BT848_INT_MASK 0x104239240#define BT848_INT_ETBF (1<<23)241242#define BT848_INT_RISCS (0xf<<28)243#define BT848_INT_RISC_EN (1<<27)244#define BT848_INT_RACK (1<<25)245#define BT848_INT_FIELD (1<<24)246#define BT848_INT_SCERR (1<<19)247#define BT848_INT_OCERR (1<<18)248#define BT848_INT_PABORT (1<<17)249#define BT848_INT_RIPERR (1<<16)250#define BT848_INT_PPERR (1<<15)251#define BT848_INT_FDSR (1<<14)252#define BT848_INT_FTRGT (1<<13)253#define BT848_INT_FBUS (1<<12)254#define BT848_INT_RISCI (1<<11)255#define BT848_INT_GPINT (1<<9)256#define BT848_INT_I2CDONE (1<<8)257#define BT848_INT_VPRES (1<<5)258#define BT848_INT_HLOCK (1<<4)259#define BT848_INT_OFLOW (1<<3)260#define BT848_INT_HSYNC (1<<2)261#define BT848_INT_VSYNC (1<<1)262#define BT848_INT_FMTCHG (1<<0)263264265#define BT848_GPIO_DMA_CTL 0x10C266#define BT848_GPIO_DMA_CTL_GPINTC (1<<15)267#define BT848_GPIO_DMA_CTL_GPINTI (1<<14)268#define BT848_GPIO_DMA_CTL_GPWEC (1<<13)269#define BT848_GPIO_DMA_CTL_GPIOMODE (3<<11)270#define BT848_GPIO_DMA_CTL_GPCLKMODE (1<<10)271#define BT848_GPIO_DMA_CTL_PLTP23_4 (0<<6)272#define BT848_GPIO_DMA_CTL_PLTP23_8 (1<<6)273#define BT848_GPIO_DMA_CTL_PLTP23_16 (2<<6)274#define BT848_GPIO_DMA_CTL_PLTP23_32 (3<<6)275#define BT848_GPIO_DMA_CTL_PLTP1_4 (0<<4)276#define BT848_GPIO_DMA_CTL_PLTP1_8 (1<<4)277#define BT848_GPIO_DMA_CTL_PLTP1_16 (2<<4)278#define BT848_GPIO_DMA_CTL_PLTP1_32 (3<<4)279#define BT848_GPIO_DMA_CTL_PKTP_4 (0<<2)280#define BT848_GPIO_DMA_CTL_PKTP_8 (1<<2)281#define BT848_GPIO_DMA_CTL_PKTP_16 (2<<2)282#define BT848_GPIO_DMA_CTL_PKTP_32 (3<<2)283#define BT848_GPIO_DMA_CTL_RISC_ENABLE (1<<1)284#define BT848_GPIO_DMA_CTL_FIFO_ENABLE (1<<0)285286#define BT848_I2C 0x110287#define BT878_I2C_MODE (1<<7)288#define BT878_I2C_RATE (1<<6)289#define BT878_I2C_NOSTOP (1<<5)290#define BT878_I2C_NOSTART (1<<4)291#define BT848_I2C_DIV (0xf<<4)292#define BT848_I2C_SYNC (1<<3)293#define BT848_I2C_W3B (1<<2)294#define BT848_I2C_SCL (1<<1)295#define BT848_I2C_SDA (1<<0)296297#define BT848_RISC_STRT_ADD 0x114298#define BT848_GPIO_OUT_EN 0x118299#define BT848_GPIO_REG_INP 0x11C300#define BT848_RISC_COUNT 0x120301#define BT848_GPIO_DATA 0x200302303304/* Bt848 RISC commands */305306/* only for the SYNC RISC command */307#define BT848_FIFO_STATUS_FM1 0x06308#define BT848_FIFO_STATUS_FM3 0x0e309#define BT848_FIFO_STATUS_SOL 0x02310#define BT848_FIFO_STATUS_EOL4 0x01311#define BT848_FIFO_STATUS_EOL3 0x0d312#define BT848_FIFO_STATUS_EOL2 0x09313#define BT848_FIFO_STATUS_EOL1 0x05314#define BT848_FIFO_STATUS_VRE 0x04315#define BT848_FIFO_STATUS_VRO 0x0c316#define BT848_FIFO_STATUS_PXV 0x00317318#define BT848_RISC_RESYNC (1<<15)319320/* WRITE and SKIP */321/* disable which bytes of each DWORD */322#define BT848_RISC_BYTE0 (1U<<12)323#define BT848_RISC_BYTE1 (1U<<13)324#define BT848_RISC_BYTE2 (1U<<14)325#define BT848_RISC_BYTE3 (1U<<15)326#define BT848_RISC_BYTE_ALL (0x0fU<<12)327#define BT848_RISC_BYTE_NONE 0328/* cause RISCI */329#define BT848_RISC_IRQ (1U<<24)330/* RISC command is last one in this line */331#define BT848_RISC_EOL (1U<<26)332/* RISC command is first one in this line */333#define BT848_RISC_SOL (1U<<27)334335#define BT848_RISC_WRITE (0x01U<<28)336#define BT848_RISC_SKIP (0x02U<<28)337#define BT848_RISC_WRITEC (0x05U<<28)338#define BT848_RISC_JUMP (0x07U<<28)339#define BT848_RISC_SYNC (0x08U<<28)340341#define BT848_RISC_WRITE123 (0x09U<<28)342#define BT848_RISC_SKIP123 (0x0aU<<28)343#define BT848_RISC_WRITE1S23 (0x0bU<<28)344345346/* Bt848A and higher only !! */347#define BT848_TGLB 0x080348#define BT848_TGCTRL 0x084349#define BT848_FCAP 0x0E8350#define BT848_PLL_F_LO 0x0F0351#define BT848_PLL_F_HI 0x0F4352353#define BT848_PLL_XCI 0x0F8354#define BT848_PLL_X (1<<7)355#define BT848_PLL_C (1<<6)356357#define BT848_DVSIF 0x0FC358359/* Bt878 register */360361#define BT878_DEVCTRL 0x40362#define BT878_EN_TBFX 0x02363#define BT878_EN_VSFX 0x04364365#endif366367368