Path: blob/master/drivers/media/video/cx88/cx88-tvaudio.c
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/*12cx88x-audio.c - Conexant CX23880/23881 audio downstream driver driver34(c) 2001 Michael Eskin, Tom Zakrajsek [Windows version]5(c) 2002 Yurij Sysoev <[email protected]>6(c) 2003 Gerd Knorr <[email protected]>78-----------------------------------------------------------------------910Lot of voodoo here. Even the data sheet doesn't help to11understand what is going on here, the documentation for the audio12part of the cx2388x chip is *very* bad.1314Some of this comes from party done linux driver sources I got from15[undocumented].1617Some comes from the dscaler sources, one of the dscaler driver guy works18for Conexant ...1920-----------------------------------------------------------------------2122This program is free software; you can redistribute it and/or modify23it under the terms of the GNU General Public License as published by24the Free Software Foundation; either version 2 of the License, or25(at your option) any later version.2627This program is distributed in the hope that it will be useful,28but WITHOUT ANY WARRANTY; without even the implied warranty of29MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the30GNU General Public License for more details.3132You should have received a copy of the GNU General Public License33along with this program; if not, write to the Free Software34Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.35*/3637#include <linux/module.h>38#include <linux/errno.h>39#include <linux/freezer.h>40#include <linux/kernel.h>41#include <linux/mm.h>42#include <linux/poll.h>43#include <linux/signal.h>44#include <linux/ioport.h>45#include <linux/types.h>46#include <linux/interrupt.h>47#include <linux/vmalloc.h>48#include <linux/init.h>49#include <linux/delay.h>50#include <linux/kthread.h>5152#include "cx88.h"5354static unsigned int audio_debug;55module_param(audio_debug, int, 0644);56MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]");5758static unsigned int always_analog;59module_param(always_analog,int,0644);60MODULE_PARM_DESC(always_analog,"force analog audio out");6162static unsigned int radio_deemphasis;63module_param(radio_deemphasis,int,0644);64MODULE_PARM_DESC(radio_deemphasis, "Radio deemphasis time constant, "65"0=None, 1=50us (elsewhere), 2=75us (USA)");6667#define dprintk(fmt, arg...) if (audio_debug) \68printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)6970/* ----------------------------------------------------------- */7172static const char * const aud_ctl_names[64] = {73[EN_BTSC_FORCE_MONO] = "BTSC_FORCE_MONO",74[EN_BTSC_FORCE_STEREO] = "BTSC_FORCE_STEREO",75[EN_BTSC_FORCE_SAP] = "BTSC_FORCE_SAP",76[EN_BTSC_AUTO_STEREO] = "BTSC_AUTO_STEREO",77[EN_BTSC_AUTO_SAP] = "BTSC_AUTO_SAP",78[EN_A2_FORCE_MONO1] = "A2_FORCE_MONO1",79[EN_A2_FORCE_MONO2] = "A2_FORCE_MONO2",80[EN_A2_FORCE_STEREO] = "A2_FORCE_STEREO",81[EN_A2_AUTO_MONO2] = "A2_AUTO_MONO2",82[EN_A2_AUTO_STEREO] = "A2_AUTO_STEREO",83[EN_EIAJ_FORCE_MONO1] = "EIAJ_FORCE_MONO1",84[EN_EIAJ_FORCE_MONO2] = "EIAJ_FORCE_MONO2",85[EN_EIAJ_FORCE_STEREO] = "EIAJ_FORCE_STEREO",86[EN_EIAJ_AUTO_MONO2] = "EIAJ_AUTO_MONO2",87[EN_EIAJ_AUTO_STEREO] = "EIAJ_AUTO_STEREO",88[EN_NICAM_FORCE_MONO1] = "NICAM_FORCE_MONO1",89[EN_NICAM_FORCE_MONO2] = "NICAM_FORCE_MONO2",90[EN_NICAM_FORCE_STEREO] = "NICAM_FORCE_STEREO",91[EN_NICAM_AUTO_MONO2] = "NICAM_AUTO_MONO2",92[EN_NICAM_AUTO_STEREO] = "NICAM_AUTO_STEREO",93[EN_FMRADIO_FORCE_MONO] = "FMRADIO_FORCE_MONO",94[EN_FMRADIO_FORCE_STEREO] = "FMRADIO_FORCE_STEREO",95[EN_FMRADIO_AUTO_STEREO] = "FMRADIO_AUTO_STEREO",96};9798struct rlist {99u32 reg;100u32 val;101};102103static void set_audio_registers(struct cx88_core *core, const struct rlist *l)104{105int i;106107for (i = 0; l[i].reg; i++) {108switch (l[i].reg) {109case AUD_PDF_DDS_CNST_BYTE2:110case AUD_PDF_DDS_CNST_BYTE1:111case AUD_PDF_DDS_CNST_BYTE0:112case AUD_QAM_MODE:113case AUD_PHACC_FREQ_8MSB:114case AUD_PHACC_FREQ_8LSB:115cx_writeb(l[i].reg, l[i].val);116break;117default:118cx_write(l[i].reg, l[i].val);119break;120}121}122}123124static void set_audio_start(struct cx88_core *core, u32 mode)125{126/* mute */127cx_write(AUD_VOL_CTL, (1 << 6));128129/* start programming */130cx_write(AUD_INIT, mode);131cx_write(AUD_INIT_LD, 0x0001);132cx_write(AUD_SOFT_RESET, 0x0001);133}134135static void set_audio_finish(struct cx88_core *core, u32 ctl)136{137u32 volume;138139/* restart dma; This avoids buzz in NICAM and is good in others */140cx88_stop_audio_dma(core);141cx_write(AUD_RATE_THRES_DMD, 0x000000C0);142cx88_start_audio_dma(core);143144if (core->board.mpeg & CX88_MPEG_BLACKBIRD) {145cx_write(AUD_I2SINPUTCNTL, 4);146cx_write(AUD_BAUDRATE, 1);147/* 'pass-thru mode': this enables the i2s output to the mpeg encoder */148cx_set(AUD_CTL, EN_I2SOUT_ENABLE);149cx_write(AUD_I2SOUTPUTCNTL, 1);150cx_write(AUD_I2SCNTL, 0);151/* cx_write(AUD_APB_IN_RATE_ADJ, 0); */152}153if ((always_analog) || (!(core->board.mpeg & CX88_MPEG_BLACKBIRD))) {154ctl |= EN_DAC_ENABLE;155cx_write(AUD_CTL, ctl);156}157158/* finish programming */159cx_write(AUD_SOFT_RESET, 0x0000);160161/* unmute */162volume = cx_sread(SHADOW_AUD_VOL_CTL);163cx_swrite(SHADOW_AUD_VOL_CTL, AUD_VOL_CTL, volume);164165core->last_change = jiffies;166}167168/* ----------------------------------------------------------- */169170static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap,171u32 mode)172{173static const struct rlist btsc[] = {174{AUD_AFE_12DB_EN, 0x00000001},175{AUD_OUT1_SEL, 0x00000013},176{AUD_OUT1_SHIFT, 0x00000000},177{AUD_POLY0_DDS_CONSTANT, 0x0012010c},178{AUD_DMD_RA_DDS, 0x00c3e7aa},179{AUD_DBX_IN_GAIN, 0x00004734},180{AUD_DBX_WBE_GAIN, 0x00004640},181{AUD_DBX_SE_GAIN, 0x00008d31},182{AUD_DCOC_0_SRC, 0x0000001a},183{AUD_IIR1_4_SEL, 0x00000021},184{AUD_DCOC_PASS_IN, 0x00000003},185{AUD_DCOC_0_SHIFT_IN0, 0x0000000a},186{AUD_DCOC_0_SHIFT_IN1, 0x00000008},187{AUD_DCOC_1_SHIFT_IN0, 0x0000000a},188{AUD_DCOC_1_SHIFT_IN1, 0x00000008},189{AUD_DN0_FREQ, 0x0000283b},190{AUD_DN2_SRC_SEL, 0x00000008},191{AUD_DN2_FREQ, 0x00003000},192{AUD_DN2_AFC, 0x00000002},193{AUD_DN2_SHFT, 0x00000000},194{AUD_IIR2_2_SEL, 0x00000020},195{AUD_IIR2_2_SHIFT, 0x00000000},196{AUD_IIR2_3_SEL, 0x0000001f},197{AUD_IIR2_3_SHIFT, 0x00000000},198{AUD_CRDC1_SRC_SEL, 0x000003ce},199{AUD_CRDC1_SHIFT, 0x00000000},200{AUD_CORDIC_SHIFT_1, 0x00000007},201{AUD_DCOC_1_SRC, 0x0000001b},202{AUD_DCOC1_SHIFT, 0x00000000},203{AUD_RDSI_SEL, 0x00000008},204{AUD_RDSQ_SEL, 0x00000008},205{AUD_RDSI_SHIFT, 0x00000000},206{AUD_RDSQ_SHIFT, 0x00000000},207{AUD_POLYPH80SCALEFAC, 0x00000003},208{ /* end of list */ },209};210static const struct rlist btsc_sap[] = {211{AUD_AFE_12DB_EN, 0x00000001},212{AUD_DBX_IN_GAIN, 0x00007200},213{AUD_DBX_WBE_GAIN, 0x00006200},214{AUD_DBX_SE_GAIN, 0x00006200},215{AUD_IIR1_1_SEL, 0x00000000},216{AUD_IIR1_3_SEL, 0x00000001},217{AUD_DN1_SRC_SEL, 0x00000007},218{AUD_IIR1_4_SHIFT, 0x00000006},219{AUD_IIR2_1_SHIFT, 0x00000000},220{AUD_IIR2_2_SHIFT, 0x00000000},221{AUD_IIR3_0_SHIFT, 0x00000000},222{AUD_IIR3_1_SHIFT, 0x00000000},223{AUD_IIR3_0_SEL, 0x0000000d},224{AUD_IIR3_1_SEL, 0x0000000e},225{AUD_DEEMPH1_SRC_SEL, 0x00000014},226{AUD_DEEMPH1_SHIFT, 0x00000000},227{AUD_DEEMPH1_G0, 0x00004000},228{AUD_DEEMPH1_A0, 0x00000000},229{AUD_DEEMPH1_B0, 0x00000000},230{AUD_DEEMPH1_A1, 0x00000000},231{AUD_DEEMPH1_B1, 0x00000000},232{AUD_OUT0_SEL, 0x0000003f},233{AUD_OUT1_SEL, 0x0000003f},234{AUD_DN1_AFC, 0x00000002},235{AUD_DCOC_0_SHIFT_IN0, 0x0000000a},236{AUD_DCOC_0_SHIFT_IN1, 0x00000008},237{AUD_DCOC_1_SHIFT_IN0, 0x0000000a},238{AUD_DCOC_1_SHIFT_IN1, 0x00000008},239{AUD_IIR1_0_SEL, 0x0000001d},240{AUD_IIR1_2_SEL, 0x0000001e},241{AUD_IIR2_1_SEL, 0x00000002},242{AUD_IIR2_2_SEL, 0x00000004},243{AUD_IIR3_2_SEL, 0x0000000f},244{AUD_DCOC2_SHIFT, 0x00000001},245{AUD_IIR3_2_SHIFT, 0x00000001},246{AUD_DEEMPH0_SRC_SEL, 0x00000014},247{AUD_CORDIC_SHIFT_1, 0x00000006},248{AUD_POLY0_DDS_CONSTANT, 0x000e4db2},249{AUD_DMD_RA_DDS, 0x00f696e6},250{AUD_IIR2_3_SEL, 0x00000025},251{AUD_IIR1_4_SEL, 0x00000021},252{AUD_DN1_FREQ, 0x0000c965},253{AUD_DCOC_PASS_IN, 0x00000003},254{AUD_DCOC_0_SRC, 0x0000001a},255{AUD_DCOC_1_SRC, 0x0000001b},256{AUD_DCOC1_SHIFT, 0x00000000},257{AUD_RDSI_SEL, 0x00000009},258{AUD_RDSQ_SEL, 0x00000009},259{AUD_RDSI_SHIFT, 0x00000000},260{AUD_RDSQ_SHIFT, 0x00000000},261{AUD_POLYPH80SCALEFAC, 0x00000003},262{ /* end of list */ },263};264265mode |= EN_FMRADIO_EN_RDS;266267if (sap) {268dprintk("%s SAP (status: unknown)\n", __func__);269set_audio_start(core, SEL_SAP);270set_audio_registers(core, btsc_sap);271set_audio_finish(core, mode);272} else {273dprintk("%s (status: known-good)\n", __func__);274set_audio_start(core, SEL_BTSC);275set_audio_registers(core, btsc);276set_audio_finish(core, mode);277}278}279280static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode)281{282static const struct rlist nicam_l[] = {283{AUD_AFE_12DB_EN, 0x00000001},284{AUD_RATE_ADJ1, 0x00000060},285{AUD_RATE_ADJ2, 0x000000F9},286{AUD_RATE_ADJ3, 0x000001CC},287{AUD_RATE_ADJ4, 0x000002B3},288{AUD_RATE_ADJ5, 0x00000726},289{AUD_DEEMPHDENOM1_R, 0x0000F3D0},290{AUD_DEEMPHDENOM2_R, 0x00000000},291{AUD_ERRLOGPERIOD_R, 0x00000064},292{AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},293{AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},294{AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},295{AUD_POLYPH80SCALEFAC, 0x00000003},296{AUD_DMD_RA_DDS, 0x00C00000},297{AUD_PLL_INT, 0x0000001E},298{AUD_PLL_DDS, 0x00000000},299{AUD_PLL_FRAC, 0x0000E542},300{AUD_START_TIMER, 0x00000000},301{AUD_DEEMPHNUMER1_R, 0x000353DE},302{AUD_DEEMPHNUMER2_R, 0x000001B1},303{AUD_PDF_DDS_CNST_BYTE2, 0x06},304{AUD_PDF_DDS_CNST_BYTE1, 0x82},305{AUD_PDF_DDS_CNST_BYTE0, 0x12},306{AUD_QAM_MODE, 0x05},307{AUD_PHACC_FREQ_8MSB, 0x34},308{AUD_PHACC_FREQ_8LSB, 0x4C},309{AUD_DEEMPHGAIN_R, 0x00006680},310{AUD_RATE_THRES_DMD, 0x000000C0},311{ /* end of list */ },312};313314static const struct rlist nicam_bgdki_common[] = {315{AUD_AFE_12DB_EN, 0x00000001},316{AUD_RATE_ADJ1, 0x00000010},317{AUD_RATE_ADJ2, 0x00000040},318{AUD_RATE_ADJ3, 0x00000100},319{AUD_RATE_ADJ4, 0x00000400},320{AUD_RATE_ADJ5, 0x00001000},321{AUD_ERRLOGPERIOD_R, 0x00000fff},322{AUD_ERRINTRPTTHSHLD1_R, 0x000003ff},323{AUD_ERRINTRPTTHSHLD2_R, 0x000000ff},324{AUD_ERRINTRPTTHSHLD3_R, 0x0000003f},325{AUD_POLYPH80SCALEFAC, 0x00000003},326{AUD_DEEMPHGAIN_R, 0x000023c2},327{AUD_DEEMPHNUMER1_R, 0x0002a7bc},328{AUD_DEEMPHNUMER2_R, 0x0003023e},329{AUD_DEEMPHDENOM1_R, 0x0000f3d0},330{AUD_DEEMPHDENOM2_R, 0x00000000},331{AUD_PDF_DDS_CNST_BYTE2, 0x06},332{AUD_PDF_DDS_CNST_BYTE1, 0x82},333{AUD_QAM_MODE, 0x05},334{ /* end of list */ },335};336337static const struct rlist nicam_i[] = {338{AUD_PDF_DDS_CNST_BYTE0, 0x12},339{AUD_PHACC_FREQ_8MSB, 0x3a},340{AUD_PHACC_FREQ_8LSB, 0x93},341{ /* end of list */ },342};343344static const struct rlist nicam_default[] = {345{AUD_PDF_DDS_CNST_BYTE0, 0x16},346{AUD_PHACC_FREQ_8MSB, 0x34},347{AUD_PHACC_FREQ_8LSB, 0x4c},348{ /* end of list */ },349};350351set_audio_start(core,SEL_NICAM);352switch (core->tvaudio) {353case WW_L:354dprintk("%s SECAM-L NICAM (status: devel)\n", __func__);355set_audio_registers(core, nicam_l);356break;357case WW_I:358dprintk("%s PAL-I NICAM (status: known-good)\n", __func__);359set_audio_registers(core, nicam_bgdki_common);360set_audio_registers(core, nicam_i);361break;362case WW_NONE:363case WW_BTSC:364case WW_BG:365case WW_DK:366case WW_EIAJ:367case WW_I2SPT:368case WW_FM:369case WW_I2SADC:370case WW_M:371dprintk("%s PAL-BGDK NICAM (status: known-good)\n", __func__);372set_audio_registers(core, nicam_bgdki_common);373set_audio_registers(core, nicam_default);374break;375};376377mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS;378set_audio_finish(core, mode);379}380381static void set_audio_standard_A2(struct cx88_core *core, u32 mode)382{383static const struct rlist a2_bgdk_common[] = {384{AUD_ERRLOGPERIOD_R, 0x00000064},385{AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},386{AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},387{AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},388{AUD_PDF_DDS_CNST_BYTE2, 0x06},389{AUD_PDF_DDS_CNST_BYTE1, 0x82},390{AUD_PDF_DDS_CNST_BYTE0, 0x12},391{AUD_QAM_MODE, 0x05},392{AUD_PHACC_FREQ_8MSB, 0x34},393{AUD_PHACC_FREQ_8LSB, 0x4c},394{AUD_RATE_ADJ1, 0x00000100},395{AUD_RATE_ADJ2, 0x00000200},396{AUD_RATE_ADJ3, 0x00000300},397{AUD_RATE_ADJ4, 0x00000400},398{AUD_RATE_ADJ5, 0x00000500},399{AUD_THR_FR, 0x00000000},400{AAGC_HYST, 0x0000001a},401{AUD_PILOT_BQD_1_K0, 0x0000755b},402{AUD_PILOT_BQD_1_K1, 0x00551340},403{AUD_PILOT_BQD_1_K2, 0x006d30be},404{AUD_PILOT_BQD_1_K3, 0xffd394af},405{AUD_PILOT_BQD_1_K4, 0x00400000},406{AUD_PILOT_BQD_2_K0, 0x00040000},407{AUD_PILOT_BQD_2_K1, 0x002a4841},408{AUD_PILOT_BQD_2_K2, 0x00400000},409{AUD_PILOT_BQD_2_K3, 0x00000000},410{AUD_PILOT_BQD_2_K4, 0x00000000},411{AUD_MODE_CHG_TIMER, 0x00000040},412{AUD_AFE_12DB_EN, 0x00000001},413{AUD_CORDIC_SHIFT_0, 0x00000007},414{AUD_CORDIC_SHIFT_1, 0x00000007},415{AUD_DEEMPH0_G0, 0x00000380},416{AUD_DEEMPH1_G0, 0x00000380},417{AUD_DCOC_0_SRC, 0x0000001a},418{AUD_DCOC0_SHIFT, 0x00000000},419{AUD_DCOC_0_SHIFT_IN0, 0x0000000a},420{AUD_DCOC_0_SHIFT_IN1, 0x00000008},421{AUD_DCOC_PASS_IN, 0x00000003},422{AUD_IIR3_0_SEL, 0x00000021},423{AUD_DN2_AFC, 0x00000002},424{AUD_DCOC_1_SRC, 0x0000001b},425{AUD_DCOC1_SHIFT, 0x00000000},426{AUD_DCOC_1_SHIFT_IN0, 0x0000000a},427{AUD_DCOC_1_SHIFT_IN1, 0x00000008},428{AUD_IIR3_1_SEL, 0x00000023},429{AUD_RDSI_SEL, 0x00000017},430{AUD_RDSI_SHIFT, 0x00000000},431{AUD_RDSQ_SEL, 0x00000017},432{AUD_RDSQ_SHIFT, 0x00000000},433{AUD_PLL_INT, 0x0000001e},434{AUD_PLL_DDS, 0x00000000},435{AUD_PLL_FRAC, 0x0000e542},436{AUD_POLYPH80SCALEFAC, 0x00000001},437{AUD_START_TIMER, 0x00000000},438{ /* end of list */ },439};440441static const struct rlist a2_bg[] = {442{AUD_DMD_RA_DDS, 0x002a4f2f},443{AUD_C1_UP_THR, 0x00007000},444{AUD_C1_LO_THR, 0x00005400},445{AUD_C2_UP_THR, 0x00005400},446{AUD_C2_LO_THR, 0x00003000},447{ /* end of list */ },448};449450static const struct rlist a2_dk[] = {451{AUD_DMD_RA_DDS, 0x002a4f2f},452{AUD_C1_UP_THR, 0x00007000},453{AUD_C1_LO_THR, 0x00005400},454{AUD_C2_UP_THR, 0x00005400},455{AUD_C2_LO_THR, 0x00003000},456{AUD_DN0_FREQ, 0x00003a1c},457{AUD_DN2_FREQ, 0x0000d2e0},458{ /* end of list */ },459};460461static const struct rlist a1_i[] = {462{AUD_ERRLOGPERIOD_R, 0x00000064},463{AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},464{AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},465{AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},466{AUD_PDF_DDS_CNST_BYTE2, 0x06},467{AUD_PDF_DDS_CNST_BYTE1, 0x82},468{AUD_PDF_DDS_CNST_BYTE0, 0x12},469{AUD_QAM_MODE, 0x05},470{AUD_PHACC_FREQ_8MSB, 0x3a},471{AUD_PHACC_FREQ_8LSB, 0x93},472{AUD_DMD_RA_DDS, 0x002a4f2f},473{AUD_PLL_INT, 0x0000001e},474{AUD_PLL_DDS, 0x00000004},475{AUD_PLL_FRAC, 0x0000e542},476{AUD_RATE_ADJ1, 0x00000100},477{AUD_RATE_ADJ2, 0x00000200},478{AUD_RATE_ADJ3, 0x00000300},479{AUD_RATE_ADJ4, 0x00000400},480{AUD_RATE_ADJ5, 0x00000500},481{AUD_THR_FR, 0x00000000},482{AUD_PILOT_BQD_1_K0, 0x0000755b},483{AUD_PILOT_BQD_1_K1, 0x00551340},484{AUD_PILOT_BQD_1_K2, 0x006d30be},485{AUD_PILOT_BQD_1_K3, 0xffd394af},486{AUD_PILOT_BQD_1_K4, 0x00400000},487{AUD_PILOT_BQD_2_K0, 0x00040000},488{AUD_PILOT_BQD_2_K1, 0x002a4841},489{AUD_PILOT_BQD_2_K2, 0x00400000},490{AUD_PILOT_BQD_2_K3, 0x00000000},491{AUD_PILOT_BQD_2_K4, 0x00000000},492{AUD_MODE_CHG_TIMER, 0x00000060},493{AUD_AFE_12DB_EN, 0x00000001},494{AAGC_HYST, 0x0000000a},495{AUD_CORDIC_SHIFT_0, 0x00000007},496{AUD_CORDIC_SHIFT_1, 0x00000007},497{AUD_C1_UP_THR, 0x00007000},498{AUD_C1_LO_THR, 0x00005400},499{AUD_C2_UP_THR, 0x00005400},500{AUD_C2_LO_THR, 0x00003000},501{AUD_DCOC_0_SRC, 0x0000001a},502{AUD_DCOC0_SHIFT, 0x00000000},503{AUD_DCOC_0_SHIFT_IN0, 0x0000000a},504{AUD_DCOC_0_SHIFT_IN1, 0x00000008},505{AUD_DCOC_PASS_IN, 0x00000003},506{AUD_IIR3_0_SEL, 0x00000021},507{AUD_DN2_AFC, 0x00000002},508{AUD_DCOC_1_SRC, 0x0000001b},509{AUD_DCOC1_SHIFT, 0x00000000},510{AUD_DCOC_1_SHIFT_IN0, 0x0000000a},511{AUD_DCOC_1_SHIFT_IN1, 0x00000008},512{AUD_IIR3_1_SEL, 0x00000023},513{AUD_DN0_FREQ, 0x000035a3},514{AUD_DN2_FREQ, 0x000029c7},515{AUD_CRDC0_SRC_SEL, 0x00000511},516{AUD_IIR1_0_SEL, 0x00000001},517{AUD_IIR1_1_SEL, 0x00000000},518{AUD_IIR3_2_SEL, 0x00000003},519{AUD_IIR3_2_SHIFT, 0x00000000},520{AUD_IIR3_0_SEL, 0x00000002},521{AUD_IIR2_0_SEL, 0x00000021},522{AUD_IIR2_0_SHIFT, 0x00000002},523{AUD_DEEMPH0_SRC_SEL, 0x0000000b},524{AUD_DEEMPH1_SRC_SEL, 0x0000000b},525{AUD_POLYPH80SCALEFAC, 0x00000001},526{AUD_START_TIMER, 0x00000000},527{ /* end of list */ },528};529530static const struct rlist am_l[] = {531{AUD_ERRLOGPERIOD_R, 0x00000064},532{AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},533{AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},534{AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},535{AUD_PDF_DDS_CNST_BYTE2, 0x48},536{AUD_PDF_DDS_CNST_BYTE1, 0x3D},537{AUD_QAM_MODE, 0x00},538{AUD_PDF_DDS_CNST_BYTE0, 0xf5},539{AUD_PHACC_FREQ_8MSB, 0x3a},540{AUD_PHACC_FREQ_8LSB, 0x4a},541{AUD_DEEMPHGAIN_R, 0x00006680},542{AUD_DEEMPHNUMER1_R, 0x000353DE},543{AUD_DEEMPHNUMER2_R, 0x000001B1},544{AUD_DEEMPHDENOM1_R, 0x0000F3D0},545{AUD_DEEMPHDENOM2_R, 0x00000000},546{AUD_FM_MODE_ENABLE, 0x00000007},547{AUD_POLYPH80SCALEFAC, 0x00000003},548{AUD_AFE_12DB_EN, 0x00000001},549{AAGC_GAIN, 0x00000000},550{AAGC_HYST, 0x00000018},551{AAGC_DEF, 0x00000020},552{AUD_DN0_FREQ, 0x00000000},553{AUD_POLY0_DDS_CONSTANT, 0x000E4DB2},554{AUD_DCOC_0_SRC, 0x00000021},555{AUD_IIR1_0_SEL, 0x00000000},556{AUD_IIR1_0_SHIFT, 0x00000007},557{AUD_IIR1_1_SEL, 0x00000002},558{AUD_IIR1_1_SHIFT, 0x00000000},559{AUD_DCOC_1_SRC, 0x00000003},560{AUD_DCOC1_SHIFT, 0x00000000},561{AUD_DCOC_PASS_IN, 0x00000000},562{AUD_IIR1_2_SEL, 0x00000023},563{AUD_IIR1_2_SHIFT, 0x00000000},564{AUD_IIR1_3_SEL, 0x00000004},565{AUD_IIR1_3_SHIFT, 0x00000007},566{AUD_IIR1_4_SEL, 0x00000005},567{AUD_IIR1_4_SHIFT, 0x00000007},568{AUD_IIR3_0_SEL, 0x00000007},569{AUD_IIR3_0_SHIFT, 0x00000000},570{AUD_DEEMPH0_SRC_SEL, 0x00000011},571{AUD_DEEMPH0_SHIFT, 0x00000000},572{AUD_DEEMPH0_G0, 0x00007000},573{AUD_DEEMPH0_A0, 0x00000000},574{AUD_DEEMPH0_B0, 0x00000000},575{AUD_DEEMPH0_A1, 0x00000000},576{AUD_DEEMPH0_B1, 0x00000000},577{AUD_DEEMPH1_SRC_SEL, 0x00000011},578{AUD_DEEMPH1_SHIFT, 0x00000000},579{AUD_DEEMPH1_G0, 0x00007000},580{AUD_DEEMPH1_A0, 0x00000000},581{AUD_DEEMPH1_B0, 0x00000000},582{AUD_DEEMPH1_A1, 0x00000000},583{AUD_DEEMPH1_B1, 0x00000000},584{AUD_OUT0_SEL, 0x0000003F},585{AUD_OUT1_SEL, 0x0000003F},586{AUD_DMD_RA_DDS, 0x00F5C285},587{AUD_PLL_INT, 0x0000001E},588{AUD_PLL_DDS, 0x00000000},589{AUD_PLL_FRAC, 0x0000E542},590{AUD_RATE_ADJ1, 0x00000100},591{AUD_RATE_ADJ2, 0x00000200},592{AUD_RATE_ADJ3, 0x00000300},593{AUD_RATE_ADJ4, 0x00000400},594{AUD_RATE_ADJ5, 0x00000500},595{AUD_RATE_THRES_DMD, 0x000000C0},596{ /* end of list */ },597};598599static const struct rlist a2_deemph50[] = {600{AUD_DEEMPH0_G0, 0x00000380},601{AUD_DEEMPH1_G0, 0x00000380},602{AUD_DEEMPHGAIN_R, 0x000011e1},603{AUD_DEEMPHNUMER1_R, 0x0002a7bc},604{AUD_DEEMPHNUMER2_R, 0x0003023c},605{ /* end of list */ },606};607608set_audio_start(core, SEL_A2);609switch (core->tvaudio) {610case WW_BG:611dprintk("%s PAL-BG A1/2 (status: known-good)\n", __func__);612set_audio_registers(core, a2_bgdk_common);613set_audio_registers(core, a2_bg);614set_audio_registers(core, a2_deemph50);615break;616case WW_DK:617dprintk("%s PAL-DK A1/2 (status: known-good)\n", __func__);618set_audio_registers(core, a2_bgdk_common);619set_audio_registers(core, a2_dk);620set_audio_registers(core, a2_deemph50);621break;622case WW_I:623dprintk("%s PAL-I A1 (status: known-good)\n", __func__);624set_audio_registers(core, a1_i);625set_audio_registers(core, a2_deemph50);626break;627case WW_L:628dprintk("%s AM-L (status: devel)\n", __func__);629set_audio_registers(core, am_l);630break;631case WW_NONE:632case WW_BTSC:633case WW_EIAJ:634case WW_I2SPT:635case WW_FM:636case WW_I2SADC:637case WW_M:638dprintk("%s Warning: wrong value\n", __func__);639return;640break;641};642643mode |= EN_FMRADIO_EN_RDS | EN_DMTRX_SUMDIFF;644set_audio_finish(core, mode);645}646647static void set_audio_standard_EIAJ(struct cx88_core *core)648{649static const struct rlist eiaj[] = {650/* TODO: eiaj register settings are not there yet ... */651652{ /* end of list */ },653};654dprintk("%s (status: unknown)\n", __func__);655656set_audio_start(core, SEL_EIAJ);657set_audio_registers(core, eiaj);658set_audio_finish(core, EN_EIAJ_AUTO_STEREO);659}660661static void set_audio_standard_FM(struct cx88_core *core,662enum cx88_deemph_type deemph)663{664static const struct rlist fm_deemph_50[] = {665{AUD_DEEMPH0_G0, 0x0C45},666{AUD_DEEMPH0_A0, 0x6262},667{AUD_DEEMPH0_B0, 0x1C29},668{AUD_DEEMPH0_A1, 0x3FC66},669{AUD_DEEMPH0_B1, 0x399A},670671{AUD_DEEMPH1_G0, 0x0D80},672{AUD_DEEMPH1_A0, 0x6262},673{AUD_DEEMPH1_B0, 0x1C29},674{AUD_DEEMPH1_A1, 0x3FC66},675{AUD_DEEMPH1_B1, 0x399A},676677{AUD_POLYPH80SCALEFAC, 0x0003},678{ /* end of list */ },679};680static const struct rlist fm_deemph_75[] = {681{AUD_DEEMPH0_G0, 0x091B},682{AUD_DEEMPH0_A0, 0x6B68},683{AUD_DEEMPH0_B0, 0x11EC},684{AUD_DEEMPH0_A1, 0x3FC66},685{AUD_DEEMPH0_B1, 0x399A},686687{AUD_DEEMPH1_G0, 0x0AA0},688{AUD_DEEMPH1_A0, 0x6B68},689{AUD_DEEMPH1_B0, 0x11EC},690{AUD_DEEMPH1_A1, 0x3FC66},691{AUD_DEEMPH1_B1, 0x399A},692693{AUD_POLYPH80SCALEFAC, 0x0003},694{ /* end of list */ },695};696697/* It is enough to leave default values? */698/* No, it's not! The deemphasis registers are reset to the 75us699* values by default. Analyzing the spectrum of the decoded audio700* reveals that "no deemphasis" is the same as 75 us, while the 50 us701* setting results in less deemphasis. */702static const struct rlist fm_no_deemph[] = {703704{AUD_POLYPH80SCALEFAC, 0x0003},705{ /* end of list */ },706};707708dprintk("%s (status: unknown)\n", __func__);709set_audio_start(core, SEL_FMRADIO);710711switch (deemph) {712default:713case FM_NO_DEEMPH:714set_audio_registers(core, fm_no_deemph);715break;716717case FM_DEEMPH_50:718set_audio_registers(core, fm_deemph_50);719break;720721case FM_DEEMPH_75:722set_audio_registers(core, fm_deemph_75);723break;724}725726set_audio_finish(core, EN_FMRADIO_AUTO_STEREO);727}728729/* ----------------------------------------------------------- */730731static int cx88_detect_nicam(struct cx88_core *core)732{733int i, j = 0;734735dprintk("start nicam autodetect.\n");736737for (i = 0; i < 6; i++) {738/* if bit1=1 then nicam is detected */739j += ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1);740741if (j == 1) {742dprintk("nicam is detected.\n");743return 1;744}745746/* wait a little bit for next reading status */747msleep(10);748}749750dprintk("nicam is not detected.\n");751return 0;752}753754void cx88_set_tvaudio(struct cx88_core *core)755{756switch (core->tvaudio) {757case WW_BTSC:758set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);759break;760case WW_BG:761case WW_DK:762case WW_M:763case WW_I:764case WW_L:765/* prepare all dsp registers */766set_audio_standard_A2(core, EN_A2_FORCE_MONO1);767768/* set nicam mode - otherwise769AUD_NICAM_STATUS2 contains wrong values */770set_audio_standard_NICAM(core, EN_NICAM_AUTO_STEREO);771if (0 == cx88_detect_nicam(core)) {772/* fall back to fm / am mono */773set_audio_standard_A2(core, EN_A2_FORCE_MONO1);774core->audiomode_current = V4L2_TUNER_MODE_MONO;775core->use_nicam = 0;776} else {777core->use_nicam = 1;778}779break;780case WW_EIAJ:781set_audio_standard_EIAJ(core);782break;783case WW_FM:784set_audio_standard_FM(core, radio_deemphasis);785break;786case WW_I2SADC:787set_audio_start(core, 0x01);788/*789* Slave/Philips/Autobaud790* NB on Nova-S bit1 NPhilipsSony appears to be inverted:791* 0= Sony, 1=Philips792*/793cx_write(AUD_I2SINPUTCNTL, core->board.i2sinputcntl);794/* Switch to "I2S ADC mode" */795cx_write(AUD_I2SCNTL, 0x1);796set_audio_finish(core, EN_I2SIN_ENABLE);797break;798case WW_NONE:799case WW_I2SPT:800printk("%s/0: unknown tv audio mode [%d]\n",801core->name, core->tvaudio);802break;803}804return;805}806807void cx88_newstation(struct cx88_core *core)808{809core->audiomode_manual = UNSET;810core->last_change = jiffies;811}812813void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)814{815static const char * const m[] = { "stereo", "dual mono", "mono", "sap" };816static const char * const p[] = { "no pilot", "pilot c1", "pilot c2", "?" };817u32 reg, mode, pilot;818819reg = cx_read(AUD_STATUS);820mode = reg & 0x03;821pilot = (reg >> 2) & 0x03;822823if (core->astat != reg)824dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n",825reg, m[mode], p[pilot],826aud_ctl_names[cx_read(AUD_CTL) & 63]);827core->astat = reg;828829t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP |830V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;831t->rxsubchans = UNSET;832t->audmode = V4L2_TUNER_MODE_MONO;833834switch (mode) {835case 0:836t->audmode = V4L2_TUNER_MODE_STEREO;837break;838case 1:839t->audmode = V4L2_TUNER_MODE_LANG2;840break;841case 2:842t->audmode = V4L2_TUNER_MODE_MONO;843break;844case 3:845t->audmode = V4L2_TUNER_MODE_SAP;846break;847}848849switch (core->tvaudio) {850case WW_BTSC:851case WW_BG:852case WW_DK:853case WW_M:854case WW_EIAJ:855if (!core->use_nicam) {856t->rxsubchans = cx88_dsp_detect_stereo_sap(core);857break;858}859break;860case WW_NONE:861case WW_I:862case WW_L:863case WW_I2SPT:864case WW_FM:865case WW_I2SADC:866/* nothing */867break;868}869870/* If software stereo detection is not supported... */871if (UNSET == t->rxsubchans) {872t->rxsubchans = V4L2_TUNER_SUB_MONO;873/* If the hardware itself detected stereo, also return874stereo as an available subchannel */875if (V4L2_TUNER_MODE_STEREO == t->audmode)876t->rxsubchans |= V4L2_TUNER_SUB_STEREO;877}878return;879}880881void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual)882{883u32 ctl = UNSET;884u32 mask = UNSET;885886if (manual) {887core->audiomode_manual = mode;888} else {889if (UNSET != core->audiomode_manual)890return;891}892core->audiomode_current = mode;893894switch (core->tvaudio) {895case WW_BTSC:896switch (mode) {897case V4L2_TUNER_MODE_MONO:898set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_MONO);899break;900case V4L2_TUNER_MODE_LANG1:901set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);902break;903case V4L2_TUNER_MODE_LANG2:904set_audio_standard_BTSC(core, 1, EN_BTSC_FORCE_SAP);905break;906case V4L2_TUNER_MODE_STEREO:907case V4L2_TUNER_MODE_LANG1_LANG2:908set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_STEREO);909break;910}911break;912case WW_BG:913case WW_DK:914case WW_M:915case WW_I:916case WW_L:917if (1 == core->use_nicam) {918switch (mode) {919case V4L2_TUNER_MODE_MONO:920case V4L2_TUNER_MODE_LANG1:921set_audio_standard_NICAM(core,922EN_NICAM_FORCE_MONO1);923break;924case V4L2_TUNER_MODE_LANG2:925set_audio_standard_NICAM(core,926EN_NICAM_FORCE_MONO2);927break;928case V4L2_TUNER_MODE_STEREO:929case V4L2_TUNER_MODE_LANG1_LANG2:930set_audio_standard_NICAM(core,931EN_NICAM_FORCE_STEREO);932break;933}934} else {935if ((core->tvaudio == WW_I) || (core->tvaudio == WW_L)) {936/* fall back to fm / am mono */937set_audio_standard_A2(core, EN_A2_FORCE_MONO1);938} else {939/* TODO: Add A2 autodection */940mask = 0x3f;941switch (mode) {942case V4L2_TUNER_MODE_MONO:943case V4L2_TUNER_MODE_LANG1:944ctl = EN_A2_FORCE_MONO1;945break;946case V4L2_TUNER_MODE_LANG2:947ctl = EN_A2_FORCE_MONO2;948break;949case V4L2_TUNER_MODE_STEREO:950case V4L2_TUNER_MODE_LANG1_LANG2:951ctl = EN_A2_FORCE_STEREO;952break;953}954}955}956break;957case WW_FM:958switch (mode) {959case V4L2_TUNER_MODE_MONO:960ctl = EN_FMRADIO_FORCE_MONO;961mask = 0x3f;962break;963case V4L2_TUNER_MODE_STEREO:964ctl = EN_FMRADIO_AUTO_STEREO;965mask = 0x3f;966break;967}968break;969case WW_I2SADC:970case WW_NONE:971case WW_EIAJ:972case WW_I2SPT:973/* DO NOTHING */974break;975}976977if (UNSET != ctl) {978dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x "979"[status=0x%x,ctl=0x%x,vol=0x%x]\n",980mask, ctl, cx_read(AUD_STATUS),981cx_read(AUD_CTL), cx_sread(SHADOW_AUD_VOL_CTL));982cx_andor(AUD_CTL, mask, ctl);983}984return;985}986987int cx88_audio_thread(void *data)988{989struct cx88_core *core = data;990struct v4l2_tuner t;991u32 mode = 0;992993dprintk("cx88: tvaudio thread started\n");994set_freezable();995for (;;) {996msleep_interruptible(1000);997if (kthread_should_stop())998break;999try_to_freeze();10001001switch (core->tvaudio) {1002case WW_BG:1003case WW_DK:1004case WW_M:1005case WW_I:1006case WW_L:1007if (core->use_nicam)1008goto hw_autodetect;10091010/* just monitor the audio status for now ... */1011memset(&t, 0, sizeof(t));1012cx88_get_stereo(core, &t);10131014if (UNSET != core->audiomode_manual)1015/* manually set, don't do anything. */1016continue;10171018/* monitor signal and set stereo if available */1019if (t.rxsubchans & V4L2_TUNER_SUB_STEREO)1020mode = V4L2_TUNER_MODE_STEREO;1021else1022mode = V4L2_TUNER_MODE_MONO;1023if (mode == core->audiomode_current)1024continue;1025/* automatically switch to best available mode */1026cx88_set_stereo(core, mode, 0);1027break;1028case WW_NONE:1029case WW_BTSC:1030case WW_EIAJ:1031case WW_I2SPT:1032case WW_FM:1033case WW_I2SADC:1034hw_autodetect:1035/* stereo autodetection is supported by hardware so1036we don't need to do it manually. Do nothing. */1037break;1038}1039}10401041dprintk("cx88: tvaudio thread exiting\n");1042return 0;1043}10441045/* ----------------------------------------------------------- */10461047EXPORT_SYMBOL(cx88_set_tvaudio);1048EXPORT_SYMBOL(cx88_newstation);1049EXPORT_SYMBOL(cx88_set_stereo);1050EXPORT_SYMBOL(cx88_get_stereo);1051EXPORT_SYMBOL(cx88_audio_thread);10521053/*1054* Local variables:1055* c-basic-offset: 81056* End:1057* kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off1058*/105910601061