Path: blob/master/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.h
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/*1* Copyright (c) 2001 Jean-Fredric Clere, Nikolas Zimmermann, Georg Acher2* Mark Cave-Ayland, Carlo E Prelz, Dick Streefland3* Copyright (c) 2002, 2003 Tuukka Toivonen4* Copyright (c) 2008 Erik Andrén5* Copyright (c) 2008 Chia-I Wu6*7* This program is free software; you can redistribute it and/or modify8* it under the terms of the GNU General Public License as published by9* the Free Software Foundation; either version 2 of the License, or10* (at your option) any later version.11*12* This program is distributed in the hope that it will be useful,13* but WITHOUT ANY WARRANTY; without even the implied warranty of14* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the15* GNU General Public License for more details.16*17* You should have received a copy of the GNU General Public License18* along with this program; if not, write to the Free Software19* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA20*21* P/N 861037: Sensor HDCS1000 ASIC STV060022* P/N 861050-0010: Sensor HDCS1000 ASIC STV060023* P/N 861050-0020: Sensor Photobit PB100 ASIC STV0600-1 - QuickCam Express24* P/N 861055: Sensor ST VV6410 ASIC STV0610 - LEGO cam25* P/N 861075-0040: Sensor HDCS1000 ASIC26* P/N 961179-0700: Sensor ST VV6410 ASIC STV0602 - Dexxa WebCam USB27* P/N 861040-0000: Sensor ST VV6410 ASIC STV0610 - QuickCam Web28*/2930#ifndef STV06XX_HDCS_H_31#define STV06XX_HDCS_H_3233#include "stv06xx_sensor.h"3435#define HDCS_REG_CONFIG(sd) (IS_1020(sd) ? HDCS20_CONFIG : HDCS00_CONFIG)36#define HDCS_REG_CONTROL(sd) (IS_1020(sd) ? HDCS20_CONTROL : HDCS00_CONTROL)3738#define HDCS_1X00_DEF_WIDTH 36039#define HDCS_1X00_DEF_HEIGHT 2964041#define HDCS_1020_DEF_WIDTH 35242#define HDCS_1020_DEF_HEIGHT 2924344#define HDCS_1020_BOTTOM_Y_SKIP 44546#define HDCS_CLK_FREQ_MHZ 254748#define HDCS_ADC_START_SIG_DUR 34950/* LSB bit of I2C or register address signifies write (0) or read (1) */51/* I2C Registers common for both HDCS-1000/1100 and HDCS-1020 */52/* Identifications Register */53#define HDCS_IDENT (0x00 << 1)54/* Status Register */55#define HDCS_STATUS (0x01 << 1)56/* Interrupt Mask Register */57#define HDCS_IMASK (0x02 << 1)58/* Pad Control Register */59#define HDCS_PCTRL (0x03 << 1)60/* Pad Drive Control Register */61#define HDCS_PDRV (0x04 << 1)62/* Interface Control Register */63#define HDCS_ICTRL (0x05 << 1)64/* Interface Timing Register */65#define HDCS_ITMG (0x06 << 1)66/* Baud Fraction Register */67#define HDCS_BFRAC (0x07 << 1)68/* Baud Rate Register */69#define HDCS_BRATE (0x08 << 1)70/* ADC Control Register */71#define HDCS_ADCCTRL (0x09 << 1)72/* First Window Row Register */73#define HDCS_FWROW (0x0a << 1)74/* First Window Column Register */75#define HDCS_FWCOL (0x0b << 1)76/* Last Window Row Register */77#define HDCS_LWROW (0x0c << 1)78/* Last Window Column Register */79#define HDCS_LWCOL (0x0d << 1)80/* Timing Control Register */81#define HDCS_TCTRL (0x0e << 1)82/* PGA Gain Register: Even Row, Even Column */83#define HDCS_ERECPGA (0x0f << 1)84/* PGA Gain Register: Even Row, Odd Column */85#define HDCS_EROCPGA (0x10 << 1)86/* PGA Gain Register: Odd Row, Even Column */87#define HDCS_ORECPGA (0x11 << 1)88/* PGA Gain Register: Odd Row, Odd Column */89#define HDCS_OROCPGA (0x12 << 1)90/* Row Exposure Low Register */91#define HDCS_ROWEXPL (0x13 << 1)92/* Row Exposure High Register */93#define HDCS_ROWEXPH (0x14 << 1)9495/* I2C Registers only for HDCS-1000/1100 */96/* Sub-Row Exposure Low Register */97#define HDCS00_SROWEXPL (0x15 << 1)98/* Sub-Row Exposure High Register */99#define HDCS00_SROWEXPH (0x16 << 1)100/* Configuration Register */101#define HDCS00_CONFIG (0x17 << 1)102/* Control Register */103#define HDCS00_CONTROL (0x18 << 1)104105/* I2C Registers only for HDCS-1020 */106/* Sub-Row Exposure Register */107#define HDCS20_SROWEXP (0x15 << 1)108/* Error Control Register */109#define HDCS20_ERROR (0x16 << 1)110/* Interface Timing 2 Register */111#define HDCS20_ITMG2 (0x17 << 1)112/* Interface Control 2 Register */113#define HDCS20_ICTRL2 (0x18 << 1)114/* Horizontal Blank Register */115#define HDCS20_HBLANK (0x19 << 1)116/* Vertical Blank Register */117#define HDCS20_VBLANK (0x1a << 1)118/* Configuration Register */119#define HDCS20_CONFIG (0x1b << 1)120/* Control Register */121#define HDCS20_CONTROL (0x1c << 1)122123#define HDCS_RUN_ENABLE (1 << 2)124#define HDCS_SLEEP_MODE (1 << 1)125126#define HDCS_DEFAULT_EXPOSURE 48127#define HDCS_DEFAULT_GAIN 50128129static int hdcs_probe_1x00(struct sd *sd);130static int hdcs_probe_1020(struct sd *sd);131static int hdcs_start(struct sd *sd);132static int hdcs_init(struct sd *sd);133static int hdcs_stop(struct sd *sd);134static int hdcs_dump(struct sd *sd);135static void hdcs_disconnect(struct sd *sd);136137static int hdcs_get_exposure(struct gspca_dev *gspca_dev, __s32 *val);138static int hdcs_set_exposure(struct gspca_dev *gspca_dev, __s32 val);139static int hdcs_set_gain(struct gspca_dev *gspca_dev, __s32 val);140static int hdcs_get_gain(struct gspca_dev *gspca_dev, __s32 *val);141142const struct stv06xx_sensor stv06xx_sensor_hdcs1x00 = {143.name = "HP HDCS-1000/1100",144.i2c_flush = 0,145.i2c_addr = (0x55 << 1),146.i2c_len = 1,147148/* FIXME (see if we can lower min_packet_size, needs testing, and also149adjusting framerate when the bandwidth gets lower) */150.min_packet_size = { 847 },151.max_packet_size = { 847 },152153.init = hdcs_init,154.probe = hdcs_probe_1x00,155.start = hdcs_start,156.stop = hdcs_stop,157.disconnect = hdcs_disconnect,158.dump = hdcs_dump,159};160161const struct stv06xx_sensor stv06xx_sensor_hdcs1020 = {162.name = "HDCS-1020",163.i2c_flush = 0,164.i2c_addr = (0x55 << 1),165.i2c_len = 1,166167/* FIXME (see if we can lower min_packet_size, needs testing, and also168adjusting framerate when the bandwidthm gets lower) */169.min_packet_size = { 847 },170.max_packet_size = { 847 },171172.init = hdcs_init,173.probe = hdcs_probe_1020,174.start = hdcs_start,175.stop = hdcs_stop,176.dump = hdcs_dump,177};178179static const u16 stv_bridge_init[][2] = {180{STV_ISO_ENABLE, 0},181{STV_REG23, 0},182{STV_REG00, 0x1d},183{STV_REG01, 0xb5},184{STV_REG02, 0xa8},185{STV_REG03, 0x95},186{STV_REG04, 0x07},187188{STV_SCAN_RATE, 0x20},189{STV_Y_CTRL, 0x01},190{STV_X_CTRL, 0x0a}191};192193static const u8 stv_sensor_init[][2] = {194/* Clear status (writing 1 will clear the corresponding status bit) */195{HDCS_STATUS, BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1)},196/* Disable all interrupts */197{HDCS_IMASK, 0x00},198{HDCS_PCTRL, BIT(6) | BIT(5) | BIT(1) | BIT(0)},199{HDCS_PDRV, 0x00},200{HDCS_ICTRL, BIT(5)},201{HDCS_ITMG, BIT(4) | BIT(1)},202/* ADC output resolution to 10 bits */203{HDCS_ADCCTRL, 10}204};205206#endif207208209