Path: blob/master/drivers/media/video/ivtv/ivtv-driver.h
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/*1ivtv driver internal defines and structures2Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>3Copyright (C) 2004 Chris Kennedy <[email protected]>4Copyright (C) 2005-2007 Hans Verkuil <[email protected]>56This program is free software; you can redistribute it and/or modify7it under the terms of the GNU General Public License as published by8the Free Software Foundation; either version 2 of the License, or9(at your option) any later version.1011This program is distributed in the hope that it will be useful,12but WITHOUT ANY WARRANTY; without even the implied warranty of13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the14GNU General Public License for more details.1516You should have received a copy of the GNU General Public License17along with this program; if not, write to the Free Software18Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA19*/2021#ifndef IVTV_DRIVER_H22#define IVTV_DRIVER_H2324/* Internal header for ivtv project:25* Driver for the cx23415/6 chip.26* Author: Kevin Thayer (nufan_wfk at yahoo.com)27* License: GPL28* http://www.ivtvdriver.org29*30* -----31* MPG600/MPG160 support by T.Adachi <[email protected]>32* and Takeru KOMORIYA<[email protected]>33*34* AVerMedia M179 GPIO info by Chris Pinkham <[email protected]>35* using information provided by Jiun-Kuei Jung @ AVerMedia.36*/3738#include <linux/version.h>39#include <linux/module.h>40#include <linux/init.h>41#include <linux/delay.h>42#include <linux/sched.h>43#include <linux/fs.h>44#include <linux/pci.h>45#include <linux/interrupt.h>46#include <linux/spinlock.h>47#include <linux/i2c.h>48#include <linux/i2c-algo-bit.h>49#include <linux/list.h>50#include <linux/unistd.h>51#include <linux/pagemap.h>52#include <linux/scatterlist.h>53#include <linux/kthread.h>54#include <linux/mutex.h>55#include <linux/slab.h>56#include <asm/uaccess.h>57#include <asm/system.h>58#include <asm/byteorder.h>5960#include <linux/dvb/video.h>61#include <linux/dvb/audio.h>62#include <media/v4l2-common.h>63#include <media/v4l2-ioctl.h>64#include <media/v4l2-ctrls.h>65#include <media/v4l2-device.h>66#include <media/v4l2-fh.h>67#include <media/tuner.h>68#include <media/cx2341x.h>69#include <media/ir-kbd-i2c.h>7071#include <linux/ivtv.h>7273/* Memory layout */74#define IVTV_ENCODER_OFFSET 0x0000000075#define IVTV_ENCODER_SIZE 0x00800000 /* Total size is 0x01000000, but only first half is used */76#define IVTV_DECODER_OFFSET 0x0100000077#define IVTV_DECODER_SIZE 0x00800000 /* Total size is 0x01000000, but only first half is used */78#define IVTV_REG_OFFSET 0x0200000079#define IVTV_REG_SIZE 0x000100008081/* Maximum ivtv driver instances. Some people have a huge number of82capture cards, so set this to a high value. */83#define IVTV_MAX_CARDS 328485#define IVTV_ENC_STREAM_TYPE_MPG 086#define IVTV_ENC_STREAM_TYPE_YUV 187#define IVTV_ENC_STREAM_TYPE_VBI 288#define IVTV_ENC_STREAM_TYPE_PCM 389#define IVTV_ENC_STREAM_TYPE_RAD 490#define IVTV_DEC_STREAM_TYPE_MPG 591#define IVTV_DEC_STREAM_TYPE_VBI 692#define IVTV_DEC_STREAM_TYPE_VOUT 793#define IVTV_DEC_STREAM_TYPE_YUV 894#define IVTV_MAX_STREAMS 99596#define IVTV_DMA_SG_OSD_ENT (2883584/PAGE_SIZE) /* sg entities */9798/* DMA Registers */99#define IVTV_REG_DMAXFER (0x0000)100#define IVTV_REG_DMASTATUS (0x0004)101#define IVTV_REG_DECDMAADDR (0x0008)102#define IVTV_REG_ENCDMAADDR (0x000c)103#define IVTV_REG_DMACONTROL (0x0010)104#define IVTV_REG_IRQSTATUS (0x0040)105#define IVTV_REG_IRQMASK (0x0048)106107/* Setup Registers */108#define IVTV_REG_ENC_SDRAM_REFRESH (0x07F8)109#define IVTV_REG_ENC_SDRAM_PRECHARGE (0x07FC)110#define IVTV_REG_DEC_SDRAM_REFRESH (0x08F8)111#define IVTV_REG_DEC_SDRAM_PRECHARGE (0x08FC)112#define IVTV_REG_VDM (0x2800)113#define IVTV_REG_AO (0x2D00)114#define IVTV_REG_BYTEFLUSH (0x2D24)115#define IVTV_REG_SPU (0x9050)116#define IVTV_REG_HW_BLOCKS (0x9054)117#define IVTV_REG_VPU (0x9058)118#define IVTV_REG_APU (0xA064)119120/* Other registers */121#define IVTV_REG_DEC_LINE_FIELD (0x28C0)122123/* debugging */124extern int ivtv_debug;125#ifdef CONFIG_VIDEO_ADV_DEBUG126extern int ivtv_fw_debug;127#endif128129#define IVTV_DBGFLG_WARN (1 << 0)130#define IVTV_DBGFLG_INFO (1 << 1)131#define IVTV_DBGFLG_MB (1 << 2)132#define IVTV_DBGFLG_IOCTL (1 << 3)133#define IVTV_DBGFLG_FILE (1 << 4)134#define IVTV_DBGFLG_DMA (1 << 5)135#define IVTV_DBGFLG_IRQ (1 << 6)136#define IVTV_DBGFLG_DEC (1 << 7)137#define IVTV_DBGFLG_YUV (1 << 8)138#define IVTV_DBGFLG_I2C (1 << 9)139/* Flag to turn on high volume debugging */140#define IVTV_DBGFLG_HIGHVOL (1 << 10)141142#define IVTV_DEBUG(x, type, fmt, args...) \143do { \144if ((x) & ivtv_debug) \145v4l2_info(&itv->v4l2_dev, " " type ": " fmt , ##args); \146} while (0)147#define IVTV_DEBUG_WARN(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_WARN, "warn", fmt , ## args)148#define IVTV_DEBUG_INFO(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_INFO, "info", fmt , ## args)149#define IVTV_DEBUG_MB(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_MB, "mb", fmt , ## args)150#define IVTV_DEBUG_DMA(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args)151#define IVTV_DEBUG_IOCTL(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)152#define IVTV_DEBUG_FILE(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_FILE, "file", fmt , ## args)153#define IVTV_DEBUG_I2C(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)154#define IVTV_DEBUG_IRQ(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)155#define IVTV_DEBUG_DEC(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args)156#define IVTV_DEBUG_YUV(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)157158#define IVTV_DEBUG_HIGH_VOL(x, type, fmt, args...) \159do { \160if (((x) & ivtv_debug) && (ivtv_debug & IVTV_DBGFLG_HIGHVOL)) \161v4l2_info(&itv->v4l2_dev, " " type ": " fmt , ##args); \162} while (0)163#define IVTV_DEBUG_HI_WARN(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_WARN, "warn", fmt , ## args)164#define IVTV_DEBUG_HI_INFO(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_INFO, "info", fmt , ## args)165#define IVTV_DEBUG_HI_MB(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_MB, "mb", fmt , ## args)166#define IVTV_DEBUG_HI_DMA(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DMA, "dma", fmt , ## args)167#define IVTV_DEBUG_HI_IOCTL(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)168#define IVTV_DEBUG_HI_FILE(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_FILE, "file", fmt , ## args)169#define IVTV_DEBUG_HI_I2C(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)170#define IVTV_DEBUG_HI_IRQ(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)171#define IVTV_DEBUG_HI_DEC(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DEC, "dec", fmt , ## args)172#define IVTV_DEBUG_HI_YUV(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)173174/* Standard kernel messages */175#define IVTV_ERR(fmt, args...) v4l2_err(&itv->v4l2_dev, fmt , ## args)176#define IVTV_WARN(fmt, args...) v4l2_warn(&itv->v4l2_dev, fmt , ## args)177#define IVTV_INFO(fmt, args...) v4l2_info(&itv->v4l2_dev, fmt , ## args)178179/* output modes (cx23415 only) */180#define OUT_NONE 0181#define OUT_MPG 1182#define OUT_YUV 2183#define OUT_UDMA_YUV 3184#define OUT_PASSTHROUGH 4185186#define IVTV_MAX_PGM_INDEX (400)187188/* Default I2C SCL period in microseconds */189#define IVTV_DEFAULT_I2C_CLOCK_PERIOD 20190191struct ivtv_options {192int kilobytes[IVTV_MAX_STREAMS]; /* size in kilobytes of each stream */193int cardtype; /* force card type on load */194int tuner; /* set tuner on load */195int radio; /* enable/disable radio */196int newi2c; /* new I2C algorithm */197int i2c_clock_period; /* period of SCL for I2C bus */198};199200/* ivtv-specific mailbox template */201struct ivtv_mailbox {202u32 flags;203u32 cmd;204u32 retval;205u32 timeout;206u32 data[CX2341X_MBOX_MAX_DATA];207};208209struct ivtv_api_cache {210unsigned long last_jiffies; /* when last command was issued */211u32 data[CX2341X_MBOX_MAX_DATA]; /* last sent api data */212};213214struct ivtv_mailbox_data {215volatile struct ivtv_mailbox __iomem *mbox;216/* Bits 0-2 are for the encoder mailboxes, 0-1 are for the decoder mailboxes.217If the bit is set, then the corresponding mailbox is in use by the driver. */218unsigned long busy;219u8 max_mbox;220};221222/* per-buffer bit flags */223#define IVTV_F_B_NEED_BUF_SWAP (1 << 0) /* this buffer should be byte swapped */224225/* per-stream, s_flags */226#define IVTV_F_S_DMA_PENDING 0 /* this stream has pending DMA */227#define IVTV_F_S_DMA_HAS_VBI 1 /* the current DMA request also requests VBI data */228#define IVTV_F_S_NEEDS_DATA 2 /* this decoding stream needs more data */229230#define IVTV_F_S_CLAIMED 3 /* this stream is claimed */231#define IVTV_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */232#define IVTV_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */233#define IVTV_F_S_PASSTHROUGH 6 /* this stream is in passthrough mode */234#define IVTV_F_S_STREAMOFF 7 /* signal end of stream EOS */235#define IVTV_F_S_APPL_IO 8 /* this stream is used read/written by an application */236237#define IVTV_F_S_PIO_PENDING 9 /* this stream has pending PIO */238#define IVTV_F_S_PIO_HAS_VBI 1 /* the current PIO request also requests VBI data */239240/* per-ivtv, i_flags */241#define IVTV_F_I_DMA 0 /* DMA in progress */242#define IVTV_F_I_UDMA 1 /* UDMA in progress */243#define IVTV_F_I_UDMA_PENDING 2 /* UDMA pending */244#define IVTV_F_I_SPEED_CHANGE 3 /* a speed change is in progress */245#define IVTV_F_I_EOS 4 /* end of encoder stream reached */246#define IVTV_F_I_RADIO_USER 5 /* the radio tuner is selected */247#define IVTV_F_I_DIG_RST 6 /* reset digitizer */248#define IVTV_F_I_DEC_YUV 7 /* YUV instead of MPG is being decoded */249#define IVTV_F_I_UPDATE_CC 9 /* CC should be updated */250#define IVTV_F_I_UPDATE_WSS 10 /* WSS should be updated */251#define IVTV_F_I_UPDATE_VPS 11 /* VPS should be updated */252#define IVTV_F_I_DECODING_YUV 12 /* this stream is YUV frame decoding */253#define IVTV_F_I_ENC_PAUSED 13 /* the encoder is paused */254#define IVTV_F_I_VALID_DEC_TIMINGS 14 /* last_dec_timing is valid */255#define IVTV_F_I_HAVE_WORK 15 /* used in the interrupt handler: there is work to be done */256#define IVTV_F_I_WORK_HANDLER_VBI 16 /* there is work to be done for VBI */257#define IVTV_F_I_WORK_HANDLER_YUV 17 /* there is work to be done for YUV */258#define IVTV_F_I_WORK_HANDLER_PIO 18 /* there is work to be done for PIO */259#define IVTV_F_I_PIO 19 /* PIO in progress */260#define IVTV_F_I_DEC_PAUSED 20 /* the decoder is paused */261#define IVTV_F_I_INITED 21 /* set after first open */262#define IVTV_F_I_FAILED 22 /* set if first open failed */263264/* Event notifications */265#define IVTV_F_I_EV_DEC_STOPPED 28 /* decoder stopped event */266#define IVTV_F_I_EV_VSYNC 29 /* VSYNC event */267#define IVTV_F_I_EV_VSYNC_FIELD 30 /* VSYNC event field (0 = first, 1 = second field) */268#define IVTV_F_I_EV_VSYNC_ENABLED 31 /* VSYNC event enabled */269270/* Scatter-Gather array element, used in DMA transfers */271struct ivtv_sg_element {272__le32 src;273__le32 dst;274__le32 size;275};276277struct ivtv_sg_host_element {278u32 src;279u32 dst;280u32 size;281};282283struct ivtv_user_dma {284struct mutex lock;285int page_count;286struct page *map[IVTV_DMA_SG_OSD_ENT];287/* Needed when dealing with highmem userspace buffers */288struct page *bouncemap[IVTV_DMA_SG_OSD_ENT];289290/* Base Dev SG Array for cx23415/6 */291struct ivtv_sg_element SGarray[IVTV_DMA_SG_OSD_ENT];292dma_addr_t SG_handle;293int SG_length;294295/* SG List of Buffers */296struct scatterlist SGlist[IVTV_DMA_SG_OSD_ENT];297};298299struct ivtv_dma_page_info {300unsigned long uaddr;301unsigned long first;302unsigned long last;303unsigned int offset;304unsigned int tail;305int page_count;306};307308struct ivtv_buffer {309struct list_head list;310dma_addr_t dma_handle;311unsigned short b_flags;312unsigned short dma_xfer_cnt;313char *buf;314u32 bytesused;315u32 readpos;316};317318struct ivtv_queue {319struct list_head list; /* the list of buffers in this queue */320u32 buffers; /* number of buffers in this queue */321u32 length; /* total number of bytes of available buffer space */322u32 bytesused; /* total number of bytes used in this queue */323};324325struct ivtv; /* forward reference */326327struct ivtv_stream {328/* These first four fields are always set, even if the stream329is not actually created. */330struct video_device *vdev; /* NULL when stream not created */331struct ivtv *itv; /* for ease of use */332const char *name; /* name of the stream */333int type; /* stream type */334335u32 id;336spinlock_t qlock; /* locks access to the queues */337unsigned long s_flags; /* status flags, see above */338int dma; /* can be PCI_DMA_TODEVICE, PCI_DMA_FROMDEVICE or PCI_DMA_NONE */339u32 pending_offset;340u32 pending_backup;341u64 pending_pts;342343u32 dma_offset;344u32 dma_backup;345u64 dma_pts;346347int subtype;348wait_queue_head_t waitq;349u32 dma_last_offset;350351/* Buffer Stats */352u32 buffers;353u32 buf_size;354u32 buffers_stolen;355356/* Buffer Queues */357struct ivtv_queue q_free; /* free buffers */358struct ivtv_queue q_full; /* full buffers */359struct ivtv_queue q_io; /* waiting for I/O */360struct ivtv_queue q_dma; /* waiting for DMA */361struct ivtv_queue q_predma; /* waiting for DMA */362363/* DMA xfer counter, buffers belonging to the same DMA364xfer will have the same dma_xfer_cnt. */365u16 dma_xfer_cnt;366367/* Base Dev SG Array for cx23415/6 */368struct ivtv_sg_host_element *sg_pending;369struct ivtv_sg_host_element *sg_processing;370struct ivtv_sg_element *sg_dma;371dma_addr_t sg_handle;372int sg_pending_size;373int sg_processing_size;374int sg_processed;375376/* SG List of Buffers */377struct scatterlist *SGlist;378};379380struct ivtv_open_id {381struct v4l2_fh fh;382u32 open_id; /* unique ID for this file descriptor */383int type; /* stream type */384int yuv_frames; /* 1: started OUT_UDMA_YUV output mode */385struct ivtv *itv;386};387388static inline struct ivtv_open_id *fh2id(struct v4l2_fh *fh)389{390return container_of(fh, struct ivtv_open_id, fh);391}392393struct yuv_frame_info394{395u32 update;396s32 src_x;397s32 src_y;398u32 src_w;399u32 src_h;400s32 dst_x;401s32 dst_y;402u32 dst_w;403u32 dst_h;404s32 pan_x;405s32 pan_y;406u32 vis_w;407u32 vis_h;408u32 interlaced_y;409u32 interlaced_uv;410s32 tru_x;411u32 tru_w;412u32 tru_h;413u32 offset_y;414s32 lace_mode;415u32 sync_field;416u32 delay;417u32 interlaced;418};419420#define IVTV_YUV_MODE_INTERLACED 0x00421#define IVTV_YUV_MODE_PROGRESSIVE 0x01422#define IVTV_YUV_MODE_AUTO 0x02423#define IVTV_YUV_MODE_MASK 0x03424425#define IVTV_YUV_SYNC_EVEN 0x00426#define IVTV_YUV_SYNC_ODD 0x04427#define IVTV_YUV_SYNC_MASK 0x04428429#define IVTV_YUV_BUFFERS 8430431struct yuv_playback_info432{433u32 reg_2834;434u32 reg_2838;435u32 reg_283c;436u32 reg_2840;437u32 reg_2844;438u32 reg_2848;439u32 reg_2854;440u32 reg_285c;441u32 reg_2864;442443u32 reg_2870;444u32 reg_2874;445u32 reg_2890;446u32 reg_2898;447u32 reg_289c;448449u32 reg_2918;450u32 reg_291c;451u32 reg_2920;452u32 reg_2924;453u32 reg_2928;454u32 reg_292c;455u32 reg_2930;456457u32 reg_2934;458459u32 reg_2938;460u32 reg_293c;461u32 reg_2940;462u32 reg_2944;463u32 reg_2948;464u32 reg_294c;465u32 reg_2950;466u32 reg_2954;467u32 reg_2958;468u32 reg_295c;469u32 reg_2960;470u32 reg_2964;471u32 reg_2968;472u32 reg_296c;473474u32 reg_2970;475476int v_filter_1;477int v_filter_2;478int h_filter;479480u8 track_osd; /* Should yuv output track the OSD size & position */481482u32 osd_x_offset;483u32 osd_y_offset;484485u32 osd_x_pan;486u32 osd_y_pan;487488u32 osd_vis_w;489u32 osd_vis_h;490491u32 osd_full_w;492u32 osd_full_h;493494int decode_height;495496int lace_mode;497int lace_threshold;498int lace_sync_field;499500atomic_t next_dma_frame;501atomic_t next_fill_frame;502503u32 yuv_forced_update;504int update_frame;505506u8 fields_lapsed; /* Counter used when delaying a frame */507508struct yuv_frame_info new_frame_info[IVTV_YUV_BUFFERS];509struct yuv_frame_info old_frame_info;510struct yuv_frame_info old_frame_info_args;511512void *blanking_ptr;513dma_addr_t blanking_dmaptr;514515int stream_size;516517u8 draw_frame; /* PVR350 buffer to draw into */518u8 max_frames_buffered; /* Maximum number of frames to buffer */519520struct v4l2_rect main_rect;521u32 v4l2_src_w;522u32 v4l2_src_h;523524u8 running; /* Have any frames been displayed */525};526527#define IVTV_VBI_FRAMES 32528529/* VBI data */530struct vbi_cc {531u8 odd[2]; /* two-byte payload of odd field */532u8 even[2]; /* two-byte payload of even field */;533};534535struct vbi_vps {536u8 data[5]; /* five-byte VPS payload */537};538539struct vbi_info {540/* VBI general data, does not change during streaming */541542u32 raw_decoder_line_size; /* raw VBI line size from digitizer */543u8 raw_decoder_sav_odd_field; /* raw VBI Start Active Video digitizer code of odd field */544u8 raw_decoder_sav_even_field; /* raw VBI Start Active Video digitizer code of even field */545u32 sliced_decoder_line_size; /* sliced VBI line size from digitizer */546u8 sliced_decoder_sav_odd_field; /* sliced VBI Start Active Video digitizer code of odd field */547u8 sliced_decoder_sav_even_field; /* sliced VBI Start Active Video digitizer code of even field */548549u32 start[2]; /* start of first VBI line in the odd/even fields */550u32 count; /* number of VBI lines per field */551u32 raw_size; /* size of raw VBI line from the digitizer */552u32 sliced_size; /* size of sliced VBI line from the digitizer */553554u32 dec_start; /* start in decoder memory of VBI re-insertion buffers */555u32 enc_start; /* start in encoder memory of VBI capture buffers */556u32 enc_size; /* size of VBI capture area */557int fpi; /* number of VBI frames per interrupt */558559struct v4l2_format in; /* current VBI capture format */560struct v4l2_sliced_vbi_format *sliced_in; /* convenience pointer to sliced struct in vbi.in union */561int insert_mpeg; /* if non-zero, then embed VBI data in MPEG stream */562563/* Raw VBI compatibility hack */564565u32 frame; /* frame counter hack needed for backwards compatibility566of old VBI software */567568/* Sliced VBI output data */569570struct vbi_cc cc_payload[256]; /* sliced VBI CC payload array: it is an array to571prevent dropping CC data if they couldn't be572processed fast enough */573int cc_payload_idx; /* index in cc_payload */574u8 cc_missing_cnt; /* counts number of frames without CC for passthrough mode */575int wss_payload; /* sliced VBI WSS payload */576u8 wss_missing_cnt; /* counts number of frames without WSS for passthrough mode */577struct vbi_vps vps_payload; /* sliced VBI VPS payload */578579/* Sliced VBI capture data */580581struct v4l2_sliced_vbi_data sliced_data[36]; /* sliced VBI storage for VBI encoder stream */582struct v4l2_sliced_vbi_data sliced_dec_data[36];/* sliced VBI storage for VBI decoder stream */583584/* VBI Embedding data */585586/* Buffer for VBI data inserted into MPEG stream.587The first byte is a dummy byte that's never used.588The next 16 bytes contain the MPEG header for the VBI data,589the remainder is the actual VBI data.590The max size accepted by the MPEG VBI reinsertion turns out591to be 1552 bytes, which happens to be 4 + (1 + 42) * (2 * 18) bytes,592where 4 is a four byte header, 42 is the max sliced VBI payload, 1 is593a single line header byte and 2 * 18 is the number of VBI lines per frame.594595However, it seems that the data must be 1K aligned, so we have to596pad the data until the 1 or 2 K boundary.597598This pointer array will allocate 2049 bytes to store each VBI frame. */599u8 *sliced_mpeg_data[IVTV_VBI_FRAMES];600u32 sliced_mpeg_size[IVTV_VBI_FRAMES];601struct ivtv_buffer sliced_mpeg_buf; /* temporary buffer holding data from sliced_mpeg_data */602u32 inserted_frame; /* index in sliced_mpeg_size of next sliced data603to be inserted in the MPEG stream */604};605606/* forward declaration of struct defined in ivtv-cards.h */607struct ivtv_card;608609/* Struct to hold info about ivtv cards */610struct ivtv {611/* General fixed card data */612struct pci_dev *pdev; /* PCI device */613const struct ivtv_card *card; /* card information */614const char *card_name; /* full name of the card */615const struct ivtv_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */616u8 has_cx23415; /* 1 if it is a cx23415 based card, 0 for cx23416 */617u8 pvr150_workaround; /* 1 if the cx25840 needs to workaround a PVR150 bug */618u8 nof_inputs; /* number of video inputs */619u8 nof_audio_inputs; /* number of audio inputs */620u32 v4l2_cap; /* V4L2 capabilities of card */621u32 hw_flags; /* hardware description of the board */622v4l2_std_id tuner_std; /* the norm of the card's tuner (fixed) */623struct v4l2_subdev *sd_video; /* controlling video decoder subdev */624struct v4l2_subdev *sd_audio; /* controlling audio subdev */625struct v4l2_subdev *sd_muxer; /* controlling audio muxer subdev */626u32 base_addr; /* PCI resource base address */627volatile void __iomem *enc_mem; /* pointer to mapped encoder memory */628volatile void __iomem *dec_mem; /* pointer to mapped decoder memory */629volatile void __iomem *reg_mem; /* pointer to mapped registers */630struct ivtv_options options; /* user options */631632struct v4l2_device v4l2_dev;633struct cx2341x_handler cxhdl;634struct v4l2_ctrl_handler hdl_gpio;635struct v4l2_subdev sd_gpio; /* GPIO sub-device */636u16 instance;637638/* High-level state info */639unsigned long i_flags; /* global ivtv flags */640u8 is_50hz; /* 1 if the current capture standard is 50 Hz */641u8 is_60hz /* 1 if the current capture standard is 60 Hz */;642u8 is_out_50hz /* 1 if the current TV output standard is 50 Hz */;643u8 is_out_60hz /* 1 if the current TV output standard is 60 Hz */;644int output_mode; /* decoder output mode: NONE, MPG, YUV, UDMA YUV, passthrough */645u32 audio_input; /* current audio input */646u32 active_input; /* current video input */647u32 active_output; /* current video output */648v4l2_std_id std; /* current capture TV standard */649v4l2_std_id std_out; /* current TV output standard */650u8 audio_stereo_mode; /* decoder setting how to handle stereo MPEG audio */651u8 audio_bilingual_mode; /* decoder setting how to handle bilingual MPEG audio */652653654/* Locking */655spinlock_t lock; /* lock access to this struct */656struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */657658/* Streams */659int stream_buf_size[IVTV_MAX_STREAMS]; /* stream buffer size */660struct ivtv_stream streams[IVTV_MAX_STREAMS]; /* stream data */661atomic_t capturing; /* count number of active capture streams */662atomic_t decoding; /* count number of active decoding streams */663664665/* Interrupts & DMA */666u32 irqmask; /* active interrupts */667u32 irq_rr_idx; /* round-robin stream index */668struct kthread_worker irq_worker; /* kthread worker for PIO/YUV/VBI actions */669struct task_struct *irq_worker_task; /* task for irq_worker */670struct kthread_work irq_work; /* kthread work entry */671spinlock_t dma_reg_lock; /* lock access to DMA engine registers */672int cur_dma_stream; /* index of current stream doing DMA (-1 if none) */673int cur_pio_stream; /* index of current stream doing PIO (-1 if none) */674u32 dma_data_req_offset; /* store offset in decoder memory of current DMA request */675u32 dma_data_req_size; /* store size of current DMA request */676int dma_retries; /* current DMA retry attempt */677struct ivtv_user_dma udma; /* user based DMA for OSD */678struct timer_list dma_timer; /* timer used to catch unfinished DMAs */679u32 last_vsync_field; /* last seen vsync field */680wait_queue_head_t dma_waitq; /* wake up when the current DMA is finished */681wait_queue_head_t eos_waitq; /* wake up when EOS arrives */682wait_queue_head_t event_waitq; /* wake up when the next decoder event arrives */683wait_queue_head_t vsync_waitq; /* wake up when the next decoder vsync arrives */684685686/* Mailbox */687struct ivtv_mailbox_data enc_mbox; /* encoder mailboxes */688struct ivtv_mailbox_data dec_mbox; /* decoder mailboxes */689struct ivtv_api_cache api_cache[256]; /* cached API commands */690691692/* I2C */693struct i2c_adapter i2c_adap;694struct i2c_algo_bit_data i2c_algo;695struct i2c_client i2c_client;696int i2c_state; /* i2c bit state */697struct mutex i2c_bus_lock; /* lock i2c bus */698699struct IR_i2c_init_data ir_i2c_init_data;700701/* Program Index information */702u32 pgm_info_offset; /* start of pgm info in encoder memory */703u32 pgm_info_num; /* number of elements in the pgm cyclic buffer in encoder memory */704u32 pgm_info_write_idx; /* last index written by the card that was transferred to pgm_info[] */705u32 pgm_info_read_idx; /* last index in pgm_info read by the application */706struct v4l2_enc_idx_entry pgm_info[IVTV_MAX_PGM_INDEX]; /* filled from the pgm cyclic buffer on the card */707708709/* Miscellaneous */710u32 open_id; /* incremented each time an open occurs, is >= 1 */711int search_pack_header; /* 1 if ivtv_copy_buf_to_user() is scanning for a pack header (0xba) */712int speed; /* current playback speed setting */713u8 speed_mute_audio; /* 1 if audio should be muted when fast forward */714u64 mpg_data_received; /* number of bytes received from the MPEG stream */715u64 vbi_data_inserted; /* number of VBI bytes inserted into the MPEG stream */716u32 last_dec_timing[3]; /* cache last retrieved pts/scr/frame values */717unsigned long dualwatch_jiffies;/* jiffies value of the previous dualwatch check */718u32 dualwatch_stereo_mode; /* current detected dualwatch stereo mode */719720721/* VBI state info */722struct vbi_info vbi; /* VBI-specific data */723724725/* YUV playback */726struct yuv_playback_info yuv_info; /* YUV playback data */727728729/* OSD support */730unsigned long osd_video_pbase;731int osd_global_alpha_state; /* 1 = global alpha is on */732int osd_local_alpha_state; /* 1 = local alpha is on */733int osd_chroma_key_state; /* 1 = chroma-keying is on */734u8 osd_global_alpha; /* current global alpha */735u32 osd_chroma_key; /* current chroma key */736struct v4l2_rect osd_rect; /* current OSD position and size */737struct v4l2_rect main_rect; /* current Main window position and size */738struct osd_info *osd_info; /* ivtvfb private OSD info */739void (*ivtvfb_restore)(struct ivtv *itv); /* Used for a warm start */740};741742static inline struct ivtv *to_ivtv(struct v4l2_device *v4l2_dev)743{744return container_of(v4l2_dev, struct ivtv, v4l2_dev);745}746747/* Globals */748extern int ivtv_first_minor;749750/*==============Prototypes==================*/751752/* Hardware/IRQ */753void ivtv_set_irq_mask(struct ivtv *itv, u32 mask);754void ivtv_clear_irq_mask(struct ivtv *itv, u32 mask);755756/* try to set output mode, return current mode. */757int ivtv_set_output_mode(struct ivtv *itv, int mode);758759/* return current output stream based on current mode */760struct ivtv_stream *ivtv_get_output_stream(struct ivtv *itv);761762/* Return non-zero if a signal is pending */763int ivtv_msleep_timeout(unsigned int msecs, int intr);764765/* Wait on queue, returns -EINTR if interrupted */766int ivtv_waitq(wait_queue_head_t *waitq);767768/* Read Hauppauge eeprom */769struct tveeprom; /* forward reference */770void ivtv_read_eeprom(struct ivtv *itv, struct tveeprom *tv);771772/* First-open initialization: load firmware, init cx25840, etc. */773int ivtv_init_on_first_open(struct ivtv *itv);774775/* Test if the current VBI mode is raw (1) or sliced (0) */776static inline int ivtv_raw_vbi(const struct ivtv *itv)777{778return itv->vbi.in.type == V4L2_BUF_TYPE_VBI_CAPTURE;779}780781/* This is a PCI post thing, where if the pci register is not read, then782the write doesn't always take effect right away. By reading back the783register any pending PCI writes will be performed (in order), and so784you can be sure that the writes are guaranteed to be done.785786Rarely needed, only in some timing sensitive cases.787Apparently if this is not done some motherboards seem788to kill the firmware and get into the broken state until computer is789rebooted. */790#define write_sync(val, reg) \791do { writel(val, reg); readl(reg); } while (0)792793#define read_reg(reg) readl(itv->reg_mem + (reg))794#define write_reg(val, reg) writel(val, itv->reg_mem + (reg))795#define write_reg_sync(val, reg) \796do { write_reg(val, reg); read_reg(reg); } while (0)797798#define read_enc(addr) readl(itv->enc_mem + (u32)(addr))799#define write_enc(val, addr) writel(val, itv->enc_mem + (u32)(addr))800#define write_enc_sync(val, addr) \801do { write_enc(val, addr); read_enc(addr); } while (0)802803#define read_dec(addr) readl(itv->dec_mem + (u32)(addr))804#define write_dec(val, addr) writel(val, itv->dec_mem + (u32)(addr))805#define write_dec_sync(val, addr) \806do { write_dec(val, addr); read_dec(addr); } while (0)807808/* Call the specified callback for all subdevs matching hw (if 0, then809match them all). Ignore any errors. */810#define ivtv_call_hw(itv, hw, o, f, args...) \811do { \812struct v4l2_subdev *__sd; \813__v4l2_device_call_subdevs_p(&(itv)->v4l2_dev, __sd, \814!(hw) || (__sd->grp_id & (hw)), o, f , ##args); \815} while (0)816817#define ivtv_call_all(itv, o, f, args...) ivtv_call_hw(itv, 0, o, f , ##args)818819/* Call the specified callback for all subdevs matching hw (if 0, then820match them all). If the callback returns an error other than 0 or821-ENOIOCTLCMD, then return with that error code. */822#define ivtv_call_hw_err(itv, hw, o, f, args...) \823({ \824struct v4l2_subdev *__sd; \825__v4l2_device_call_subdevs_until_err_p(&(itv)->v4l2_dev, __sd, \826!(hw) || (__sd->grp_id & (hw)), o, f , ##args); \827})828829#define ivtv_call_all_err(itv, o, f, args...) ivtv_call_hw_err(itv, 0, o, f , ##args)830831#endif832833834