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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/include/drm/intel-gtt.h
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/* Common header for intel-gtt.ko and i915.ko */

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#ifndef _DRM_INTEL_GTT_H

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#define	_DRM_INTEL_GTT_H

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const struct intel_gtt {

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	/* Size of memory reserved for graphics by the BIOS */

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	unsigned int stolen_size;

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	/* Total number of gtt entries. */

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	unsigned int gtt_total_entries;

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	/* Part of the gtt that is mappable by the cpu, for those chips where

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	 * this is not the full gtt. */

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	unsigned int gtt_mappable_entries;

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	/* Whether i915 needs to use the dmar apis or not. */

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	unsigned int needs_dmar : 1;

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} *intel_gtt_get(void);

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void intel_gtt_chipset_flush(void);

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void intel_gtt_unmap_memory(struct scatterlist *sg_list, int num_sg);

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void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries);

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int intel_gtt_map_memory(struct page **pages, unsigned int num_entries,

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			 struct scatterlist **sg_list, int *num_sg);

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void intel_gtt_insert_sg_entries(struct scatterlist *sg_list,

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				 unsigned int sg_len,

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				 unsigned int pg_start,

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				 unsigned int flags);

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void intel_gtt_insert_pages(unsigned int first_entry, unsigned int num_entries,

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			    struct page **pages, unsigned int flags);

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/* Special gtt memory types */

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#define AGP_DCACHE_MEMORY	1

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#define AGP_PHYS_MEMORY		2

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/* New caching attributes for gen6/sandybridge */

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#define AGP_USER_CACHED_MEMORY_LLC_MLC (AGP_USER_TYPES + 2)

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#define AGP_USER_UNCACHED_MEMORY (AGP_USER_TYPES + 4)

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/* flag for GFDT type */

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#define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)

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#endif

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