#ifndef __SOUND_CS4231_REGS_H1#define __SOUND_CS4231_REGS_H23/*4* Copyright (c) by Jaroslav Kysela <[email protected]>5* Definitions for CS4231 & InterWave chips & compatible chips registers6*7*8* This program is free software; you can redistribute it and/or modify9* it under the terms of the GNU General Public License as published by10* the Free Software Foundation; either version 2 of the License, or11* (at your option) any later version.12*13* This program is distributed in the hope that it will be useful,14* but WITHOUT ANY WARRANTY; without even the implied warranty of15* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the16* GNU General Public License for more details.17*18* You should have received a copy of the GNU General Public License19* along with this program; if not, write to the Free Software20* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA21*22*/2324/* IO ports */2526#define CS4231P(x) (c_d_c_CS4231##x)2728#define c_d_c_CS4231REGSEL 029#define c_d_c_CS4231REG 130#define c_d_c_CS4231STATUS 231#define c_d_c_CS4231PIO 33233/* codec registers */3435#define CS4231_LEFT_INPUT 0x00 /* left input control */36#define CS4231_RIGHT_INPUT 0x01 /* right input control */37#define CS4231_AUX1_LEFT_INPUT 0x02 /* left AUX1 input control */38#define CS4231_AUX1_RIGHT_INPUT 0x03 /* right AUX1 input control */39#define CS4231_AUX2_LEFT_INPUT 0x04 /* left AUX2 input control */40#define CS4231_AUX2_RIGHT_INPUT 0x05 /* right AUX2 input control */41#define CS4231_LEFT_OUTPUT 0x06 /* left output control register */42#define CS4231_RIGHT_OUTPUT 0x07 /* right output control register */43#define CS4231_PLAYBK_FORMAT 0x08 /* clock and data format - playback - bits 7-0 MCE */44#define CS4231_IFACE_CTRL 0x09 /* interface control - bits 7-2 MCE */45#define CS4231_PIN_CTRL 0x0a /* pin control */46#define CS4231_TEST_INIT 0x0b /* test and initialization */47#define CS4231_MISC_INFO 0x0c /* miscellaneous information */48#define CS4231_LOOPBACK 0x0d /* loopback control */49#define CS4231_PLY_UPR_CNT 0x0e /* playback upper base count */50#define CS4231_PLY_LWR_CNT 0x0f /* playback lower base count */51#define CS4231_ALT_FEATURE_1 0x10 /* alternate #1 feature enable */52#define AD1845_AF1_MIC_LEFT 0x10 /* alternate #1 feature + MIC left */53#define CS4231_ALT_FEATURE_2 0x11 /* alternate #2 feature enable */54#define AD1845_AF2_MIC_RIGHT 0x11 /* alternate #2 feature + MIC right */55#define CS4231_LEFT_LINE_IN 0x12 /* left line input control */56#define CS4231_RIGHT_LINE_IN 0x13 /* right line input control */57#define CS4231_TIMER_LOW 0x14 /* timer low byte */58#define CS4231_TIMER_HIGH 0x15 /* timer high byte */59#define CS4231_LEFT_MIC_INPUT 0x16 /* left MIC input control register (InterWave only) */60#define AD1845_UPR_FREQ_SEL 0x16 /* upper byte of frequency select */61#define CS4231_RIGHT_MIC_INPUT 0x17 /* right MIC input control register (InterWave only) */62#define AD1845_LWR_FREQ_SEL 0x17 /* lower byte of frequency select */63#define CS4236_EXT_REG 0x17 /* extended register access */64#define CS4231_IRQ_STATUS 0x18 /* irq status register */65#define CS4231_LINE_LEFT_OUTPUT 0x19 /* left line output control register (InterWave only) */66#define CS4231_VERSION 0x19 /* CS4231(A) - version values */67#define CS4231_MONO_CTRL 0x1a /* mono input/output control */68#define CS4231_LINE_RIGHT_OUTPUT 0x1b /* right line output control register (InterWave only) */69#define AD1845_PWR_DOWN 0x1b /* power down control */70#define CS4235_LEFT_MASTER 0x1b /* left master output control */71#define CS4231_REC_FORMAT 0x1c /* clock and data format - record - bits 7-0 MCE */72#define AD1845_CLOCK 0x1d /* crystal clock select and total power down */73#define CS4235_RIGHT_MASTER 0x1d /* right master output control */74#define CS4231_REC_UPR_CNT 0x1e /* record upper count */75#define CS4231_REC_LWR_CNT 0x1f /* record lower count */7677/* definitions for codec register select port - CODECP( REGSEL ) */7879#define CS4231_INIT 0x80 /* CODEC is initializing */80#define CS4231_MCE 0x40 /* mode change enable */81#define CS4231_TRD 0x20 /* transfer request disable */8283/* definitions for codec status register - CODECP( STATUS ) */8485#define CS4231_GLOBALIRQ 0x01 /* IRQ is active */8687/* definitions for codec irq status */8889#define CS4231_PLAYBACK_IRQ 0x1090#define CS4231_RECORD_IRQ 0x2091#define CS4231_TIMER_IRQ 0x4092#define CS4231_ALL_IRQS 0x7093#define CS4231_REC_UNDERRUN 0x0894#define CS4231_REC_OVERRUN 0x0495#define CS4231_PLY_OVERRUN 0x0296#define CS4231_PLY_UNDERRUN 0x019798/* definitions for CS4231_LEFT_INPUT and CS4231_RIGHT_INPUT registers */99100#define CS4231_ENABLE_MIC_GAIN 0x20101102#define CS4231_MIXS_LINE 0x00103#define CS4231_MIXS_AUX1 0x40104#define CS4231_MIXS_MIC 0x80105#define CS4231_MIXS_ALL 0xc0106107/* definitions for clock and data format register - CS4231_PLAYBK_FORMAT */108109#define CS4231_LINEAR_8 0x00 /* 8-bit unsigned data */110#define CS4231_ALAW_8 0x60 /* 8-bit A-law companded */111#define CS4231_ULAW_8 0x20 /* 8-bit U-law companded */112#define CS4231_LINEAR_16 0x40 /* 16-bit twos complement data - little endian */113#define CS4231_LINEAR_16_BIG 0xc0 /* 16-bit twos complement data - big endian */114#define CS4231_ADPCM_16 0xa0 /* 16-bit ADPCM */115#define CS4231_STEREO 0x10 /* stereo mode */116/* bits 3-1 define frequency divisor */117#define CS4231_XTAL1 0x00 /* 24.576 crystal */118#define CS4231_XTAL2 0x01 /* 16.9344 crystal */119120/* definitions for interface control register - CS4231_IFACE_CTRL */121122#define CS4231_RECORD_PIO 0x80 /* record PIO enable */123#define CS4231_PLAYBACK_PIO 0x40 /* playback PIO enable */124#define CS4231_CALIB_MODE 0x18 /* calibration mode bits */125#define CS4231_AUTOCALIB 0x08 /* auto calibrate */126#define CS4231_SINGLE_DMA 0x04 /* use single DMA channel */127#define CS4231_RECORD_ENABLE 0x02 /* record enable */128#define CS4231_PLAYBACK_ENABLE 0x01 /* playback enable */129130/* definitions for pin control register - CS4231_PIN_CTRL */131132#define CS4231_IRQ_ENABLE 0x02 /* enable IRQ */133#define CS4231_XCTL1 0x40 /* external control #1 */134#define CS4231_XCTL0 0x80 /* external control #0 */135136/* definitions for test and init register - CS4231_TEST_INIT */137138#define CS4231_CALIB_IN_PROGRESS 0x20 /* auto calibrate in progress */139#define CS4231_DMA_REQUEST 0x10 /* DMA request in progress */140141/* definitions for misc control register - CS4231_MISC_INFO */142143#define CS4231_MODE2 0x40 /* MODE 2 */144#define CS4231_IW_MODE3 0x6c /* MODE 3 - InterWave enhanced mode */145#define CS4231_4236_MODE3 0xe0 /* MODE 3 - CS4236+ enhanced mode */146147/* definitions for alternate feature 1 register - CS4231_ALT_FEATURE_1 */148149#define CS4231_DACZ 0x01 /* zero DAC when underrun */150#define CS4231_TIMER_ENABLE 0x40 /* codec timer enable */151#define CS4231_OLB 0x80 /* output level bit */152153/* definitions for Extended Registers - CS4236+ */154155#define CS4236_REG(i23val) (((i23val << 2) & 0x10) | ((i23val >> 4) & 0x0f))156#define CS4236_I23VAL(reg) ((((reg)&0xf) << 4) | (((reg)&0x10) >> 2) | 0x8)157158#define CS4236_LEFT_LINE 0x08 /* left LINE alternate volume */159#define CS4236_RIGHT_LINE 0x18 /* right LINE alternate volume */160#define CS4236_LEFT_MIC 0x28 /* left MIC volume */161#define CS4236_RIGHT_MIC 0x38 /* right MIC volume */162#define CS4236_LEFT_MIX_CTRL 0x48 /* synthesis and left input mixer control */163#define CS4236_RIGHT_MIX_CTRL 0x58 /* right input mixer control */164#define CS4236_LEFT_FM 0x68 /* left FM volume */165#define CS4236_RIGHT_FM 0x78 /* right FM volume */166#define CS4236_LEFT_DSP 0x88 /* left DSP serial port volume */167#define CS4236_RIGHT_DSP 0x98 /* right DSP serial port volume */168#define CS4236_RIGHT_LOOPBACK 0xa8 /* right loopback monitor volume */169#define CS4236_DAC_MUTE 0xb8 /* DAC mute and IFSE enable */170#define CS4236_ADC_RATE 0xc8 /* indenpendent ADC sample frequency */171#define CS4236_DAC_RATE 0xd8 /* indenpendent DAC sample frequency */172#define CS4236_LEFT_MASTER 0xe8 /* left master digital audio volume */173#define CS4236_RIGHT_MASTER 0xf8 /* right master digital audio volume */174#define CS4236_LEFT_WAVE 0x0c /* left wavetable serial port volume */175#define CS4236_RIGHT_WAVE 0x1c /* right wavetable serial port volume */176#define CS4236_VERSION 0x9c /* chip version and ID */177178/* definitions for extended registers - OPTI93X */179#define OPTi931_AUX_LEFT_INPUT 0x10180#define OPTi931_AUX_RIGHT_INPUT 0x11181#define OPTi93X_MIC_LEFT_INPUT 0x14182#define OPTi93X_MIC_RIGHT_INPUT 0x15183#define OPTi93X_OUT_LEFT 0x16184#define OPTi93X_OUT_RIGHT 0x17185186#endif /* __SOUND_CS4231_REGS_H */187188189