Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
awilliam
GitHub Repository: awilliam/linux-vfio
Path: blob/master/sound/i2c/other/ak4113.c
10817 views
1
/*
2
* Routines for control of the AK4113 via I2C/4-wire serial interface
3
* IEC958 (S/PDIF) receiver by Asahi Kasei
4
* Copyright (c) by Jaroslav Kysela <[email protected]>
5
* Copyright (c) by Pavel Hofman <[email protected]>
6
*
7
*
8
* This program is free software; you can redistribute it and/or modify
9
* it under the terms of the GNU General Public License as published by
10
* the Free Software Foundation; either version 2 of the License, or
11
* (at your option) any later version.
12
*
13
* This program is distributed in the hope that it will be useful,
14
* but WITHOUT ANY WARRANTY; without even the implied warranty of
15
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16
* GNU General Public License for more details.
17
*
18
* You should have received a copy of the GNU General Public License
19
* along with this program; if not, write to the Free Software
20
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21
*
22
*/
23
24
#include <linux/slab.h>
25
#include <linux/delay.h>
26
#include <sound/core.h>
27
#include <sound/control.h>
28
#include <sound/pcm.h>
29
#include <sound/ak4113.h>
30
#include <sound/asoundef.h>
31
#include <sound/info.h>
32
33
MODULE_AUTHOR("Pavel Hofman <[email protected]>");
34
MODULE_DESCRIPTION("AK4113 IEC958 (S/PDIF) receiver by Asahi Kasei");
35
MODULE_LICENSE("GPL");
36
37
#define AK4113_ADDR 0x00 /* fixed address */
38
39
static void ak4113_stats(struct work_struct *work);
40
static void ak4113_init_regs(struct ak4113 *chip);
41
42
43
static void reg_write(struct ak4113 *ak4113, unsigned char reg,
44
unsigned char val)
45
{
46
ak4113->write(ak4113->private_data, reg, val);
47
if (reg < sizeof(ak4113->regmap))
48
ak4113->regmap[reg] = val;
49
}
50
51
static inline unsigned char reg_read(struct ak4113 *ak4113, unsigned char reg)
52
{
53
return ak4113->read(ak4113->private_data, reg);
54
}
55
56
static void snd_ak4113_free(struct ak4113 *chip)
57
{
58
chip->init = 1; /* don't schedule new work */
59
mb();
60
cancel_delayed_work_sync(&chip->work);
61
kfree(chip);
62
}
63
64
static int snd_ak4113_dev_free(struct snd_device *device)
65
{
66
struct ak4113 *chip = device->device_data;
67
snd_ak4113_free(chip);
68
return 0;
69
}
70
71
int snd_ak4113_create(struct snd_card *card, ak4113_read_t *read,
72
ak4113_write_t *write, const unsigned char *pgm,
73
void *private_data, struct ak4113 **r_ak4113)
74
{
75
struct ak4113 *chip;
76
int err = 0;
77
unsigned char reg;
78
static struct snd_device_ops ops = {
79
.dev_free = snd_ak4113_dev_free,
80
};
81
82
chip = kzalloc(sizeof(*chip), GFP_KERNEL);
83
if (chip == NULL)
84
return -ENOMEM;
85
spin_lock_init(&chip->lock);
86
chip->card = card;
87
chip->read = read;
88
chip->write = write;
89
chip->private_data = private_data;
90
INIT_DELAYED_WORK(&chip->work, ak4113_stats);
91
92
for (reg = 0; reg < AK4113_WRITABLE_REGS ; reg++)
93
chip->regmap[reg] = pgm[reg];
94
ak4113_init_regs(chip);
95
96
chip->rcs0 = reg_read(chip, AK4113_REG_RCS0) & ~(AK4113_QINT |
97
AK4113_CINT | AK4113_STC);
98
chip->rcs1 = reg_read(chip, AK4113_REG_RCS1);
99
chip->rcs2 = reg_read(chip, AK4113_REG_RCS2);
100
err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
101
if (err < 0)
102
goto __fail;
103
104
if (r_ak4113)
105
*r_ak4113 = chip;
106
return 0;
107
108
__fail:
109
snd_ak4113_free(chip);
110
return err < 0 ? err : -EIO;
111
}
112
EXPORT_SYMBOL_GPL(snd_ak4113_create);
113
114
void snd_ak4113_reg_write(struct ak4113 *chip, unsigned char reg,
115
unsigned char mask, unsigned char val)
116
{
117
if (reg >= AK4113_WRITABLE_REGS)
118
return;
119
reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
120
}
121
EXPORT_SYMBOL_GPL(snd_ak4113_reg_write);
122
123
static void ak4113_init_regs(struct ak4113 *chip)
124
{
125
unsigned char old = chip->regmap[AK4113_REG_PWRDN], reg;
126
127
/* bring the chip to reset state and powerdown state */
128
reg_write(chip, AK4113_REG_PWRDN, old & ~(AK4113_RST|AK4113_PWN));
129
udelay(200);
130
/* release reset, but leave powerdown */
131
reg_write(chip, AK4113_REG_PWRDN, (old | AK4113_RST) & ~AK4113_PWN);
132
udelay(200);
133
for (reg = 1; reg < AK4113_WRITABLE_REGS; reg++)
134
reg_write(chip, reg, chip->regmap[reg]);
135
/* release powerdown, everything is initialized now */
136
reg_write(chip, AK4113_REG_PWRDN, old | AK4113_RST | AK4113_PWN);
137
}
138
139
void snd_ak4113_reinit(struct ak4113 *chip)
140
{
141
chip->init = 1;
142
mb();
143
flush_delayed_work_sync(&chip->work);
144
ak4113_init_regs(chip);
145
/* bring up statistics / event queing */
146
chip->init = 0;
147
if (chip->kctls[0])
148
schedule_delayed_work(&chip->work, HZ / 10);
149
}
150
EXPORT_SYMBOL_GPL(snd_ak4113_reinit);
151
152
static unsigned int external_rate(unsigned char rcs1)
153
{
154
switch (rcs1 & (AK4113_FS0|AK4113_FS1|AK4113_FS2|AK4113_FS3)) {
155
case AK4113_FS_8000HZ:
156
return 8000;
157
case AK4113_FS_11025HZ:
158
return 11025;
159
case AK4113_FS_16000HZ:
160
return 16000;
161
case AK4113_FS_22050HZ:
162
return 22050;
163
case AK4113_FS_24000HZ:
164
return 24000;
165
case AK4113_FS_32000HZ:
166
return 32000;
167
case AK4113_FS_44100HZ:
168
return 44100;
169
case AK4113_FS_48000HZ:
170
return 48000;
171
case AK4113_FS_64000HZ:
172
return 64000;
173
case AK4113_FS_88200HZ:
174
return 88200;
175
case AK4113_FS_96000HZ:
176
return 96000;
177
case AK4113_FS_176400HZ:
178
return 176400;
179
case AK4113_FS_192000HZ:
180
return 192000;
181
default:
182
return 0;
183
}
184
}
185
186
static int snd_ak4113_in_error_info(struct snd_kcontrol *kcontrol,
187
struct snd_ctl_elem_info *uinfo)
188
{
189
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
190
uinfo->count = 1;
191
uinfo->value.integer.min = 0;
192
uinfo->value.integer.max = LONG_MAX;
193
return 0;
194
}
195
196
static int snd_ak4113_in_error_get(struct snd_kcontrol *kcontrol,
197
struct snd_ctl_elem_value *ucontrol)
198
{
199
struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
200
long *ptr;
201
202
spin_lock_irq(&chip->lock);
203
ptr = (long *)(((char *)chip) + kcontrol->private_value);
204
ucontrol->value.integer.value[0] = *ptr;
205
*ptr = 0;
206
spin_unlock_irq(&chip->lock);
207
return 0;
208
}
209
210
#define snd_ak4113_in_bit_info snd_ctl_boolean_mono_info
211
212
static int snd_ak4113_in_bit_get(struct snd_kcontrol *kcontrol,
213
struct snd_ctl_elem_value *ucontrol)
214
{
215
struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
216
unsigned char reg = kcontrol->private_value & 0xff;
217
unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
218
unsigned char inv = (kcontrol->private_value >> 31) & 1;
219
220
ucontrol->value.integer.value[0] =
221
((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
222
return 0;
223
}
224
225
static int snd_ak4113_rx_info(struct snd_kcontrol *kcontrol,
226
struct snd_ctl_elem_info *uinfo)
227
{
228
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
229
uinfo->count = 1;
230
uinfo->value.integer.min = 0;
231
uinfo->value.integer.max = 5;
232
return 0;
233
}
234
235
static int snd_ak4113_rx_get(struct snd_kcontrol *kcontrol,
236
struct snd_ctl_elem_value *ucontrol)
237
{
238
struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
239
240
ucontrol->value.integer.value[0] =
241
(AK4113_IPS(chip->regmap[AK4113_REG_IO1]));
242
return 0;
243
}
244
245
static int snd_ak4113_rx_put(struct snd_kcontrol *kcontrol,
246
struct snd_ctl_elem_value *ucontrol)
247
{
248
struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
249
int change;
250
u8 old_val;
251
252
spin_lock_irq(&chip->lock);
253
old_val = chip->regmap[AK4113_REG_IO1];
254
change = ucontrol->value.integer.value[0] != AK4113_IPS(old_val);
255
if (change)
256
reg_write(chip, AK4113_REG_IO1,
257
(old_val & (~AK4113_IPS(0xff))) |
258
(AK4113_IPS(ucontrol->value.integer.value[0])));
259
spin_unlock_irq(&chip->lock);
260
return change;
261
}
262
263
static int snd_ak4113_rate_info(struct snd_kcontrol *kcontrol,
264
struct snd_ctl_elem_info *uinfo)
265
{
266
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
267
uinfo->count = 1;
268
uinfo->value.integer.min = 0;
269
uinfo->value.integer.max = 192000;
270
return 0;
271
}
272
273
static int snd_ak4113_rate_get(struct snd_kcontrol *kcontrol,
274
struct snd_ctl_elem_value *ucontrol)
275
{
276
struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
277
278
ucontrol->value.integer.value[0] = external_rate(reg_read(chip,
279
AK4113_REG_RCS1));
280
return 0;
281
}
282
283
static int snd_ak4113_spdif_info(struct snd_kcontrol *kcontrol,
284
struct snd_ctl_elem_info *uinfo)
285
{
286
uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
287
uinfo->count = 1;
288
return 0;
289
}
290
291
static int snd_ak4113_spdif_get(struct snd_kcontrol *kcontrol,
292
struct snd_ctl_elem_value *ucontrol)
293
{
294
struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
295
unsigned i;
296
297
for (i = 0; i < AK4113_REG_RXCSB_SIZE; i++)
298
ucontrol->value.iec958.status[i] = reg_read(chip,
299
AK4113_REG_RXCSB0 + i);
300
return 0;
301
}
302
303
static int snd_ak4113_spdif_mask_info(struct snd_kcontrol *kcontrol,
304
struct snd_ctl_elem_info *uinfo)
305
{
306
uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
307
uinfo->count = 1;
308
return 0;
309
}
310
311
static int snd_ak4113_spdif_mask_get(struct snd_kcontrol *kcontrol,
312
struct snd_ctl_elem_value *ucontrol)
313
{
314
memset(ucontrol->value.iec958.status, 0xff, AK4113_REG_RXCSB_SIZE);
315
return 0;
316
}
317
318
static int snd_ak4113_spdif_pinfo(struct snd_kcontrol *kcontrol,
319
struct snd_ctl_elem_info *uinfo)
320
{
321
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
322
uinfo->value.integer.min = 0;
323
uinfo->value.integer.max = 0xffff;
324
uinfo->count = 4;
325
return 0;
326
}
327
328
static int snd_ak4113_spdif_pget(struct snd_kcontrol *kcontrol,
329
struct snd_ctl_elem_value *ucontrol)
330
{
331
struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
332
unsigned short tmp;
333
334
ucontrol->value.integer.value[0] = 0xf8f2;
335
ucontrol->value.integer.value[1] = 0x4e1f;
336
tmp = reg_read(chip, AK4113_REG_Pc0) |
337
(reg_read(chip, AK4113_REG_Pc1) << 8);
338
ucontrol->value.integer.value[2] = tmp;
339
tmp = reg_read(chip, AK4113_REG_Pd0) |
340
(reg_read(chip, AK4113_REG_Pd1) << 8);
341
ucontrol->value.integer.value[3] = tmp;
342
return 0;
343
}
344
345
static int snd_ak4113_spdif_qinfo(struct snd_kcontrol *kcontrol,
346
struct snd_ctl_elem_info *uinfo)
347
{
348
uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
349
uinfo->count = AK4113_REG_QSUB_SIZE;
350
return 0;
351
}
352
353
static int snd_ak4113_spdif_qget(struct snd_kcontrol *kcontrol,
354
struct snd_ctl_elem_value *ucontrol)
355
{
356
struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
357
unsigned i;
358
359
for (i = 0; i < AK4113_REG_QSUB_SIZE; i++)
360
ucontrol->value.bytes.data[i] = reg_read(chip,
361
AK4113_REG_QSUB_ADDR + i);
362
return 0;
363
}
364
365
/* Don't forget to change AK4113_CONTROLS define!!! */
366
static struct snd_kcontrol_new snd_ak4113_iec958_controls[] = {
367
{
368
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
369
.name = "IEC958 Parity Errors",
370
.access = SNDRV_CTL_ELEM_ACCESS_READ |
371
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
372
.info = snd_ak4113_in_error_info,
373
.get = snd_ak4113_in_error_get,
374
.private_value = offsetof(struct ak4113, parity_errors),
375
},
376
{
377
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
378
.name = "IEC958 V-Bit Errors",
379
.access = SNDRV_CTL_ELEM_ACCESS_READ |
380
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
381
.info = snd_ak4113_in_error_info,
382
.get = snd_ak4113_in_error_get,
383
.private_value = offsetof(struct ak4113, v_bit_errors),
384
},
385
{
386
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
387
.name = "IEC958 C-CRC Errors",
388
.access = SNDRV_CTL_ELEM_ACCESS_READ |
389
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
390
.info = snd_ak4113_in_error_info,
391
.get = snd_ak4113_in_error_get,
392
.private_value = offsetof(struct ak4113, ccrc_errors),
393
},
394
{
395
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
396
.name = "IEC958 Q-CRC Errors",
397
.access = SNDRV_CTL_ELEM_ACCESS_READ |
398
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
399
.info = snd_ak4113_in_error_info,
400
.get = snd_ak4113_in_error_get,
401
.private_value = offsetof(struct ak4113, qcrc_errors),
402
},
403
{
404
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
405
.name = "IEC958 External Rate",
406
.access = SNDRV_CTL_ELEM_ACCESS_READ |
407
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
408
.info = snd_ak4113_rate_info,
409
.get = snd_ak4113_rate_get,
410
},
411
{
412
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
413
.name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),
414
.access = SNDRV_CTL_ELEM_ACCESS_READ,
415
.info = snd_ak4113_spdif_mask_info,
416
.get = snd_ak4113_spdif_mask_get,
417
},
418
{
419
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
420
.name = SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT),
421
.access = SNDRV_CTL_ELEM_ACCESS_READ |
422
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
423
.info = snd_ak4113_spdif_info,
424
.get = snd_ak4113_spdif_get,
425
},
426
{
427
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
428
.name = "IEC958 Preample Capture Default",
429
.access = SNDRV_CTL_ELEM_ACCESS_READ |
430
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
431
.info = snd_ak4113_spdif_pinfo,
432
.get = snd_ak4113_spdif_pget,
433
},
434
{
435
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
436
.name = "IEC958 Q-subcode Capture Default",
437
.access = SNDRV_CTL_ELEM_ACCESS_READ |
438
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
439
.info = snd_ak4113_spdif_qinfo,
440
.get = snd_ak4113_spdif_qget,
441
},
442
{
443
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
444
.name = "IEC958 Audio",
445
.access = SNDRV_CTL_ELEM_ACCESS_READ |
446
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
447
.info = snd_ak4113_in_bit_info,
448
.get = snd_ak4113_in_bit_get,
449
.private_value = (1<<31) | (1<<8) | AK4113_REG_RCS0,
450
},
451
{
452
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
453
.name = "IEC958 Non-PCM Bitstream",
454
.access = SNDRV_CTL_ELEM_ACCESS_READ |
455
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
456
.info = snd_ak4113_in_bit_info,
457
.get = snd_ak4113_in_bit_get,
458
.private_value = (0<<8) | AK4113_REG_RCS1,
459
},
460
{
461
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
462
.name = "IEC958 DTS Bitstream",
463
.access = SNDRV_CTL_ELEM_ACCESS_READ |
464
SNDRV_CTL_ELEM_ACCESS_VOLATILE,
465
.info = snd_ak4113_in_bit_info,
466
.get = snd_ak4113_in_bit_get,
467
.private_value = (1<<8) | AK4113_REG_RCS1,
468
},
469
{
470
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
471
.name = "AK4113 Input Select",
472
.access = SNDRV_CTL_ELEM_ACCESS_READ |
473
SNDRV_CTL_ELEM_ACCESS_WRITE,
474
.info = snd_ak4113_rx_info,
475
.get = snd_ak4113_rx_get,
476
.put = snd_ak4113_rx_put,
477
}
478
};
479
480
static void snd_ak4113_proc_regs_read(struct snd_info_entry *entry,
481
struct snd_info_buffer *buffer)
482
{
483
struct ak4113 *ak4113 = entry->private_data;
484
int reg, val;
485
/* all ak4113 registers 0x00 - 0x1c */
486
for (reg = 0; reg < 0x1d; reg++) {
487
val = reg_read(ak4113, reg);
488
snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val);
489
}
490
}
491
492
static void snd_ak4113_proc_init(struct ak4113 *ak4113)
493
{
494
struct snd_info_entry *entry;
495
if (!snd_card_proc_new(ak4113->card, "ak4113", &entry))
496
snd_info_set_text_ops(entry, ak4113, snd_ak4113_proc_regs_read);
497
}
498
499
int snd_ak4113_build(struct ak4113 *ak4113,
500
struct snd_pcm_substream *cap_substream)
501
{
502
struct snd_kcontrol *kctl;
503
unsigned int idx;
504
int err;
505
506
if (snd_BUG_ON(!cap_substream))
507
return -EINVAL;
508
ak4113->substream = cap_substream;
509
for (idx = 0; idx < AK4113_CONTROLS; idx++) {
510
kctl = snd_ctl_new1(&snd_ak4113_iec958_controls[idx], ak4113);
511
if (kctl == NULL)
512
return -ENOMEM;
513
kctl->id.device = cap_substream->pcm->device;
514
kctl->id.subdevice = cap_substream->number;
515
err = snd_ctl_add(ak4113->card, kctl);
516
if (err < 0)
517
return err;
518
ak4113->kctls[idx] = kctl;
519
}
520
snd_ak4113_proc_init(ak4113);
521
/* trigger workq */
522
schedule_delayed_work(&ak4113->work, HZ / 10);
523
return 0;
524
}
525
EXPORT_SYMBOL_GPL(snd_ak4113_build);
526
527
int snd_ak4113_external_rate(struct ak4113 *ak4113)
528
{
529
unsigned char rcs1;
530
531
rcs1 = reg_read(ak4113, AK4113_REG_RCS1);
532
return external_rate(rcs1);
533
}
534
EXPORT_SYMBOL_GPL(snd_ak4113_external_rate);
535
536
int snd_ak4113_check_rate_and_errors(struct ak4113 *ak4113, unsigned int flags)
537
{
538
struct snd_pcm_runtime *runtime =
539
ak4113->substream ? ak4113->substream->runtime : NULL;
540
unsigned long _flags;
541
int res = 0;
542
unsigned char rcs0, rcs1, rcs2;
543
unsigned char c0, c1;
544
545
rcs1 = reg_read(ak4113, AK4113_REG_RCS1);
546
if (flags & AK4113_CHECK_NO_STAT)
547
goto __rate;
548
rcs0 = reg_read(ak4113, AK4113_REG_RCS0);
549
rcs2 = reg_read(ak4113, AK4113_REG_RCS2);
550
spin_lock_irqsave(&ak4113->lock, _flags);
551
if (rcs0 & AK4113_PAR)
552
ak4113->parity_errors++;
553
if (rcs0 & AK4113_V)
554
ak4113->v_bit_errors++;
555
if (rcs2 & AK4113_CCRC)
556
ak4113->ccrc_errors++;
557
if (rcs2 & AK4113_QCRC)
558
ak4113->qcrc_errors++;
559
c0 = (ak4113->rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC |
560
AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK)) ^
561
(rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC |
562
AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK));
563
c1 = (ak4113->rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM |
564
AK4113_DAT | 0xf0)) ^
565
(rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM |
566
AK4113_DAT | 0xf0));
567
ak4113->rcs0 = rcs0 & ~(AK4113_QINT | AK4113_CINT | AK4113_STC);
568
ak4113->rcs1 = rcs1;
569
ak4113->rcs2 = rcs2;
570
spin_unlock_irqrestore(&ak4113->lock, _flags);
571
572
if (rcs0 & AK4113_PAR)
573
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
574
&ak4113->kctls[0]->id);
575
if (rcs0 & AK4113_V)
576
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
577
&ak4113->kctls[1]->id);
578
if (rcs2 & AK4113_CCRC)
579
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
580
&ak4113->kctls[2]->id);
581
if (rcs2 & AK4113_QCRC)
582
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
583
&ak4113->kctls[3]->id);
584
585
/* rate change */
586
if (c1 & 0xf0)
587
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
588
&ak4113->kctls[4]->id);
589
590
if ((c1 & AK4113_PEM) | (c0 & AK4113_CINT))
591
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
592
&ak4113->kctls[6]->id);
593
if (c0 & AK4113_QINT)
594
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
595
&ak4113->kctls[8]->id);
596
597
if (c0 & AK4113_AUDION)
598
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
599
&ak4113->kctls[9]->id);
600
if (c1 & AK4113_NPCM)
601
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
602
&ak4113->kctls[10]->id);
603
if (c1 & AK4113_DTSCD)
604
snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
605
&ak4113->kctls[11]->id);
606
607
if (ak4113->change_callback && (c0 | c1) != 0)
608
ak4113->change_callback(ak4113, c0, c1);
609
610
__rate:
611
/* compare rate */
612
res = external_rate(rcs1);
613
if (!(flags & AK4113_CHECK_NO_RATE) && runtime &&
614
(runtime->rate != res)) {
615
snd_pcm_stream_lock_irqsave(ak4113->substream, _flags);
616
if (snd_pcm_running(ak4113->substream)) {
617
/*printk(KERN_DEBUG "rate changed (%i <- %i)\n",
618
* runtime->rate, res); */
619
snd_pcm_stop(ak4113->substream,
620
SNDRV_PCM_STATE_DRAINING);
621
wake_up(&runtime->sleep);
622
res = 1;
623
}
624
snd_pcm_stream_unlock_irqrestore(ak4113->substream, _flags);
625
}
626
return res;
627
}
628
EXPORT_SYMBOL_GPL(snd_ak4113_check_rate_and_errors);
629
630
static void ak4113_stats(struct work_struct *work)
631
{
632
struct ak4113 *chip = container_of(work, struct ak4113, work.work);
633
634
if (!chip->init)
635
snd_ak4113_check_rate_and_errors(chip, chip->check_flags);
636
637
schedule_delayed_work(&chip->work, HZ / 10);
638
}
639
640