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awilliam
GitHub Repository: awilliam/linux-vfio
Path: blob/master/sound/i2c/other/ak4117.c
10818 views
1
/*
2
* Routines for control of the AK4117 via 4-wire serial interface
3
* IEC958 (S/PDIF) receiver by Asahi Kasei
4
* Copyright (c) by Jaroslav Kysela <[email protected]>
5
*
6
*
7
* This program is free software; you can redistribute it and/or modify
8
* it under the terms of the GNU General Public License as published by
9
* the Free Software Foundation; either version 2 of the License, or
10
* (at your option) any later version.
11
*
12
* This program is distributed in the hope that it will be useful,
13
* but WITHOUT ANY WARRANTY; without even the implied warranty of
14
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15
* GNU General Public License for more details.
16
*
17
* You should have received a copy of the GNU General Public License
18
* along with this program; if not, write to the Free Software
19
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20
*
21
*/
22
23
#include <linux/slab.h>
24
#include <linux/delay.h>
25
#include <sound/core.h>
26
#include <sound/control.h>
27
#include <sound/pcm.h>
28
#include <sound/ak4117.h>
29
#include <sound/asoundef.h>
30
31
MODULE_AUTHOR("Jaroslav Kysela <[email protected]>");
32
MODULE_DESCRIPTION("AK4117 IEC958 (S/PDIF) receiver by Asahi Kasei");
33
MODULE_LICENSE("GPL");
34
35
#define AK4117_ADDR 0x00 /* fixed address */
36
37
static void snd_ak4117_timer(unsigned long data);
38
39
static void reg_write(struct ak4117 *ak4117, unsigned char reg, unsigned char val)
40
{
41
ak4117->write(ak4117->private_data, reg, val);
42
if (reg < sizeof(ak4117->regmap))
43
ak4117->regmap[reg] = val;
44
}
45
46
static inline unsigned char reg_read(struct ak4117 *ak4117, unsigned char reg)
47
{
48
return ak4117->read(ak4117->private_data, reg);
49
}
50
51
#if 0
52
static void reg_dump(struct ak4117 *ak4117)
53
{
54
int i;
55
56
printk(KERN_DEBUG "AK4117 REG DUMP:\n");
57
for (i = 0; i < 0x1b; i++)
58
printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4117, i), i < sizeof(ak4117->regmap) ? ak4117->regmap[i] : 0);
59
}
60
#endif
61
62
static void snd_ak4117_free(struct ak4117 *chip)
63
{
64
del_timer(&chip->timer);
65
kfree(chip);
66
}
67
68
static int snd_ak4117_dev_free(struct snd_device *device)
69
{
70
struct ak4117 *chip = device->device_data;
71
snd_ak4117_free(chip);
72
return 0;
73
}
74
75
int snd_ak4117_create(struct snd_card *card, ak4117_read_t *read, ak4117_write_t *write,
76
const unsigned char pgm[5], void *private_data, struct ak4117 **r_ak4117)
77
{
78
struct ak4117 *chip;
79
int err = 0;
80
unsigned char reg;
81
static struct snd_device_ops ops = {
82
.dev_free = snd_ak4117_dev_free,
83
};
84
85
chip = kzalloc(sizeof(*chip), GFP_KERNEL);
86
if (chip == NULL)
87
return -ENOMEM;
88
spin_lock_init(&chip->lock);
89
chip->card = card;
90
chip->read = read;
91
chip->write = write;
92
chip->private_data = private_data;
93
init_timer(&chip->timer);
94
chip->timer.data = (unsigned long)chip;
95
chip->timer.function = snd_ak4117_timer;
96
97
for (reg = 0; reg < 5; reg++)
98
chip->regmap[reg] = pgm[reg];
99
snd_ak4117_reinit(chip);
100
101
chip->rcs0 = reg_read(chip, AK4117_REG_RCS0) & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
102
chip->rcs1 = reg_read(chip, AK4117_REG_RCS1);
103
chip->rcs2 = reg_read(chip, AK4117_REG_RCS2);
104
105
if ((err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops)) < 0)
106
goto __fail;
107
108
if (r_ak4117)
109
*r_ak4117 = chip;
110
return 0;
111
112
__fail:
113
snd_ak4117_free(chip);
114
return err < 0 ? err : -EIO;
115
}
116
117
void snd_ak4117_reg_write(struct ak4117 *chip, unsigned char reg, unsigned char mask, unsigned char val)
118
{
119
if (reg >= 5)
120
return;
121
reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
122
}
123
124
void snd_ak4117_reinit(struct ak4117 *chip)
125
{
126
unsigned char old = chip->regmap[AK4117_REG_PWRDN], reg;
127
128
del_timer(&chip->timer);
129
chip->init = 1;
130
/* bring the chip to reset state and powerdown state */
131
reg_write(chip, AK4117_REG_PWRDN, 0);
132
udelay(200);
133
/* release reset, but leave powerdown */
134
reg_write(chip, AK4117_REG_PWRDN, (old | AK4117_RST) & ~AK4117_PWN);
135
udelay(200);
136
for (reg = 1; reg < 5; reg++)
137
reg_write(chip, reg, chip->regmap[reg]);
138
/* release powerdown, everything is initialized now */
139
reg_write(chip, AK4117_REG_PWRDN, old | AK4117_RST | AK4117_PWN);
140
chip->init = 0;
141
chip->timer.expires = 1 + jiffies;
142
add_timer(&chip->timer);
143
}
144
145
static unsigned int external_rate(unsigned char rcs1)
146
{
147
switch (rcs1 & (AK4117_FS0|AK4117_FS1|AK4117_FS2|AK4117_FS3)) {
148
case AK4117_FS_32000HZ: return 32000;
149
case AK4117_FS_44100HZ: return 44100;
150
case AK4117_FS_48000HZ: return 48000;
151
case AK4117_FS_88200HZ: return 88200;
152
case AK4117_FS_96000HZ: return 96000;
153
case AK4117_FS_176400HZ: return 176400;
154
case AK4117_FS_192000HZ: return 192000;
155
default: return 0;
156
}
157
}
158
159
static int snd_ak4117_in_error_info(struct snd_kcontrol *kcontrol,
160
struct snd_ctl_elem_info *uinfo)
161
{
162
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
163
uinfo->count = 1;
164
uinfo->value.integer.min = 0;
165
uinfo->value.integer.max = LONG_MAX;
166
return 0;
167
}
168
169
static int snd_ak4117_in_error_get(struct snd_kcontrol *kcontrol,
170
struct snd_ctl_elem_value *ucontrol)
171
{
172
struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
173
long *ptr;
174
175
spin_lock_irq(&chip->lock);
176
ptr = (long *)(((char *)chip) + kcontrol->private_value);
177
ucontrol->value.integer.value[0] = *ptr;
178
*ptr = 0;
179
spin_unlock_irq(&chip->lock);
180
return 0;
181
}
182
183
#define snd_ak4117_in_bit_info snd_ctl_boolean_mono_info
184
185
static int snd_ak4117_in_bit_get(struct snd_kcontrol *kcontrol,
186
struct snd_ctl_elem_value *ucontrol)
187
{
188
struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
189
unsigned char reg = kcontrol->private_value & 0xff;
190
unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
191
unsigned char inv = (kcontrol->private_value >> 31) & 1;
192
193
ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
194
return 0;
195
}
196
197
static int snd_ak4117_rx_info(struct snd_kcontrol *kcontrol,
198
struct snd_ctl_elem_info *uinfo)
199
{
200
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
201
uinfo->count = 1;
202
uinfo->value.integer.min = 0;
203
uinfo->value.integer.max = 1;
204
return 0;
205
}
206
207
static int snd_ak4117_rx_get(struct snd_kcontrol *kcontrol,
208
struct snd_ctl_elem_value *ucontrol)
209
{
210
struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
211
212
ucontrol->value.integer.value[0] = (chip->regmap[AK4117_REG_IO] & AK4117_IPS) ? 1 : 0;
213
return 0;
214
}
215
216
static int snd_ak4117_rx_put(struct snd_kcontrol *kcontrol,
217
struct snd_ctl_elem_value *ucontrol)
218
{
219
struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
220
int change;
221
u8 old_val;
222
223
spin_lock_irq(&chip->lock);
224
old_val = chip->regmap[AK4117_REG_IO];
225
change = !!ucontrol->value.integer.value[0] != ((old_val & AK4117_IPS) ? 1 : 0);
226
if (change)
227
reg_write(chip, AK4117_REG_IO, (old_val & ~AK4117_IPS) | (ucontrol->value.integer.value[0] ? AK4117_IPS : 0));
228
spin_unlock_irq(&chip->lock);
229
return change;
230
}
231
232
static int snd_ak4117_rate_info(struct snd_kcontrol *kcontrol,
233
struct snd_ctl_elem_info *uinfo)
234
{
235
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
236
uinfo->count = 1;
237
uinfo->value.integer.min = 0;
238
uinfo->value.integer.max = 192000;
239
return 0;
240
}
241
242
static int snd_ak4117_rate_get(struct snd_kcontrol *kcontrol,
243
struct snd_ctl_elem_value *ucontrol)
244
{
245
struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
246
247
ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4117_REG_RCS1));
248
return 0;
249
}
250
251
static int snd_ak4117_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
252
{
253
uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
254
uinfo->count = 1;
255
return 0;
256
}
257
258
static int snd_ak4117_spdif_get(struct snd_kcontrol *kcontrol,
259
struct snd_ctl_elem_value *ucontrol)
260
{
261
struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
262
unsigned i;
263
264
for (i = 0; i < AK4117_REG_RXCSB_SIZE; i++)
265
ucontrol->value.iec958.status[i] = reg_read(chip, AK4117_REG_RXCSB0 + i);
266
return 0;
267
}
268
269
static int snd_ak4117_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
270
{
271
uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
272
uinfo->count = 1;
273
return 0;
274
}
275
276
static int snd_ak4117_spdif_mask_get(struct snd_kcontrol *kcontrol,
277
struct snd_ctl_elem_value *ucontrol)
278
{
279
memset(ucontrol->value.iec958.status, 0xff, AK4117_REG_RXCSB_SIZE);
280
return 0;
281
}
282
283
static int snd_ak4117_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
284
{
285
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
286
uinfo->value.integer.min = 0;
287
uinfo->value.integer.max = 0xffff;
288
uinfo->count = 4;
289
return 0;
290
}
291
292
static int snd_ak4117_spdif_pget(struct snd_kcontrol *kcontrol,
293
struct snd_ctl_elem_value *ucontrol)
294
{
295
struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
296
unsigned short tmp;
297
298
ucontrol->value.integer.value[0] = 0xf8f2;
299
ucontrol->value.integer.value[1] = 0x4e1f;
300
tmp = reg_read(chip, AK4117_REG_Pc0) | (reg_read(chip, AK4117_REG_Pc1) << 8);
301
ucontrol->value.integer.value[2] = tmp;
302
tmp = reg_read(chip, AK4117_REG_Pd0) | (reg_read(chip, AK4117_REG_Pd1) << 8);
303
ucontrol->value.integer.value[3] = tmp;
304
return 0;
305
}
306
307
static int snd_ak4117_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
308
{
309
uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
310
uinfo->count = AK4117_REG_QSUB_SIZE;
311
return 0;
312
}
313
314
static int snd_ak4117_spdif_qget(struct snd_kcontrol *kcontrol,
315
struct snd_ctl_elem_value *ucontrol)
316
{
317
struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
318
unsigned i;
319
320
for (i = 0; i < AK4117_REG_QSUB_SIZE; i++)
321
ucontrol->value.bytes.data[i] = reg_read(chip, AK4117_REG_QSUB_ADDR + i);
322
return 0;
323
}
324
325
/* Don't forget to change AK4117_CONTROLS define!!! */
326
static struct snd_kcontrol_new snd_ak4117_iec958_controls[] = {
327
{
328
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
329
.name = "IEC958 Parity Errors",
330
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
331
.info = snd_ak4117_in_error_info,
332
.get = snd_ak4117_in_error_get,
333
.private_value = offsetof(struct ak4117, parity_errors),
334
},
335
{
336
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
337
.name = "IEC958 V-Bit Errors",
338
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
339
.info = snd_ak4117_in_error_info,
340
.get = snd_ak4117_in_error_get,
341
.private_value = offsetof(struct ak4117, v_bit_errors),
342
},
343
{
344
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
345
.name = "IEC958 C-CRC Errors",
346
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
347
.info = snd_ak4117_in_error_info,
348
.get = snd_ak4117_in_error_get,
349
.private_value = offsetof(struct ak4117, ccrc_errors),
350
},
351
{
352
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
353
.name = "IEC958 Q-CRC Errors",
354
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
355
.info = snd_ak4117_in_error_info,
356
.get = snd_ak4117_in_error_get,
357
.private_value = offsetof(struct ak4117, qcrc_errors),
358
},
359
{
360
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
361
.name = "IEC958 External Rate",
362
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
363
.info = snd_ak4117_rate_info,
364
.get = snd_ak4117_rate_get,
365
},
366
{
367
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
368
.name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
369
.access = SNDRV_CTL_ELEM_ACCESS_READ,
370
.info = snd_ak4117_spdif_mask_info,
371
.get = snd_ak4117_spdif_mask_get,
372
},
373
{
374
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
375
.name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
376
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
377
.info = snd_ak4117_spdif_info,
378
.get = snd_ak4117_spdif_get,
379
},
380
{
381
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
382
.name = "IEC958 Preample Capture Default",
383
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
384
.info = snd_ak4117_spdif_pinfo,
385
.get = snd_ak4117_spdif_pget,
386
},
387
{
388
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
389
.name = "IEC958 Q-subcode Capture Default",
390
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
391
.info = snd_ak4117_spdif_qinfo,
392
.get = snd_ak4117_spdif_qget,
393
},
394
{
395
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
396
.name = "IEC958 Audio",
397
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
398
.info = snd_ak4117_in_bit_info,
399
.get = snd_ak4117_in_bit_get,
400
.private_value = (1<<31) | (3<<8) | AK4117_REG_RCS0,
401
},
402
{
403
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
404
.name = "IEC958 Non-PCM Bitstream",
405
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
406
.info = snd_ak4117_in_bit_info,
407
.get = snd_ak4117_in_bit_get,
408
.private_value = (5<<8) | AK4117_REG_RCS1,
409
},
410
{
411
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
412
.name = "IEC958 DTS Bitstream",
413
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
414
.info = snd_ak4117_in_bit_info,
415
.get = snd_ak4117_in_bit_get,
416
.private_value = (6<<8) | AK4117_REG_RCS1,
417
},
418
{
419
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
420
.name = "AK4117 Input Select",
421
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE,
422
.info = snd_ak4117_rx_info,
423
.get = snd_ak4117_rx_get,
424
.put = snd_ak4117_rx_put,
425
}
426
};
427
428
int snd_ak4117_build(struct ak4117 *ak4117, struct snd_pcm_substream *cap_substream)
429
{
430
struct snd_kcontrol *kctl;
431
unsigned int idx;
432
int err;
433
434
if (snd_BUG_ON(!cap_substream))
435
return -EINVAL;
436
ak4117->substream = cap_substream;
437
for (idx = 0; idx < AK4117_CONTROLS; idx++) {
438
kctl = snd_ctl_new1(&snd_ak4117_iec958_controls[idx], ak4117);
439
if (kctl == NULL)
440
return -ENOMEM;
441
kctl->id.device = cap_substream->pcm->device;
442
kctl->id.subdevice = cap_substream->number;
443
err = snd_ctl_add(ak4117->card, kctl);
444
if (err < 0)
445
return err;
446
ak4117->kctls[idx] = kctl;
447
}
448
return 0;
449
}
450
451
int snd_ak4117_external_rate(struct ak4117 *ak4117)
452
{
453
unsigned char rcs1;
454
455
rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
456
return external_rate(rcs1);
457
}
458
459
int snd_ak4117_check_rate_and_errors(struct ak4117 *ak4117, unsigned int flags)
460
{
461
struct snd_pcm_runtime *runtime = ak4117->substream ? ak4117->substream->runtime : NULL;
462
unsigned long _flags;
463
int res = 0;
464
unsigned char rcs0, rcs1, rcs2;
465
unsigned char c0, c1;
466
467
rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
468
if (flags & AK4117_CHECK_NO_STAT)
469
goto __rate;
470
rcs0 = reg_read(ak4117, AK4117_REG_RCS0);
471
rcs2 = reg_read(ak4117, AK4117_REG_RCS2);
472
// printk(KERN_DEBUG "AK IRQ: rcs0 = 0x%x, rcs1 = 0x%x, rcs2 = 0x%x\n", rcs0, rcs1, rcs2);
473
spin_lock_irqsave(&ak4117->lock, _flags);
474
if (rcs0 & AK4117_PAR)
475
ak4117->parity_errors++;
476
if (rcs0 & AK4117_V)
477
ak4117->v_bit_errors++;
478
if (rcs2 & AK4117_CCRC)
479
ak4117->ccrc_errors++;
480
if (rcs2 & AK4117_QCRC)
481
ak4117->qcrc_errors++;
482
c0 = (ak4117->rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK)) ^
483
(rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK));
484
c1 = (ak4117->rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f)) ^
485
(rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f));
486
ak4117->rcs0 = rcs0 & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
487
ak4117->rcs1 = rcs1;
488
ak4117->rcs2 = rcs2;
489
spin_unlock_irqrestore(&ak4117->lock, _flags);
490
491
if (rcs0 & AK4117_PAR)
492
snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[0]->id);
493
if (rcs0 & AK4117_V)
494
snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[1]->id);
495
if (rcs2 & AK4117_CCRC)
496
snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[2]->id);
497
if (rcs2 & AK4117_QCRC)
498
snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[3]->id);
499
500
/* rate change */
501
if (c1 & 0x0f)
502
snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[4]->id);
503
504
if ((c1 & AK4117_PEM) | (c0 & AK4117_CINT))
505
snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[6]->id);
506
if (c0 & AK4117_QINT)
507
snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[8]->id);
508
509
if (c0 & AK4117_AUDION)
510
snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[9]->id);
511
if (c1 & AK4117_NPCM)
512
snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[10]->id);
513
if (c1 & AK4117_DTSCD)
514
snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[11]->id);
515
516
if (ak4117->change_callback && (c0 | c1) != 0)
517
ak4117->change_callback(ak4117, c0, c1);
518
519
__rate:
520
/* compare rate */
521
res = external_rate(rcs1);
522
if (!(flags & AK4117_CHECK_NO_RATE) && runtime && runtime->rate != res) {
523
snd_pcm_stream_lock_irqsave(ak4117->substream, _flags);
524
if (snd_pcm_running(ak4117->substream)) {
525
// printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res);
526
snd_pcm_stop(ak4117->substream, SNDRV_PCM_STATE_DRAINING);
527
wake_up(&runtime->sleep);
528
res = 1;
529
}
530
snd_pcm_stream_unlock_irqrestore(ak4117->substream, _flags);
531
}
532
return res;
533
}
534
535
static void snd_ak4117_timer(unsigned long data)
536
{
537
struct ak4117 *chip = (struct ak4117 *)data;
538
539
if (chip->init)
540
return;
541
snd_ak4117_check_rate_and_errors(chip, 0);
542
chip->timer.expires = 1 + jiffies;
543
add_timer(&chip->timer);
544
}
545
546
EXPORT_SYMBOL(snd_ak4117_create);
547
EXPORT_SYMBOL(snd_ak4117_reg_write);
548
EXPORT_SYMBOL(snd_ak4117_reinit);
549
EXPORT_SYMBOL(snd_ak4117_build);
550
EXPORT_SYMBOL(snd_ak4117_external_rate);
551
EXPORT_SYMBOL(snd_ak4117_check_rate_and_errors);
552
553