Path: blob/master/sound/pci/cs46xx/dsp_spos_scb_lib.c
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/*1*2* This program is free software; you can redistribute it and/or modify3* it under the terms of the GNU General Public License as published by4* the Free Software Foundation; either version 2 of the License, or5* (at your option) any later version.6*7* This program is distributed in the hope that it will be useful,8* but WITHOUT ANY WARRANTY; without even the implied warranty of9* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the10* GNU General Public License for more details.11*12* You should have received a copy of the GNU General Public License13* along with this program; if not, write to the Free Software14* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA15*16*/1718/*19* 2002-07 Benny Sjostrand [email protected]20*/212223#include <asm/io.h>24#include <linux/delay.h>25#include <linux/pm.h>26#include <linux/init.h>27#include <linux/slab.h>28#include <linux/mutex.h>2930#include <sound/core.h>31#include <sound/control.h>32#include <sound/info.h>33#include <sound/cs46xx.h>3435#include "cs46xx_lib.h"36#include "dsp_spos.h"3738struct proc_scb_info {39struct dsp_scb_descriptor * scb_desc;40struct snd_cs46xx *chip;41};4243static void remove_symbol (struct snd_cs46xx * chip, struct dsp_symbol_entry * symbol)44{45struct dsp_spos_instance * ins = chip->dsp_spos_instance;46int symbol_index = (int)(symbol - ins->symbol_table.symbols);4748if (snd_BUG_ON(ins->symbol_table.nsymbols <= 0))49return;50if (snd_BUG_ON(symbol_index < 0 ||51symbol_index >= ins->symbol_table.nsymbols))52return;5354ins->symbol_table.symbols[symbol_index].deleted = 1;5556if (symbol_index < ins->symbol_table.highest_frag_index) {57ins->symbol_table.highest_frag_index = symbol_index;58}5960if (symbol_index == ins->symbol_table.nsymbols - 1)61ins->symbol_table.nsymbols --;6263if (ins->symbol_table.highest_frag_index > ins->symbol_table.nsymbols) {64ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols;65}6667}6869#ifdef CONFIG_PROC_FS70static void cs46xx_dsp_proc_scb_info_read (struct snd_info_entry *entry,71struct snd_info_buffer *buffer)72{73struct proc_scb_info * scb_info = entry->private_data;74struct dsp_scb_descriptor * scb = scb_info->scb_desc;75struct dsp_spos_instance * ins;76struct snd_cs46xx *chip = scb_info->chip;77int j,col;78void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;7980ins = chip->dsp_spos_instance;8182mutex_lock(&chip->spos_mutex);83snd_iprintf(buffer,"%04x %s:\n",scb->address,scb->scb_name);8485for (col = 0,j = 0;j < 0x10; j++,col++) {86if (col == 4) {87snd_iprintf(buffer,"\n");88col = 0;89}90snd_iprintf(buffer,"%08x ",readl(dst + (scb->address + j) * sizeof(u32)));91}9293snd_iprintf(buffer,"\n");9495if (scb->parent_scb_ptr != NULL) {96snd_iprintf(buffer,"parent [%s:%04x] ",97scb->parent_scb_ptr->scb_name,98scb->parent_scb_ptr->address);99} else snd_iprintf(buffer,"parent [none] ");100101snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x] task_entry [%s:%04x]\n",102scb->sub_list_ptr->scb_name,103scb->sub_list_ptr->address,104scb->next_scb_ptr->scb_name,105scb->next_scb_ptr->address,106scb->task_entry->symbol_name,107scb->task_entry->address);108109snd_iprintf(buffer,"index [%d] ref_count [%d]\n",scb->index,scb->ref_count);110mutex_unlock(&chip->spos_mutex);111}112#endif113114static void _dsp_unlink_scb (struct snd_cs46xx *chip, struct dsp_scb_descriptor * scb)115{116struct dsp_spos_instance * ins = chip->dsp_spos_instance;117118if ( scb->parent_scb_ptr ) {119/* unlink parent SCB */120if (snd_BUG_ON(scb->parent_scb_ptr->sub_list_ptr != scb &&121scb->parent_scb_ptr->next_scb_ptr != scb))122return;123124if (scb->parent_scb_ptr->sub_list_ptr == scb) {125126if (scb->next_scb_ptr == ins->the_null_scb) {127/* last and only node in parent sublist */128scb->parent_scb_ptr->sub_list_ptr = scb->sub_list_ptr;129130if (scb->sub_list_ptr != ins->the_null_scb) {131scb->sub_list_ptr->parent_scb_ptr = scb->parent_scb_ptr;132}133scb->sub_list_ptr = ins->the_null_scb;134} else {135/* first node in parent sublist */136scb->parent_scb_ptr->sub_list_ptr = scb->next_scb_ptr;137138if (scb->next_scb_ptr != ins->the_null_scb) {139/* update next node parent ptr. */140scb->next_scb_ptr->parent_scb_ptr = scb->parent_scb_ptr;141}142scb->next_scb_ptr = ins->the_null_scb;143}144} else {145scb->parent_scb_ptr->next_scb_ptr = scb->next_scb_ptr;146147if (scb->next_scb_ptr != ins->the_null_scb) {148/* update next node parent ptr. */149scb->next_scb_ptr->parent_scb_ptr = scb->parent_scb_ptr;150}151scb->next_scb_ptr = ins->the_null_scb;152}153154/* update parent first entry in DSP RAM */155cs46xx_dsp_spos_update_scb(chip,scb->parent_scb_ptr);156157/* then update entry in DSP RAM */158cs46xx_dsp_spos_update_scb(chip,scb);159160scb->parent_scb_ptr = NULL;161}162}163164static void _dsp_clear_sample_buffer (struct snd_cs46xx *chip, u32 sample_buffer_addr,165int dword_count)166{167void __iomem *dst = chip->region.idx[2].remap_addr + sample_buffer_addr;168int i;169170for (i = 0; i < dword_count ; ++i ) {171writel(0, dst);172dst += 4;173}174}175176void cs46xx_dsp_remove_scb (struct snd_cs46xx *chip, struct dsp_scb_descriptor * scb)177{178struct dsp_spos_instance * ins = chip->dsp_spos_instance;179unsigned long flags;180181/* check integrety */182if (snd_BUG_ON(scb->index < 0 ||183scb->index >= ins->nscb ||184(ins->scbs + scb->index) != scb))185return;186187#if 0188/* can't remove a SCB with childs before189removing childs first */190if (snd_BUG_ON(scb->sub_list_ptr != ins->the_null_scb ||191scb->next_scb_ptr != ins->the_null_scb))192goto _end;193#endif194195spin_lock_irqsave(&chip->reg_lock, flags);196_dsp_unlink_scb (chip,scb);197spin_unlock_irqrestore(&chip->reg_lock, flags);198199cs46xx_dsp_proc_free_scb_desc(scb);200if (snd_BUG_ON(!scb->scb_symbol))201return;202remove_symbol (chip,scb->scb_symbol);203204ins->scbs[scb->index].deleted = 1;205#ifdef CONFIG_PM206kfree(ins->scbs[scb->index].data);207ins->scbs[scb->index].data = NULL;208#endif209210if (scb->index < ins->scb_highest_frag_index)211ins->scb_highest_frag_index = scb->index;212213if (scb->index == ins->nscb - 1) {214ins->nscb --;215}216217if (ins->scb_highest_frag_index > ins->nscb) {218ins->scb_highest_frag_index = ins->nscb;219}220221#if 0222/* !!!! THIS IS A PIECE OF SHIT MADE BY ME !!! */223for(i = scb->index + 1;i < ins->nscb; ++i) {224ins->scbs[i - 1].index = i - 1;225}226#endif227}228229230#ifdef CONFIG_PROC_FS231void cs46xx_dsp_proc_free_scb_desc (struct dsp_scb_descriptor * scb)232{233if (scb->proc_info) {234struct proc_scb_info * scb_info = scb->proc_info->private_data;235236snd_printdd("cs46xx_dsp_proc_free_scb_desc: freeing %s\n",scb->scb_name);237238snd_info_free_entry(scb->proc_info);239scb->proc_info = NULL;240241kfree (scb_info);242}243}244245void cs46xx_dsp_proc_register_scb_desc (struct snd_cs46xx *chip,246struct dsp_scb_descriptor * scb)247{248struct dsp_spos_instance * ins = chip->dsp_spos_instance;249struct snd_info_entry * entry;250struct proc_scb_info * scb_info;251252/* register to proc */253if (ins->snd_card != NULL && ins->proc_dsp_dir != NULL &&254scb->proc_info == NULL) {255256if ((entry = snd_info_create_card_entry(ins->snd_card, scb->scb_name,257ins->proc_dsp_dir)) != NULL) {258scb_info = kmalloc(sizeof(struct proc_scb_info), GFP_KERNEL);259if (!scb_info) {260snd_info_free_entry(entry);261entry = NULL;262goto out;263}264265scb_info->chip = chip;266scb_info->scb_desc = scb;267268entry->content = SNDRV_INFO_CONTENT_TEXT;269entry->private_data = scb_info;270entry->mode = S_IFREG | S_IRUGO | S_IWUSR;271272entry->c.text.read = cs46xx_dsp_proc_scb_info_read;273274if (snd_info_register(entry) < 0) {275snd_info_free_entry(entry);276kfree (scb_info);277entry = NULL;278}279}280out:281scb->proc_info = entry;282}283}284#endif /* CONFIG_PROC_FS */285286static struct dsp_scb_descriptor *287_dsp_create_generic_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest,288struct dsp_symbol_entry * task_entry,289struct dsp_scb_descriptor * parent_scb,290int scb_child_type)291{292struct dsp_spos_instance * ins = chip->dsp_spos_instance;293struct dsp_scb_descriptor * scb;294295unsigned long flags;296297if (snd_BUG_ON(!ins->the_null_scb))298return NULL;299300/* fill the data that will be wroten to DSP */301scb_data[SCBsubListPtr] =302(ins->the_null_scb->address << 0x10) | ins->the_null_scb->address;303304scb_data[SCBfuncEntryPtr] &= 0xFFFF0000;305scb_data[SCBfuncEntryPtr] |= task_entry->address;306307snd_printdd("dsp_spos: creating SCB <%s>\n",name);308309scb = cs46xx_dsp_create_scb(chip,name,scb_data,dest);310311312scb->sub_list_ptr = ins->the_null_scb;313scb->next_scb_ptr = ins->the_null_scb;314315scb->parent_scb_ptr = parent_scb;316scb->task_entry = task_entry;317318319/* update parent SCB */320if (scb->parent_scb_ptr) {321#if 0322printk ("scb->parent_scb_ptr = %s\n",scb->parent_scb_ptr->scb_name);323printk ("scb->parent_scb_ptr->next_scb_ptr = %s\n",scb->parent_scb_ptr->next_scb_ptr->scb_name);324printk ("scb->parent_scb_ptr->sub_list_ptr = %s\n",scb->parent_scb_ptr->sub_list_ptr->scb_name);325#endif326/* link to parent SCB */327if (scb_child_type == SCB_ON_PARENT_NEXT_SCB) {328if (snd_BUG_ON(scb->parent_scb_ptr->next_scb_ptr !=329ins->the_null_scb))330return NULL;331332scb->parent_scb_ptr->next_scb_ptr = scb;333334} else if (scb_child_type == SCB_ON_PARENT_SUBLIST_SCB) {335if (snd_BUG_ON(scb->parent_scb_ptr->sub_list_ptr !=336ins->the_null_scb))337return NULL;338339scb->parent_scb_ptr->sub_list_ptr = scb;340} else {341snd_BUG();342}343344spin_lock_irqsave(&chip->reg_lock, flags);345346/* update entry in DSP RAM */347cs46xx_dsp_spos_update_scb(chip,scb->parent_scb_ptr);348349spin_unlock_irqrestore(&chip->reg_lock, flags);350}351352353cs46xx_dsp_proc_register_scb_desc (chip,scb);354355return scb;356}357358static struct dsp_scb_descriptor *359cs46xx_dsp_create_generic_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data,360u32 dest, char * task_entry_name,361struct dsp_scb_descriptor * parent_scb,362int scb_child_type)363{364struct dsp_symbol_entry * task_entry;365366task_entry = cs46xx_dsp_lookup_symbol (chip,task_entry_name,367SYMBOL_CODE);368369if (task_entry == NULL) {370snd_printk (KERN_ERR "dsp_spos: symbol %s not found\n",task_entry_name);371return NULL;372}373374return _dsp_create_generic_scb (chip,name,scb_data,dest,task_entry,375parent_scb,scb_child_type);376}377378struct dsp_scb_descriptor *379cs46xx_dsp_create_timing_master_scb (struct snd_cs46xx *chip)380{381struct dsp_scb_descriptor * scb;382383struct dsp_timing_master_scb timing_master_scb = {384{ 0,3850,3860,3870388},389{ 0,3900,3910,3920,3930394},3950,0,3960,NULL_SCB_ADDR,3970,0, /* extraSampleAccum:TMreserved */3980,0, /* codecFIFOptr:codecFIFOsyncd */3990x0001,0x8000, /* fracSampAccumQm1:TMfrmsLeftInGroup */4000x0001,0x0000, /* fracSampCorrectionQm1:TMfrmGroupLength */4010x00060000 /* nSampPerFrmQ15 */402};403404scb = cs46xx_dsp_create_generic_scb(chip,"TimingMasterSCBInst",(u32 *)&timing_master_scb,405TIMINGMASTER_SCB_ADDR,406"TIMINGMASTER",NULL,SCB_NO_PARENT);407408return scb;409}410411412struct dsp_scb_descriptor *413cs46xx_dsp_create_codec_out_scb(struct snd_cs46xx * chip, char * codec_name,414u16 channel_disp, u16 fifo_addr, u16 child_scb_addr,415u32 dest, struct dsp_scb_descriptor * parent_scb,416int scb_child_type)417{418struct dsp_scb_descriptor * scb;419420struct dsp_codec_output_scb codec_out_scb = {421{ 0,4220,4230,4240425},426{4270,4280,4290,4300,4310432},4330,0,4340,NULL_SCB_ADDR,4350, /* COstrmRsConfig */4360, /* COstrmBufPtr */437channel_disp,fifo_addr, /* leftChanBaseIOaddr:rightChanIOdisp */4380x0000,0x0080, /* (!AC97!) COexpVolChangeRate:COscaleShiftCount */4390,child_scb_addr /* COreserved - need child scb to work with rom code */440};441442443scb = cs46xx_dsp_create_generic_scb(chip,codec_name,(u32 *)&codec_out_scb,444dest,"S16_CODECOUTPUTTASK",parent_scb,445scb_child_type);446447return scb;448}449450struct dsp_scb_descriptor *451cs46xx_dsp_create_codec_in_scb(struct snd_cs46xx * chip, char * codec_name,452u16 channel_disp, u16 fifo_addr, u16 sample_buffer_addr,453u32 dest, struct dsp_scb_descriptor * parent_scb,454int scb_child_type)455{456457struct dsp_scb_descriptor * scb;458struct dsp_codec_input_scb codec_input_scb = {459{ 0,4600,4610,4620463},464{4650,4660,4670,4680,4690470},471472#if 0 /* cs4620 */473SyncIOSCB,NULL_SCB_ADDR474#else4750 , 0,476#endif4770,0,478479RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64, /* strmRsConfig */480sample_buffer_addr << 0x10, /* strmBufPtr; defined as a dword ptr, used as a byte ptr */481channel_disp,fifo_addr, /* (!AC97!) leftChanBaseINaddr=AC97primary482link input slot 3 :rightChanINdisp=""slot 4 */4830x0000,0x0000, /* (!AC97!) ????:scaleShiftCount; no shift needed484because AC97 is already 20 bits */4850x80008000 /* ??clw cwcgame.scb has 0 */486};487488scb = cs46xx_dsp_create_generic_scb(chip,codec_name,(u32 *)&codec_input_scb,489dest,"S16_CODECINPUTTASK",parent_scb,490scb_child_type);491return scb;492}493494495static struct dsp_scb_descriptor *496cs46xx_dsp_create_pcm_reader_scb(struct snd_cs46xx * chip, char * scb_name,497u16 sample_buffer_addr, u32 dest,498int virtual_channel, u32 playback_hw_addr,499struct dsp_scb_descriptor * parent_scb,500int scb_child_type)501{502struct dsp_spos_instance * ins = chip->dsp_spos_instance;503struct dsp_scb_descriptor * scb;504505struct dsp_generic_scb pcm_reader_scb = {506507/*508Play DMA Task xfers data from host buffer to SP buffer509init/runtime variables:510PlayAC: Play Audio Data Conversion - SCB loc: 2nd dword, mask: 0x0000F000L511DATA_FMT_16BIT_ST_LTLEND(0x00000000L) from 16-bit stereo, little-endian512DATA_FMT_8_BIT_ST_SIGNED(0x00001000L) from 8-bit stereo, signed513DATA_FMT_16BIT_MN_LTLEND(0x00002000L) from 16-bit mono, little-endian514DATA_FMT_8_BIT_MN_SIGNED(0x00003000L) from 8-bit mono, signed515DATA_FMT_16BIT_ST_BIGEND(0x00004000L) from 16-bit stereo, big-endian516DATA_FMT_16BIT_MN_BIGEND(0x00006000L) from 16-bit mono, big-endian517DATA_FMT_8_BIT_ST_UNSIGNED(0x00009000L) from 8-bit stereo, unsigned518DATA_FMT_8_BIT_MN_UNSIGNED(0x0000b000L) from 8-bit mono, unsigned519? Other combinations possible from:520DMA_RQ_C2_AUDIO_CONVERT_MASK 0x0000F000L521DMA_RQ_C2_AC_NONE 0x00000000L522DMA_RQ_C2_AC_8_TO_16_BIT 0x00001000L523DMA_RQ_C2_AC_MONO_TO_STEREO 0x00002000L524DMA_RQ_C2_AC_ENDIAN_CONVERT 0x00004000L525DMA_RQ_C2_AC_SIGNED_CONVERT 0x00008000L526527HostBuffAddr: Host Buffer Physical Byte Address - SCB loc:3rd dword, Mask: 0xFFFFFFFFL528aligned to dword boundary529*/530/* Basic (non scatter/gather) DMA requestor (4 ints) */531{ DMA_RQ_C1_SOURCE_ON_HOST + /* source buffer is on the host */532DMA_RQ_C1_SOURCE_MOD1024 + /* source buffer is 1024 dwords (4096 bytes) */533DMA_RQ_C1_DEST_MOD32 + /* dest buffer(PCMreaderBuf) is 32 dwords*/534DMA_RQ_C1_WRITEBACK_SRC_FLAG + /* ?? */535DMA_RQ_C1_WRITEBACK_DEST_FLAG + /* ?? */53615, /* DwordCount-1: picked 16 for DwordCount because Jim */537/* Barnette said that is what we should use since */538/* we are not running in optimized mode? */539DMA_RQ_C2_AC_NONE +540DMA_RQ_C2_SIGNAL_SOURCE_PINGPONG + /* set play interrupt (bit0) in HISR when source */541/* buffer (on host) crosses half-way point */542virtual_channel, /* Play DMA channel arbitrarily set to 0 */543playback_hw_addr, /* HostBuffAddr (source) */544DMA_RQ_SD_SP_SAMPLE_ADDR + /* destination buffer is in SP Sample Memory */545sample_buffer_addr /* SP Buffer Address (destination) */546},547/* Scatter/gather DMA requestor extension (5 ints) */548{5490,5500,5510,5520,5530554},555/* Sublist pointer & next stream control block (SCB) link. */556NULL_SCB_ADDR,NULL_SCB_ADDR,557/* Pointer to this tasks parameter block & stream function pointer */5580,NULL_SCB_ADDR,559/* rsConfig register for stream buffer (rsDMA reg. is loaded from basicReq.daw */560/* for incoming streams, or basicReq.saw, for outgoing streams) */561RSCONFIG_DMA_ENABLE + /* enable DMA */562(19 << RSCONFIG_MAX_DMA_SIZE_SHIFT) + /* MAX_DMA_SIZE picked to be 19 since SPUD */563/* uses it for some reason */564((dest >> 4) << RSCONFIG_STREAM_NUM_SHIFT) + /* stream number = SCBaddr/16 */565RSCONFIG_SAMPLE_16STEREO +566RSCONFIG_MODULO_32, /* dest buffer(PCMreaderBuf) is 32 dwords (256 bytes) */567/* Stream sample pointer & MAC-unit mode for this stream */568(sample_buffer_addr << 0x10),569/* Fractional increment per output sample in the input sample buffer */5700,571{572/* Standard stereo volume control573default muted */5740xffff,0xffff,5750xffff,0xffff576}577};578579if (ins->null_algorithm == NULL) {580ins->null_algorithm = cs46xx_dsp_lookup_symbol (chip,"NULLALGORITHM",581SYMBOL_CODE);582583if (ins->null_algorithm == NULL) {584snd_printk (KERN_ERR "dsp_spos: symbol NULLALGORITHM not found\n");585return NULL;586}587}588589scb = _dsp_create_generic_scb(chip,scb_name,(u32 *)&pcm_reader_scb,590dest,ins->null_algorithm,parent_scb,591scb_child_type);592593return scb;594}595596#define GOF_PER_SEC 200597598struct dsp_scb_descriptor *599cs46xx_dsp_create_src_task_scb(struct snd_cs46xx * chip, char * scb_name,600int rate,601u16 src_buffer_addr,602u16 src_delay_buffer_addr, u32 dest,603struct dsp_scb_descriptor * parent_scb,604int scb_child_type,605int pass_through)606{607608struct dsp_spos_instance * ins = chip->dsp_spos_instance;609struct dsp_scb_descriptor * scb;610unsigned int tmp1, tmp2;611unsigned int phiIncr;612unsigned int correctionPerGOF, correctionPerSec;613614snd_printdd( "dsp_spos: setting %s rate to %u\n",scb_name,rate);615616/*617* Compute the values used to drive the actual sample rate conversion.618* The following formulas are being computed, using inline assembly619* since we need to use 64 bit arithmetic to compute the values:620*621* phiIncr = floor((Fs,in * 2^26) / Fs,out)622* correctionPerGOF = floor((Fs,in * 2^26 - Fs,out * phiIncr) /623* GOF_PER_SEC)624* ulCorrectionPerSec = Fs,in * 2^26 - Fs,out * phiIncr -M625* GOF_PER_SEC * correctionPerGOF626*627* i.e.628*629* phiIncr:other = dividend:remainder((Fs,in * 2^26) / Fs,out)630* correctionPerGOF:correctionPerSec =631* dividend:remainder(ulOther / GOF_PER_SEC)632*/633tmp1 = rate << 16;634phiIncr = tmp1 / 48000;635tmp1 -= phiIncr * 48000;636tmp1 <<= 10;637phiIncr <<= 10;638tmp2 = tmp1 / 48000;639phiIncr += tmp2;640tmp1 -= tmp2 * 48000;641correctionPerGOF = tmp1 / GOF_PER_SEC;642tmp1 -= correctionPerGOF * GOF_PER_SEC;643correctionPerSec = tmp1;644645{646struct dsp_src_task_scb src_task_scb = {6470x0028,0x00c8,6480x5555,0x0000,6490x0000,0x0000,650src_buffer_addr,1,651correctionPerGOF,correctionPerSec,652RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_32,6530x0000,src_delay_buffer_addr,6540x0,6550x080,(src_delay_buffer_addr + (24 * 4)),6560,0, /* next_scb, sub_list_ptr */6570,0, /* entry, this_spb */658RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_8,659src_buffer_addr << 0x10,660phiIncr,661{6620xffff - ins->dac_volume_right,0xffff - ins->dac_volume_left,6630xffff - ins->dac_volume_right,0xffff - ins->dac_volume_left664}665};666667if (ins->s16_up == NULL) {668ins->s16_up = cs46xx_dsp_lookup_symbol (chip,"S16_UPSRC",669SYMBOL_CODE);670671if (ins->s16_up == NULL) {672snd_printk (KERN_ERR "dsp_spos: symbol S16_UPSRC not found\n");673return NULL;674}675}676677/* clear buffers */678_dsp_clear_sample_buffer (chip,src_buffer_addr,8);679_dsp_clear_sample_buffer (chip,src_delay_buffer_addr,32);680681if (pass_through) {682/* wont work with any other rate than683the native DSP rate */684snd_BUG_ON(rate != 48000);685686scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&src_task_scb,687dest,"DMAREADER",parent_scb,688scb_child_type);689} else {690scb = _dsp_create_generic_scb(chip,scb_name,(u32 *)&src_task_scb,691dest,ins->s16_up,parent_scb,692scb_child_type);693}694695696}697698return scb;699}700701#if 0 /* not used */702struct dsp_scb_descriptor *703cs46xx_dsp_create_filter_scb(struct snd_cs46xx * chip, char * scb_name,704u16 buffer_addr, u32 dest,705struct dsp_scb_descriptor * parent_scb,706int scb_child_type) {707struct dsp_scb_descriptor * scb;708709struct dsp_filter_scb filter_scb = {710.a0_right = 0x41a9,711.a0_left = 0x41a9,712.a1_right = 0xb8e4,713.a1_left = 0xb8e4,714.a2_right = 0x3e55,715.a2_left = 0x3e55,716717.filter_unused3 = 0x0000,718.filter_unused2 = 0x0000,719720.output_buf_ptr = buffer_addr,721.init = 0x000,722723.prev_sample_output1 = 0x00000000,724.prev_sample_output2 = 0x00000000,725726.prev_sample_input1 = 0x00000000,727.prev_sample_input2 = 0x00000000,728729.next_scb_ptr = 0x0000,730.sub_list_ptr = 0x0000,731732.entry_point = 0x0000,733.spb_ptr = 0x0000,734735.b0_right = 0x0e38,736.b0_left = 0x0e38,737.b1_right = 0x1c71,738.b1_left = 0x1c71,739.b2_right = 0x0e38,740.b2_left = 0x0e38,741};742743744scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&filter_scb,745dest,"FILTERTASK",parent_scb,746scb_child_type);747748return scb;749}750#endif /* not used */751752struct dsp_scb_descriptor *753cs46xx_dsp_create_mix_only_scb(struct snd_cs46xx * chip, char * scb_name,754u16 mix_buffer_addr, u32 dest,755struct dsp_scb_descriptor * parent_scb,756int scb_child_type)757{758struct dsp_scb_descriptor * scb;759760struct dsp_mix_only_scb master_mix_scb = {761/* 0 */ { 0,762/* 1 */ 0,763/* 2 */ mix_buffer_addr,764/* 3 */ 0765/* */ },766{767/* 4 */ 0,768/* 5 */ 0,769/* 6 */ 0,770/* 7 */ 0,771/* 8 */ 0x00000080772},773/* 9 */ 0,0,774/* A */ 0,0,775/* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_32,776/* C */ (mix_buffer_addr + (16 * 4)) << 0x10,777/* D */ 0,778{779/* E */ 0x8000,0x8000,780/* F */ 0x8000,0x8000781}782};783784785scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&master_mix_scb,786dest,"S16_MIX",parent_scb,787scb_child_type);788return scb;789}790791792struct dsp_scb_descriptor *793cs46xx_dsp_create_mix_to_ostream_scb(struct snd_cs46xx * chip, char * scb_name,794u16 mix_buffer_addr, u16 writeback_spb, u32 dest,795struct dsp_scb_descriptor * parent_scb,796int scb_child_type)797{798struct dsp_scb_descriptor * scb;799800struct dsp_mix2_ostream_scb mix2_ostream_scb = {801/* Basic (non scatter/gather) DMA requestor (4 ints) */802{803DMA_RQ_C1_SOURCE_MOD64 +804DMA_RQ_C1_DEST_ON_HOST +805DMA_RQ_C1_DEST_MOD1024 +806DMA_RQ_C1_WRITEBACK_SRC_FLAG +807DMA_RQ_C1_WRITEBACK_DEST_FLAG +80815,809810DMA_RQ_C2_AC_NONE +811DMA_RQ_C2_SIGNAL_DEST_PINGPONG +812813CS46XX_DSP_CAPTURE_CHANNEL,814DMA_RQ_SD_SP_SAMPLE_ADDR +815mix_buffer_addr,8160x0817},818819{ 0, 0, 0, 0, 0, },8200,0,8210,writeback_spb,822823RSCONFIG_DMA_ENABLE +824(19 << RSCONFIG_MAX_DMA_SIZE_SHIFT) +825826((dest >> 4) << RSCONFIG_STREAM_NUM_SHIFT) +827RSCONFIG_DMA_TO_HOST +828RSCONFIG_SAMPLE_16STEREO +829RSCONFIG_MODULO_64,830(mix_buffer_addr + (32 * 4)) << 0x10,8311,0,8320x0001,0x0080,8330xFFFF,0834};835836837scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&mix2_ostream_scb,838839dest,"S16_MIX_TO_OSTREAM",parent_scb,840scb_child_type);841842return scb;843}844845846struct dsp_scb_descriptor *847cs46xx_dsp_create_vari_decimate_scb(struct snd_cs46xx * chip,char * scb_name,848u16 vari_buffer_addr0,849u16 vari_buffer_addr1,850u32 dest,851struct dsp_scb_descriptor * parent_scb,852int scb_child_type)853{854855struct dsp_scb_descriptor * scb;856857struct dsp_vari_decimate_scb vari_decimate_scb = {8580x0028,0x00c8,8590x5555,0x0000,8600x0000,0x0000,861vari_buffer_addr0,vari_buffer_addr1,8628630x0028,0x00c8,864RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_256,8658660xFF800000,8670,8680x0080,vari_buffer_addr1 + (25 * 4),8698700,0,8710,0,872873RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_8,874vari_buffer_addr0 << 0x10,8750x04000000,876{8770x8000,0x8000,8780xFFFF,0xFFFF879}880};881882scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&vari_decimate_scb,883dest,"VARIDECIMATE",parent_scb,884scb_child_type);885886return scb;887}888889890static struct dsp_scb_descriptor *891cs46xx_dsp_create_pcm_serial_input_scb(struct snd_cs46xx * chip, char * scb_name, u32 dest,892struct dsp_scb_descriptor * input_scb,893struct dsp_scb_descriptor * parent_scb,894int scb_child_type)895{896897struct dsp_scb_descriptor * scb;898899900struct dsp_pcm_serial_input_scb pcm_serial_input_scb = {901{ 0,9020,9030,9040905},906{9070,9080,9090,9100,9110912},9139140,0,9150,0,916917RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_16,9180,919/* 0xD */ 0,input_scb->address,920{921/* 0xE */ 0x8000,0x8000,922/* 0xF */ 0x8000,0x8000923}924};925926scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&pcm_serial_input_scb,927dest,"PCMSERIALINPUTTASK",parent_scb,928scb_child_type);929return scb;930}931932933static struct dsp_scb_descriptor *934cs46xx_dsp_create_asynch_fg_tx_scb(struct snd_cs46xx * chip, char * scb_name, u32 dest,935u16 hfg_scb_address,936u16 asynch_buffer_address,937struct dsp_scb_descriptor * parent_scb,938int scb_child_type)939{940941struct dsp_scb_descriptor * scb;942943struct dsp_asynch_fg_tx_scb asynch_fg_tx_scb = {9440xfc00,0x03ff, /* Prototype sample buffer size of 256 dwords */9450x0058,0x0028, /* Min Delta 7 dwords == 28 bytes */946/* : Max delta 25 dwords == 100 bytes */9470,hfg_scb_address, /* Point to HFG task SCB */9480,0, /* Initialize current Delta and Consumer ptr adjustment count */9490, /* Initialize accumulated Phi to 0 */9500,0x2aab, /* Const 1/3 */951952{9530, /* Define the unused elements */9540,9550956},9579580,0,9590,dest + AFGTxAccumPhi,960961RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_256, /* Stereo, 256 dword */962(asynch_buffer_address) << 0x10, /* This should be automagically synchronized963to the producer pointer */964965/* There is no correct initial value, it will depend upon the detected966rate etc */9670x18000000, /* Phi increment for approx 32k operation */9680x8000,0x8000, /* Volume controls are unused at this time */9690x8000,0x8000970};971972scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&asynch_fg_tx_scb,973dest,"ASYNCHFGTXCODE",parent_scb,974scb_child_type);975976return scb;977}978979980struct dsp_scb_descriptor *981cs46xx_dsp_create_asynch_fg_rx_scb(struct snd_cs46xx * chip, char * scb_name, u32 dest,982u16 hfg_scb_address,983u16 asynch_buffer_address,984struct dsp_scb_descriptor * parent_scb,985int scb_child_type)986{987struct dsp_spos_instance * ins = chip->dsp_spos_instance;988struct dsp_scb_descriptor * scb;989990struct dsp_asynch_fg_rx_scb asynch_fg_rx_scb = {9910xfe00,0x01ff, /* Prototype sample buffer size of 128 dwords */9920x0064,0x001c, /* Min Delta 7 dwords == 28 bytes */993/* : Max delta 25 dwords == 100 bytes */9940,hfg_scb_address, /* Point to HFG task SCB */9950,0, /* Initialize current Delta and Consumer ptr adjustment count */996{9970, /* Define the unused elements */9980,9990,10000,100101002},100310040,0,10050,dest,10061007RSCONFIG_MODULO_128 |1008RSCONFIG_SAMPLE_16STEREO, /* Stereo, 128 dword */1009( (asynch_buffer_address + (16 * 4)) << 0x10), /* This should be automagically1010synchrinized to the producer pointer */10111012/* There is no correct initial value, it will depend upon the detected1013rate etc */10140x18000000,10151016/* Set IEC958 input volume */10170xffff - ins->spdif_input_volume_right,0xffff - ins->spdif_input_volume_left,10180xffff - ins->spdif_input_volume_right,0xffff - ins->spdif_input_volume_left,1019};10201021scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&asynch_fg_rx_scb,1022dest,"ASYNCHFGRXCODE",parent_scb,1023scb_child_type);10241025return scb;1026}102710281029#if 0 /* not used */1030struct dsp_scb_descriptor *1031cs46xx_dsp_create_output_snoop_scb(struct snd_cs46xx * chip, char * scb_name, u32 dest,1032u16 snoop_buffer_address,1033struct dsp_scb_descriptor * snoop_scb,1034struct dsp_scb_descriptor * parent_scb,1035int scb_child_type)1036{10371038struct dsp_scb_descriptor * scb;10391040struct dsp_output_snoop_scb output_snoop_scb = {1041{ 0, /* not used. Zero */10420,10430,10440,1045},1046{10470, /* not used. Zero */10480,10490,10500,105101052},105310540,0,10550,0,10561057RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,1058snoop_buffer_address << 0x10,10590,0,10600,10610,snoop_scb->address1062};10631064scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&output_snoop_scb,1065dest,"OUTPUTSNOOP",parent_scb,1066scb_child_type);1067return scb;1068}1069#endif /* not used */107010711072struct dsp_scb_descriptor *1073cs46xx_dsp_create_spio_write_scb(struct snd_cs46xx * chip, char * scb_name, u32 dest,1074struct dsp_scb_descriptor * parent_scb,1075int scb_child_type)1076{1077struct dsp_scb_descriptor * scb;10781079struct dsp_spio_write_scb spio_write_scb = {10800,0, /* SPIOWAddress2:SPIOWAddress1; */10810, /* SPIOWData1; */10820, /* SPIOWData2; */10830,0, /* SPIOWAddress4:SPIOWAddress3; */10840, /* SPIOWData3; */10850, /* SPIOWData4; */10860,0, /* SPIOWDataPtr:Unused1; */1087{ 0,0 }, /* Unused2[2]; */108810890,0, /* SPIOWChildPtr:SPIOWSiblingPtr; */10900,0, /* SPIOWThisPtr:SPIOWEntryPoint; */10911092{10930,10940,10950,10960,10970 /* Unused3[5]; */1098}1099};11001101scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&spio_write_scb,1102dest,"SPIOWRITE",parent_scb,1103scb_child_type);11041105return scb;1106}11071108struct dsp_scb_descriptor *1109cs46xx_dsp_create_magic_snoop_scb(struct snd_cs46xx * chip, char * scb_name, u32 dest,1110u16 snoop_buffer_address,1111struct dsp_scb_descriptor * snoop_scb,1112struct dsp_scb_descriptor * parent_scb,1113int scb_child_type)1114{1115struct dsp_scb_descriptor * scb;11161117struct dsp_magic_snoop_task magic_snoop_scb = {1118/* 0 */ 0, /* i0 */1119/* 1 */ 0, /* i1 */1120/* 2 */ snoop_buffer_address << 0x10,1121/* 3 */ 0,snoop_scb->address,1122/* 4 */ 0, /* i3 */1123/* 5 */ 0, /* i4 */1124/* 6 */ 0, /* i5 */1125/* 7 */ 0, /* i6 */1126/* 8 */ 0, /* i7 */1127/* 9 */ 0,0, /* next_scb, sub_list_ptr */1128/* A */ 0,0, /* entry_point, this_ptr */1129/* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,1130/* C */ snoop_buffer_address << 0x10,1131/* D */ 0,1132/* E */ { 0x8000,0x8000,1133/* F */ 0xffff,0xffff1134}1135};11361137scb = cs46xx_dsp_create_generic_scb(chip,scb_name,(u32 *)&magic_snoop_scb,1138dest,"MAGICSNOOPTASK",parent_scb,1139scb_child_type);11401141return scb;1142}11431144static struct dsp_scb_descriptor *1145find_next_free_scb (struct snd_cs46xx * chip, struct dsp_scb_descriptor * from)1146{1147struct dsp_spos_instance * ins = chip->dsp_spos_instance;1148struct dsp_scb_descriptor * scb = from;11491150while (scb->next_scb_ptr != ins->the_null_scb) {1151if (snd_BUG_ON(!scb->next_scb_ptr))1152return NULL;11531154scb = scb->next_scb_ptr;1155}11561157return scb;1158}11591160static u32 pcm_reader_buffer_addr[DSP_MAX_PCM_CHANNELS] = {11610x0600, /* 1 */11620x1500, /* 2 */11630x1580, /* 3 */11640x1600, /* 4 */11650x1680, /* 5 */11660x1700, /* 6 */11670x1780, /* 7 */11680x1800, /* 8 */11690x1880, /* 9 */11700x1900, /* 10 */11710x1980, /* 11 */11720x1A00, /* 12 */11730x1A80, /* 13 */11740x1B00, /* 14 */11750x1B80, /* 15 */11760x1C00, /* 16 */11770x1C80, /* 17 */11780x1D00, /* 18 */11790x1D80, /* 19 */11800x1E00, /* 20 */11810x1E80, /* 21 */11820x1F00, /* 22 */11830x1F80, /* 23 */11840x2000, /* 24 */11850x2080, /* 25 */11860x2100, /* 26 */11870x2180, /* 27 */11880x2200, /* 28 */11890x2280, /* 29 */11900x2300, /* 30 */11910x2380, /* 31 */11920x2400, /* 32 */1193};11941195static u32 src_output_buffer_addr[DSP_MAX_SRC_NR] = {11960x2B80,11970x2BA0,11980x2BC0,11990x2BE0,12000x2D00,12010x2D20,12020x2D40,12030x2D60,12040x2D80,12050x2DA0,12060x2DC0,12070x2DE0,12080x2E00,12090x2E201210};12111212static u32 src_delay_buffer_addr[DSP_MAX_SRC_NR] = {12130x2480,12140x2500,12150x2580,12160x2600,12170x2680,12180x2700,12190x2780,12200x2800,12210x2880,12220x2900,12230x2980,12240x2A00,12250x2A80,12260x2B001227};12281229struct dsp_pcm_channel_descriptor *1230cs46xx_dsp_create_pcm_channel (struct snd_cs46xx * chip,1231u32 sample_rate, void * private_data,1232u32 hw_dma_addr,1233int pcm_channel_id)1234{1235struct dsp_spos_instance * ins = chip->dsp_spos_instance;1236struct dsp_scb_descriptor * src_scb = NULL, * pcm_scb, * mixer_scb = NULL;1237struct dsp_scb_descriptor * src_parent_scb = NULL;12381239/* struct dsp_scb_descriptor * pcm_parent_scb; */1240char scb_name[DSP_MAX_SCB_NAME];1241int i, pcm_index = -1, insert_point, src_index = -1, pass_through = 0;1242unsigned long flags;12431244switch (pcm_channel_id) {1245case DSP_PCM_MAIN_CHANNEL:1246mixer_scb = ins->master_mix_scb;1247break;1248case DSP_PCM_REAR_CHANNEL:1249mixer_scb = ins->rear_mix_scb;1250break;1251case DSP_PCM_CENTER_LFE_CHANNEL:1252mixer_scb = ins->center_lfe_mix_scb;1253break;1254case DSP_PCM_S71_CHANNEL:1255/* TODO */1256snd_BUG();1257break;1258case DSP_IEC958_CHANNEL:1259if (snd_BUG_ON(!ins->asynch_tx_scb))1260return NULL;1261mixer_scb = ins->asynch_tx_scb;12621263/* if sample rate is set to 48khz we pass1264the Sample Rate Converted (which could1265alter the raw data stream ...) */1266if (sample_rate == 48000) {1267snd_printdd ("IEC958 pass through\n");1268/* Hack to bypass creating a new SRC */1269pass_through = 1;1270}1271break;1272default:1273snd_BUG();1274return NULL;1275}1276/* default sample rate is 44100 */1277if (!sample_rate) sample_rate = 44100;12781279/* search for a already created SRC SCB with the same sample rate */1280for (i = 0; i < DSP_MAX_PCM_CHANNELS &&1281(pcm_index == -1 || src_scb == NULL); ++i) {12821283/* virtual channel reserved1284for capture */1285if (i == CS46XX_DSP_CAPTURE_CHANNEL) continue;12861287if (ins->pcm_channels[i].active) {1288if (!src_scb &&1289ins->pcm_channels[i].sample_rate == sample_rate &&1290ins->pcm_channels[i].mixer_scb == mixer_scb) {1291src_scb = ins->pcm_channels[i].src_scb;1292ins->pcm_channels[i].src_scb->ref_count ++;1293src_index = ins->pcm_channels[i].src_slot;1294}1295} else if (pcm_index == -1) {1296pcm_index = i;1297}1298}12991300if (pcm_index == -1) {1301snd_printk (KERN_ERR "dsp_spos: no free PCM channel\n");1302return NULL;1303}13041305if (src_scb == NULL) {1306if (ins->nsrc_scb >= DSP_MAX_SRC_NR) {1307snd_printk(KERN_ERR "dsp_spos: to many SRC instances\n!");1308return NULL;1309}13101311/* find a free slot */1312for (i = 0; i < DSP_MAX_SRC_NR; ++i) {1313if (ins->src_scb_slots[i] == 0) {1314src_index = i;1315ins->src_scb_slots[i] = 1;1316break;1317}1318}1319if (snd_BUG_ON(src_index == -1))1320return NULL;13211322/* we need to create a new SRC SCB */1323if (mixer_scb->sub_list_ptr == ins->the_null_scb) {1324src_parent_scb = mixer_scb;1325insert_point = SCB_ON_PARENT_SUBLIST_SCB;1326} else {1327src_parent_scb = find_next_free_scb(chip,mixer_scb->sub_list_ptr);1328insert_point = SCB_ON_PARENT_NEXT_SCB;1329}13301331snprintf (scb_name,DSP_MAX_SCB_NAME,"SrcTask_SCB%d",src_index);13321333snd_printdd( "dsp_spos: creating SRC \"%s\"\n",scb_name);1334src_scb = cs46xx_dsp_create_src_task_scb(chip,scb_name,1335sample_rate,1336src_output_buffer_addr[src_index],1337src_delay_buffer_addr[src_index],1338/* 0x400 - 0x600 source SCBs */13390x400 + (src_index * 0x10) ,1340src_parent_scb,1341insert_point,1342pass_through);13431344if (!src_scb) {1345snd_printk (KERN_ERR "dsp_spos: failed to create SRCtaskSCB\n");1346return NULL;1347}13481349/* cs46xx_dsp_set_src_sample_rate(chip,src_scb,sample_rate); */13501351ins->nsrc_scb ++;1352}135313541355snprintf (scb_name,DSP_MAX_SCB_NAME,"PCMReader_SCB%d",pcm_index);13561357snd_printdd( "dsp_spos: creating PCM \"%s\" (%d)\n",scb_name,1358pcm_channel_id);13591360pcm_scb = cs46xx_dsp_create_pcm_reader_scb(chip,scb_name,1361pcm_reader_buffer_addr[pcm_index],1362/* 0x200 - 400 PCMreader SCBs */1363(pcm_index * 0x10) + 0x200,1364pcm_index, /* virtual channel 0-31 */1365hw_dma_addr, /* pcm hw addr */1366NULL, /* parent SCB ptr */13670 /* insert point */1368);13691370if (!pcm_scb) {1371snd_printk (KERN_ERR "dsp_spos: failed to create PCMreaderSCB\n");1372return NULL;1373}13741375spin_lock_irqsave(&chip->reg_lock, flags);1376ins->pcm_channels[pcm_index].sample_rate = sample_rate;1377ins->pcm_channels[pcm_index].pcm_reader_scb = pcm_scb;1378ins->pcm_channels[pcm_index].src_scb = src_scb;1379ins->pcm_channels[pcm_index].unlinked = 1;1380ins->pcm_channels[pcm_index].private_data = private_data;1381ins->pcm_channels[pcm_index].src_slot = src_index;1382ins->pcm_channels[pcm_index].active = 1;1383ins->pcm_channels[pcm_index].pcm_slot = pcm_index;1384ins->pcm_channels[pcm_index].mixer_scb = mixer_scb;1385ins->npcm_channels ++;1386spin_unlock_irqrestore(&chip->reg_lock, flags);13871388return (ins->pcm_channels + pcm_index);1389}13901391int cs46xx_dsp_pcm_channel_set_period (struct snd_cs46xx * chip,1392struct dsp_pcm_channel_descriptor * pcm_channel,1393int period_size)1394{1395u32 temp = snd_cs46xx_peek (chip,pcm_channel->pcm_reader_scb->address << 2);1396temp &= ~DMA_RQ_C1_SOURCE_SIZE_MASK;13971398switch (period_size) {1399case 2048:1400temp |= DMA_RQ_C1_SOURCE_MOD1024;1401break;1402case 1024:1403temp |= DMA_RQ_C1_SOURCE_MOD512;1404break;1405case 512:1406temp |= DMA_RQ_C1_SOURCE_MOD256;1407break;1408case 256:1409temp |= DMA_RQ_C1_SOURCE_MOD128;1410break;1411case 128:1412temp |= DMA_RQ_C1_SOURCE_MOD64;1413break;1414case 64:1415temp |= DMA_RQ_C1_SOURCE_MOD32;1416break;1417case 32:1418temp |= DMA_RQ_C1_SOURCE_MOD16;1419break;1420default:1421snd_printdd ("period size (%d) not supported by HW\n", period_size);1422return -EINVAL;1423}14241425snd_cs46xx_poke (chip,pcm_channel->pcm_reader_scb->address << 2,temp);14261427return 0;1428}14291430int cs46xx_dsp_pcm_ostream_set_period (struct snd_cs46xx * chip,1431int period_size)1432{1433u32 temp = snd_cs46xx_peek (chip,WRITEBACK_SCB_ADDR << 2);1434temp &= ~DMA_RQ_C1_DEST_SIZE_MASK;14351436switch (period_size) {1437case 2048:1438temp |= DMA_RQ_C1_DEST_MOD1024;1439break;1440case 1024:1441temp |= DMA_RQ_C1_DEST_MOD512;1442break;1443case 512:1444temp |= DMA_RQ_C1_DEST_MOD256;1445break;1446case 256:1447temp |= DMA_RQ_C1_DEST_MOD128;1448break;1449case 128:1450temp |= DMA_RQ_C1_DEST_MOD64;1451break;1452case 64:1453temp |= DMA_RQ_C1_DEST_MOD32;1454break;1455case 32:1456temp |= DMA_RQ_C1_DEST_MOD16;1457break;1458default:1459snd_printdd ("period size (%d) not supported by HW\n", period_size);1460return -EINVAL;1461}14621463snd_cs46xx_poke (chip,WRITEBACK_SCB_ADDR << 2,temp);14641465return 0;1466}14671468void cs46xx_dsp_destroy_pcm_channel (struct snd_cs46xx * chip,1469struct dsp_pcm_channel_descriptor * pcm_channel)1470{1471struct dsp_spos_instance * ins = chip->dsp_spos_instance;1472unsigned long flags;14731474if (snd_BUG_ON(!pcm_channel->active ||1475ins->npcm_channels <= 0 ||1476pcm_channel->src_scb->ref_count <= 0))1477return;14781479spin_lock_irqsave(&chip->reg_lock, flags);1480pcm_channel->unlinked = 1;1481pcm_channel->active = 0;1482pcm_channel->private_data = NULL;1483pcm_channel->src_scb->ref_count --;1484ins->npcm_channels --;1485spin_unlock_irqrestore(&chip->reg_lock, flags);14861487cs46xx_dsp_remove_scb(chip,pcm_channel->pcm_reader_scb);14881489if (!pcm_channel->src_scb->ref_count) {1490cs46xx_dsp_remove_scb(chip,pcm_channel->src_scb);14911492if (snd_BUG_ON(pcm_channel->src_slot < 0 ||1493pcm_channel->src_slot >= DSP_MAX_SRC_NR))1494return;14951496ins->src_scb_slots[pcm_channel->src_slot] = 0;1497ins->nsrc_scb --;1498}1499}15001501int cs46xx_dsp_pcm_unlink (struct snd_cs46xx * chip,1502struct dsp_pcm_channel_descriptor * pcm_channel)1503{1504unsigned long flags;15051506if (snd_BUG_ON(!pcm_channel->active ||1507chip->dsp_spos_instance->npcm_channels <= 0))1508return -EIO;15091510spin_lock_irqsave(&chip->reg_lock, flags);1511if (pcm_channel->unlinked) {1512spin_unlock_irqrestore(&chip->reg_lock, flags);1513return -EIO;1514}15151516pcm_channel->unlinked = 1;15171518_dsp_unlink_scb (chip,pcm_channel->pcm_reader_scb);1519spin_unlock_irqrestore(&chip->reg_lock, flags);15201521return 0;1522}15231524int cs46xx_dsp_pcm_link (struct snd_cs46xx * chip,1525struct dsp_pcm_channel_descriptor * pcm_channel)1526{1527struct dsp_spos_instance * ins = chip->dsp_spos_instance;1528struct dsp_scb_descriptor * parent_scb;1529struct dsp_scb_descriptor * src_scb = pcm_channel->src_scb;1530unsigned long flags;15311532spin_lock_irqsave(&chip->reg_lock, flags);15331534if (pcm_channel->unlinked == 0) {1535spin_unlock_irqrestore(&chip->reg_lock, flags);1536return -EIO;1537}15381539parent_scb = src_scb;15401541if (src_scb->sub_list_ptr != ins->the_null_scb) {1542src_scb->sub_list_ptr->parent_scb_ptr = pcm_channel->pcm_reader_scb;1543pcm_channel->pcm_reader_scb->next_scb_ptr = src_scb->sub_list_ptr;1544}15451546src_scb->sub_list_ptr = pcm_channel->pcm_reader_scb;15471548snd_BUG_ON(pcm_channel->pcm_reader_scb->parent_scb_ptr);1549pcm_channel->pcm_reader_scb->parent_scb_ptr = parent_scb;15501551/* update SCB entry in DSP RAM */1552cs46xx_dsp_spos_update_scb(chip,pcm_channel->pcm_reader_scb);15531554/* update parent SCB entry */1555cs46xx_dsp_spos_update_scb(chip,parent_scb);15561557pcm_channel->unlinked = 0;1558spin_unlock_irqrestore(&chip->reg_lock, flags);1559return 0;1560}15611562struct dsp_scb_descriptor *1563cs46xx_add_record_source (struct snd_cs46xx *chip, struct dsp_scb_descriptor * source,1564u16 addr, char * scb_name)1565{1566struct dsp_spos_instance * ins = chip->dsp_spos_instance;1567struct dsp_scb_descriptor * parent;1568struct dsp_scb_descriptor * pcm_input;1569int insert_point;15701571if (snd_BUG_ON(!ins->record_mixer_scb))1572return NULL;15731574if (ins->record_mixer_scb->sub_list_ptr != ins->the_null_scb) {1575parent = find_next_free_scb (chip,ins->record_mixer_scb->sub_list_ptr);1576insert_point = SCB_ON_PARENT_NEXT_SCB;1577} else {1578parent = ins->record_mixer_scb;1579insert_point = SCB_ON_PARENT_SUBLIST_SCB;1580}15811582pcm_input = cs46xx_dsp_create_pcm_serial_input_scb(chip,scb_name,addr,1583source, parent,1584insert_point);15851586return pcm_input;1587}15881589int cs46xx_src_unlink(struct snd_cs46xx *chip, struct dsp_scb_descriptor * src)1590{1591unsigned long flags;15921593if (snd_BUG_ON(!src->parent_scb_ptr))1594return -EINVAL;15951596/* mute SCB */1597cs46xx_dsp_scb_set_volume (chip,src,0,0);15981599spin_lock_irqsave(&chip->reg_lock, flags);1600_dsp_unlink_scb (chip,src);1601spin_unlock_irqrestore(&chip->reg_lock, flags);16021603return 0;1604}16051606int cs46xx_src_link(struct snd_cs46xx *chip, struct dsp_scb_descriptor * src)1607{1608struct dsp_spos_instance * ins = chip->dsp_spos_instance;1609struct dsp_scb_descriptor * parent_scb;16101611if (snd_BUG_ON(src->parent_scb_ptr))1612return -EINVAL;1613if (snd_BUG_ON(!ins->master_mix_scb))1614return -EINVAL;16151616if (ins->master_mix_scb->sub_list_ptr != ins->the_null_scb) {1617parent_scb = find_next_free_scb (chip,ins->master_mix_scb->sub_list_ptr);1618parent_scb->next_scb_ptr = src;1619} else {1620parent_scb = ins->master_mix_scb;1621parent_scb->sub_list_ptr = src;1622}16231624src->parent_scb_ptr = parent_scb;16251626/* update entry in DSP RAM */1627cs46xx_dsp_spos_update_scb(chip,parent_scb);16281629return 0;1630}16311632int cs46xx_dsp_enable_spdif_out (struct snd_cs46xx *chip)1633{1634struct dsp_spos_instance * ins = chip->dsp_spos_instance;16351636if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_HW_ENABLED) ) {1637cs46xx_dsp_enable_spdif_hw (chip);1638}16391640/* dont touch anything if SPDIF is open */1641if ( ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN) {1642/* when cs46xx_iec958_post_close(...) is called it1643will call this function if necessary depending on1644this bit */1645ins->spdif_status_out |= DSP_SPDIF_STATUS_OUTPUT_ENABLED;16461647return -EBUSY;1648}16491650if (snd_BUG_ON(ins->asynch_tx_scb))1651return -EINVAL;1652if (snd_BUG_ON(ins->master_mix_scb->next_scb_ptr !=1653ins->the_null_scb))1654return -EINVAL;16551656/* reset output snooper sample buffer pointer */1657snd_cs46xx_poke (chip, (ins->ref_snoop_scb->address + 2) << 2,1658(OUTPUT_SNOOP_BUFFER + 0x10) << 0x10 );16591660/* The asynch. transfer task */1661ins->asynch_tx_scb = cs46xx_dsp_create_asynch_fg_tx_scb(chip,"AsynchFGTxSCB",ASYNCTX_SCB_ADDR,1662SPDIFO_SCB_INST,1663SPDIFO_IP_OUTPUT_BUFFER1,1664ins->master_mix_scb,1665SCB_ON_PARENT_NEXT_SCB);1666if (!ins->asynch_tx_scb) return -ENOMEM;16671668ins->spdif_pcm_input_scb = cs46xx_dsp_create_pcm_serial_input_scb(chip,"PCMSerialInput_II",1669PCMSERIALINII_SCB_ADDR,1670ins->ref_snoop_scb,1671ins->asynch_tx_scb,1672SCB_ON_PARENT_SUBLIST_SCB);167316741675if (!ins->spdif_pcm_input_scb) return -ENOMEM;16761677/* monitor state */1678ins->spdif_status_out |= DSP_SPDIF_STATUS_OUTPUT_ENABLED;16791680return 0;1681}16821683int cs46xx_dsp_disable_spdif_out (struct snd_cs46xx *chip)1684{1685struct dsp_spos_instance * ins = chip->dsp_spos_instance;16861687/* dont touch anything if SPDIF is open */1688if ( ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN) {1689ins->spdif_status_out &= ~DSP_SPDIF_STATUS_OUTPUT_ENABLED;1690return -EBUSY;1691}16921693/* check integrety */1694if (snd_BUG_ON(!ins->asynch_tx_scb))1695return -EINVAL;1696if (snd_BUG_ON(!ins->spdif_pcm_input_scb))1697return -EINVAL;1698if (snd_BUG_ON(ins->master_mix_scb->next_scb_ptr != ins->asynch_tx_scb))1699return -EINVAL;1700if (snd_BUG_ON(ins->asynch_tx_scb->parent_scb_ptr !=1701ins->master_mix_scb))1702return -EINVAL;17031704cs46xx_dsp_remove_scb (chip,ins->spdif_pcm_input_scb);1705cs46xx_dsp_remove_scb (chip,ins->asynch_tx_scb);17061707ins->spdif_pcm_input_scb = NULL;1708ins->asynch_tx_scb = NULL;17091710/* clear buffer to prevent any undesired noise */1711_dsp_clear_sample_buffer(chip,SPDIFO_IP_OUTPUT_BUFFER1,256);17121713/* monitor state */1714ins->spdif_status_out &= ~DSP_SPDIF_STATUS_OUTPUT_ENABLED;171517161717return 0;1718}17191720int cs46xx_iec958_pre_open (struct snd_cs46xx *chip)1721{1722struct dsp_spos_instance * ins = chip->dsp_spos_instance;17231724if ( ins->spdif_status_out & DSP_SPDIF_STATUS_OUTPUT_ENABLED ) {1725/* remove AsynchFGTxSCB and and PCMSerialInput_II */1726cs46xx_dsp_disable_spdif_out (chip);17271728/* save state */1729ins->spdif_status_out |= DSP_SPDIF_STATUS_OUTPUT_ENABLED;1730}17311732/* if not enabled already */1733if ( !(ins->spdif_status_out & DSP_SPDIF_STATUS_HW_ENABLED) ) {1734cs46xx_dsp_enable_spdif_hw (chip);1735}17361737/* Create the asynch. transfer task for playback */1738ins->asynch_tx_scb = cs46xx_dsp_create_asynch_fg_tx_scb(chip,"AsynchFGTxSCB",ASYNCTX_SCB_ADDR,1739SPDIFO_SCB_INST,1740SPDIFO_IP_OUTPUT_BUFFER1,1741ins->master_mix_scb,1742SCB_ON_PARENT_NEXT_SCB);174317441745/* set spdif channel status value for streaming */1746cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_stream);17471748ins->spdif_status_out |= DSP_SPDIF_STATUS_PLAYBACK_OPEN;17491750return 0;1751}17521753int cs46xx_iec958_post_close (struct snd_cs46xx *chip)1754{1755struct dsp_spos_instance * ins = chip->dsp_spos_instance;17561757if (snd_BUG_ON(!ins->asynch_tx_scb))1758return -EINVAL;17591760ins->spdif_status_out &= ~DSP_SPDIF_STATUS_PLAYBACK_OPEN;17611762/* restore settings */1763cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);17641765/* deallocate stuff */1766if (ins->spdif_pcm_input_scb != NULL) {1767cs46xx_dsp_remove_scb (chip,ins->spdif_pcm_input_scb);1768ins->spdif_pcm_input_scb = NULL;1769}17701771cs46xx_dsp_remove_scb (chip,ins->asynch_tx_scb);1772ins->asynch_tx_scb = NULL;17731774/* clear buffer to prevent any undesired noise */1775_dsp_clear_sample_buffer(chip,SPDIFO_IP_OUTPUT_BUFFER1,256);17761777/* restore state */1778if ( ins->spdif_status_out & DSP_SPDIF_STATUS_OUTPUT_ENABLED ) {1779cs46xx_dsp_enable_spdif_out (chip);1780}17811782return 0;1783}178417851786