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awilliam
GitHub Repository: awilliam/linux-vfio
Path: blob/master/sound/pci/hda/hda_codec.h
10817 views
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/*
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* Universal Interface for Intel High Definition Audio Codec
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*
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* Copyright (c) 2004 Takashi Iwai <[email protected]>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59
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* Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef __SOUND_HDA_CODEC_H
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#define __SOUND_HDA_CODEC_H
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#include <sound/info.h>
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#include <sound/control.h>
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#include <sound/pcm.h>
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#include <sound/hwdep.h>
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#if defined(CONFIG_PM) || defined(CONFIG_SND_HDA_POWER_SAVE)
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#define SND_HDA_NEEDS_RESUME /* resume control code is required */
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#endif
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/*
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* nodes
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*/
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#define AC_NODE_ROOT 0x00
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/*
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* function group types
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*/
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enum {
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AC_GRP_AUDIO_FUNCTION = 0x01,
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AC_GRP_MODEM_FUNCTION = 0x02,
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};
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/*
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* widget types
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*/
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enum {
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AC_WID_AUD_OUT, /* Audio Out */
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AC_WID_AUD_IN, /* Audio In */
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AC_WID_AUD_MIX, /* Audio Mixer */
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AC_WID_AUD_SEL, /* Audio Selector */
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AC_WID_PIN, /* Pin Complex */
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AC_WID_POWER, /* Power */
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AC_WID_VOL_KNB, /* Volume Knob */
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AC_WID_BEEP, /* Beep Generator */
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AC_WID_VENDOR = 0x0f /* Vendor specific */
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};
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/*
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* GET verbs
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*/
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#define AC_VERB_GET_STREAM_FORMAT 0x0a00
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#define AC_VERB_GET_AMP_GAIN_MUTE 0x0b00
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#define AC_VERB_GET_PROC_COEF 0x0c00
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#define AC_VERB_GET_COEF_INDEX 0x0d00
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#define AC_VERB_PARAMETERS 0x0f00
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#define AC_VERB_GET_CONNECT_SEL 0x0f01
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#define AC_VERB_GET_CONNECT_LIST 0x0f02
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#define AC_VERB_GET_PROC_STATE 0x0f03
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#define AC_VERB_GET_SDI_SELECT 0x0f04
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#define AC_VERB_GET_POWER_STATE 0x0f05
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#define AC_VERB_GET_CONV 0x0f06
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#define AC_VERB_GET_PIN_WIDGET_CONTROL 0x0f07
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#define AC_VERB_GET_UNSOLICITED_RESPONSE 0x0f08
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#define AC_VERB_GET_PIN_SENSE 0x0f09
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#define AC_VERB_GET_BEEP_CONTROL 0x0f0a
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#define AC_VERB_GET_EAPD_BTLENABLE 0x0f0c
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#define AC_VERB_GET_DIGI_CONVERT_1 0x0f0d
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#define AC_VERB_GET_DIGI_CONVERT_2 0x0f0e /* unused */
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#define AC_VERB_GET_VOLUME_KNOB_CONTROL 0x0f0f
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/* f10-f1a: GPIO */
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#define AC_VERB_GET_GPIO_DATA 0x0f15
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#define AC_VERB_GET_GPIO_MASK 0x0f16
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#define AC_VERB_GET_GPIO_DIRECTION 0x0f17
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#define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18
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#define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19
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#define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a
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#define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c
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/* f20: AFG/MFG */
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#define AC_VERB_GET_SUBSYSTEM_ID 0x0f20
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#define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d
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#define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e
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#define AC_VERB_GET_HDMI_ELDD 0x0f2f
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#define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30
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#define AC_VERB_GET_HDMI_DIP_DATA 0x0f31
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#define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32
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#define AC_VERB_GET_HDMI_CP_CTRL 0x0f33
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#define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34
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/*
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* SET verbs
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*/
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#define AC_VERB_SET_STREAM_FORMAT 0x200
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#define AC_VERB_SET_AMP_GAIN_MUTE 0x300
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#define AC_VERB_SET_PROC_COEF 0x400
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#define AC_VERB_SET_COEF_INDEX 0x500
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#define AC_VERB_SET_CONNECT_SEL 0x701
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#define AC_VERB_SET_PROC_STATE 0x703
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#define AC_VERB_SET_SDI_SELECT 0x704
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#define AC_VERB_SET_POWER_STATE 0x705
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#define AC_VERB_SET_CHANNEL_STREAMID 0x706
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#define AC_VERB_SET_PIN_WIDGET_CONTROL 0x707
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#define AC_VERB_SET_UNSOLICITED_ENABLE 0x708
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#define AC_VERB_SET_PIN_SENSE 0x709
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#define AC_VERB_SET_BEEP_CONTROL 0x70a
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#define AC_VERB_SET_EAPD_BTLENABLE 0x70c
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#define AC_VERB_SET_DIGI_CONVERT_1 0x70d
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#define AC_VERB_SET_DIGI_CONVERT_2 0x70e
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#define AC_VERB_SET_VOLUME_KNOB_CONTROL 0x70f
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#define AC_VERB_SET_GPIO_DATA 0x715
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#define AC_VERB_SET_GPIO_MASK 0x716
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#define AC_VERB_SET_GPIO_DIRECTION 0x717
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#define AC_VERB_SET_GPIO_WAKE_MASK 0x718
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#define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719
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#define AC_VERB_SET_GPIO_STICKY_MASK 0x71a
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#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c
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#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d
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#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e
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#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f
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#define AC_VERB_SET_EAPD 0x788
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#define AC_VERB_SET_CODEC_RESET 0x7ff
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#define AC_VERB_SET_CVT_CHAN_COUNT 0x72d
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#define AC_VERB_SET_HDMI_DIP_INDEX 0x730
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#define AC_VERB_SET_HDMI_DIP_DATA 0x731
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#define AC_VERB_SET_HDMI_DIP_XMIT 0x732
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#define AC_VERB_SET_HDMI_CP_CTRL 0x733
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#define AC_VERB_SET_HDMI_CHAN_SLOT 0x734
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/*
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* Parameter IDs
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*/
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#define AC_PAR_VENDOR_ID 0x00
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#define AC_PAR_SUBSYSTEM_ID 0x01
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#define AC_PAR_REV_ID 0x02
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#define AC_PAR_NODE_COUNT 0x04
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#define AC_PAR_FUNCTION_TYPE 0x05
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#define AC_PAR_AUDIO_FG_CAP 0x08
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#define AC_PAR_AUDIO_WIDGET_CAP 0x09
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#define AC_PAR_PCM 0x0a
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#define AC_PAR_STREAM 0x0b
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#define AC_PAR_PIN_CAP 0x0c
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#define AC_PAR_AMP_IN_CAP 0x0d
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#define AC_PAR_CONNLIST_LEN 0x0e
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#define AC_PAR_POWER_STATE 0x0f
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#define AC_PAR_PROC_CAP 0x10
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#define AC_PAR_GPIO_CAP 0x11
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#define AC_PAR_AMP_OUT_CAP 0x12
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#define AC_PAR_VOL_KNB_CAP 0x13
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#define AC_PAR_HDMI_LPCM_CAP 0x20
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/*
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* AC_VERB_PARAMETERS results (32bit)
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*/
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/* Function Group Type */
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#define AC_FGT_TYPE (0xff<<0)
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#define AC_FGT_TYPE_SHIFT 0
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#define AC_FGT_UNSOL_CAP (1<<8)
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/* Audio Function Group Capabilities */
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#define AC_AFG_OUT_DELAY (0xf<<0)
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#define AC_AFG_IN_DELAY (0xf<<8)
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#define AC_AFG_BEEP_GEN (1<<16)
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/* Audio Widget Capabilities */
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#define AC_WCAP_STEREO (1<<0) /* stereo I/O */
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#define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */
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#define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */
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#define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */
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#define AC_WCAP_FORMAT_OVRD (1<<4) /* format override */
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#define AC_WCAP_STRIPE (1<<5) /* stripe */
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#define AC_WCAP_PROC_WID (1<<6) /* Proc Widget */
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#define AC_WCAP_UNSOL_CAP (1<<7) /* Unsol capable */
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#define AC_WCAP_CONN_LIST (1<<8) /* connection list */
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#define AC_WCAP_DIGITAL (1<<9) /* digital I/O */
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#define AC_WCAP_POWER (1<<10) /* power control */
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#define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */
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#define AC_WCAP_CP_CAPS (1<<12) /* content protection */
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#define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */
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#define AC_WCAP_DELAY (0xf<<16)
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#define AC_WCAP_DELAY_SHIFT 16
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#define AC_WCAP_TYPE (0xf<<20)
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#define AC_WCAP_TYPE_SHIFT 20
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/* supported PCM rates and bits */
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#define AC_SUPPCM_RATES (0xfff << 0)
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#define AC_SUPPCM_BITS_8 (1<<16)
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#define AC_SUPPCM_BITS_16 (1<<17)
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#define AC_SUPPCM_BITS_20 (1<<18)
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#define AC_SUPPCM_BITS_24 (1<<19)
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#define AC_SUPPCM_BITS_32 (1<<20)
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/* supported PCM stream format */
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#define AC_SUPFMT_PCM (1<<0)
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#define AC_SUPFMT_FLOAT32 (1<<1)
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#define AC_SUPFMT_AC3 (1<<2)
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/* GP I/O count */
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#define AC_GPIO_IO_COUNT (0xff<<0)
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#define AC_GPIO_O_COUNT (0xff<<8)
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#define AC_GPIO_O_COUNT_SHIFT 8
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#define AC_GPIO_I_COUNT (0xff<<16)
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#define AC_GPIO_I_COUNT_SHIFT 16
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#define AC_GPIO_UNSOLICITED (1<<30)
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#define AC_GPIO_WAKE (1<<31)
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/* Converter stream, channel */
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#define AC_CONV_CHANNEL (0xf<<0)
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#define AC_CONV_STREAM (0xf<<4)
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#define AC_CONV_STREAM_SHIFT 4
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/* Input converter SDI select */
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#define AC_SDI_SELECT (0xf<<0)
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/* stream format id */
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#define AC_FMT_CHAN_SHIFT 0
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#define AC_FMT_CHAN_MASK (0x0f << 0)
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#define AC_FMT_BITS_SHIFT 4
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#define AC_FMT_BITS_MASK (7 << 4)
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#define AC_FMT_BITS_8 (0 << 4)
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#define AC_FMT_BITS_16 (1 << 4)
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#define AC_FMT_BITS_20 (2 << 4)
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#define AC_FMT_BITS_24 (3 << 4)
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#define AC_FMT_BITS_32 (4 << 4)
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#define AC_FMT_DIV_SHIFT 8
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#define AC_FMT_DIV_MASK (7 << 8)
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#define AC_FMT_MULT_SHIFT 11
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#define AC_FMT_MULT_MASK (7 << 11)
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#define AC_FMT_BASE_SHIFT 14
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#define AC_FMT_BASE_48K (0 << 14)
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#define AC_FMT_BASE_44K (1 << 14)
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#define AC_FMT_TYPE_SHIFT 15
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#define AC_FMT_TYPE_PCM (0 << 15)
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#define AC_FMT_TYPE_NON_PCM (1 << 15)
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/* Unsolicited response control */
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#define AC_UNSOL_TAG (0x3f<<0)
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#define AC_UNSOL_ENABLED (1<<7)
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#define AC_USRSP_EN AC_UNSOL_ENABLED
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/* Unsolicited responses */
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#define AC_UNSOL_RES_TAG (0x3f<<26)
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#define AC_UNSOL_RES_TAG_SHIFT 26
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#define AC_UNSOL_RES_SUBTAG (0x1f<<21)
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#define AC_UNSOL_RES_SUBTAG_SHIFT 21
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#define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */
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#define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */
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#define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */
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#define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */
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/* Pin widget capabilies */
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#define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */
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#define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */
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#define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */
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#define AC_PINCAP_HP_DRV (1<<3) /* headphone drive capable */
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#define AC_PINCAP_OUT (1<<4) /* output capable */
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#define AC_PINCAP_IN (1<<5) /* input capable */
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#define AC_PINCAP_BALANCE (1<<6) /* balanced I/O capable */
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/* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification,
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* but is marked reserved in the Intel HDA specification.
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*/
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#define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */
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/* Note: The same bit as LR_SWAP is newly defined as HDMI capability
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* in HD-audio specification
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*/
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#define AC_PINCAP_HDMI (1<<7) /* HDMI pin */
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#define AC_PINCAP_DP (1<<24) /* DisplayPort pin, can
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* coexist with AC_PINCAP_HDMI
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*/
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#define AC_PINCAP_VREF (0x37<<8)
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#define AC_PINCAP_VREF_SHIFT 8
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#define AC_PINCAP_EAPD (1<<16) /* EAPD capable */
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#define AC_PINCAP_HBR (1<<27) /* High Bit Rate */
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/* Vref status (used in pin cap) */
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#define AC_PINCAP_VREF_HIZ (1<<0) /* Hi-Z */
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#define AC_PINCAP_VREF_50 (1<<1) /* 50% */
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#define AC_PINCAP_VREF_GRD (1<<2) /* ground */
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#define AC_PINCAP_VREF_80 (1<<4) /* 80% */
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#define AC_PINCAP_VREF_100 (1<<5) /* 100% */
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/* Amplifier capabilities */
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#define AC_AMPCAP_OFFSET (0x7f<<0) /* 0dB offset */
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#define AC_AMPCAP_OFFSET_SHIFT 0
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#define AC_AMPCAP_NUM_STEPS (0x7f<<8) /* number of steps */
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#define AC_AMPCAP_NUM_STEPS_SHIFT 8
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#define AC_AMPCAP_STEP_SIZE (0x7f<<16) /* step size 0-32dB
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* in 0.25dB
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*/
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#define AC_AMPCAP_STEP_SIZE_SHIFT 16
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#define AC_AMPCAP_MUTE (1<<31) /* mute capable */
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#define AC_AMPCAP_MUTE_SHIFT 31
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/* Connection list */
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#define AC_CLIST_LENGTH (0x7f<<0)
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#define AC_CLIST_LONG (1<<7)
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/* Supported power status */
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#define AC_PWRST_D0SUP (1<<0)
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#define AC_PWRST_D1SUP (1<<1)
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#define AC_PWRST_D2SUP (1<<2)
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#define AC_PWRST_D3SUP (1<<3)
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#define AC_PWRST_D3COLDSUP (1<<4)
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#define AC_PWRST_S3D3COLDSUP (1<<29)
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#define AC_PWRST_CLKSTOP (1<<30)
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#define AC_PWRST_EPSS (1U<<31)
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/* Power state values */
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#define AC_PWRST_SETTING (0xf<<0)
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#define AC_PWRST_ACTUAL (0xf<<4)
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#define AC_PWRST_ACTUAL_SHIFT 4
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#define AC_PWRST_D0 0x00
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#define AC_PWRST_D1 0x01
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#define AC_PWRST_D2 0x02
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#define AC_PWRST_D3 0x03
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/* Processing capabilies */
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#define AC_PCAP_BENIGN (1<<0)
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#define AC_PCAP_NUM_COEF (0xff<<8)
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#define AC_PCAP_NUM_COEF_SHIFT 8
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/* Volume knobs capabilities */
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#define AC_KNBCAP_NUM_STEPS (0x7f<<0)
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#define AC_KNBCAP_DELTA (1<<7)
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/* HDMI LPCM capabilities */
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#define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */
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#define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */
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#define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */
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#define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */
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#define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */
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#define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */
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#define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */
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#define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */
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#define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */
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#define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */
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#define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */
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#define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */
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#define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */
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#define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */
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/*
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* Control Parameters
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*/
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/* Amp gain/mute */
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#define AC_AMP_MUTE (1<<7)
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#define AC_AMP_GAIN (0x7f)
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#define AC_AMP_GET_INDEX (0xf<<0)
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#define AC_AMP_GET_LEFT (1<<13)
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#define AC_AMP_GET_RIGHT (0<<13)
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#define AC_AMP_GET_OUTPUT (1<<15)
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#define AC_AMP_GET_INPUT (0<<15)
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#define AC_AMP_SET_INDEX (0xf<<8)
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#define AC_AMP_SET_INDEX_SHIFT 8
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#define AC_AMP_SET_RIGHT (1<<12)
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#define AC_AMP_SET_LEFT (1<<13)
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#define AC_AMP_SET_INPUT (1<<14)
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#define AC_AMP_SET_OUTPUT (1<<15)
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/* DIGITAL1 bits */
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#define AC_DIG1_ENABLE (1<<0)
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#define AC_DIG1_V (1<<1)
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#define AC_DIG1_VCFG (1<<2)
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#define AC_DIG1_EMPHASIS (1<<3)
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#define AC_DIG1_COPYRIGHT (1<<4)
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#define AC_DIG1_NONAUDIO (1<<5)
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#define AC_DIG1_PROFESSIONAL (1<<6)
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#define AC_DIG1_LEVEL (1<<7)
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/* DIGITAL2 bits */
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#define AC_DIG2_CC (0x7f<<0)
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/* Pin widget control - 8bit */
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#define AC_PINCTL_EPT (0x3<<0)
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#define AC_PINCTL_EPT_NATIVE 0
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#define AC_PINCTL_EPT_HBR 3
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#define AC_PINCTL_VREFEN (0x7<<0)
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#define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */
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#define AC_PINCTL_VREF_50 1 /* 50% */
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#define AC_PINCTL_VREF_GRD 2 /* ground */
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#define AC_PINCTL_VREF_80 4 /* 80% */
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#define AC_PINCTL_VREF_100 5 /* 100% */
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#define AC_PINCTL_IN_EN (1<<5)
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#define AC_PINCTL_OUT_EN (1<<6)
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#define AC_PINCTL_HP_EN (1<<7)
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/* Pin sense - 32bit */
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#define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff)
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#define AC_PINSENSE_PRESENCE (1<<31)
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#define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */
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/* EAPD/BTL enable - 32bit */
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#define AC_EAPDBTL_BALANCED (1<<0)
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#define AC_EAPDBTL_EAPD (1<<1)
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#define AC_EAPDBTL_LR_SWAP (1<<2)
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/* HDMI ELD data */
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#define AC_ELDD_ELD_VALID (1<<31)
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#define AC_ELDD_ELD_DATA 0xff
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/* HDMI DIP size */
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#define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */
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#define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */
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/* HDMI DIP index */
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#define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */
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#define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */
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/* HDMI DIP xmit (transmit) control */
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#define AC_DIPXMIT_MASK (0x3<<6)
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#define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */
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#define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */
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#define AC_DIPXMIT_BEST (0x3<<6) /* best effort */
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/* HDMI content protection (CP) control */
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#define AC_CPCTRL_CES (1<<9) /* current encryption state */
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#define AC_CPCTRL_READY (1<<8) /* ready bit */
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#define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */
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#define AC_CPCTRL_STATE (3<<0) /* current CP request state */
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/* Converter channel <-> HDMI slot mapping */
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#define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */
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#define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */
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/* configuration default - 32bit */
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#define AC_DEFCFG_SEQUENCE (0xf<<0)
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#define AC_DEFCFG_DEF_ASSOC (0xf<<4)
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#define AC_DEFCFG_ASSOC_SHIFT 4
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#define AC_DEFCFG_MISC (0xf<<8)
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#define AC_DEFCFG_MISC_SHIFT 8
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#define AC_DEFCFG_MISC_NO_PRESENCE (1<<0)
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#define AC_DEFCFG_COLOR (0xf<<12)
447
#define AC_DEFCFG_COLOR_SHIFT 12
448
#define AC_DEFCFG_CONN_TYPE (0xf<<16)
449
#define AC_DEFCFG_CONN_TYPE_SHIFT 16
450
#define AC_DEFCFG_DEVICE (0xf<<20)
451
#define AC_DEFCFG_DEVICE_SHIFT 20
452
#define AC_DEFCFG_LOCATION (0x3f<<24)
453
#define AC_DEFCFG_LOCATION_SHIFT 24
454
#define AC_DEFCFG_PORT_CONN (0x3<<30)
455
#define AC_DEFCFG_PORT_CONN_SHIFT 30
456
457
/* device device types (0x0-0xf) */
458
enum {
459
AC_JACK_LINE_OUT,
460
AC_JACK_SPEAKER,
461
AC_JACK_HP_OUT,
462
AC_JACK_CD,
463
AC_JACK_SPDIF_OUT,
464
AC_JACK_DIG_OTHER_OUT,
465
AC_JACK_MODEM_LINE_SIDE,
466
AC_JACK_MODEM_HAND_SIDE,
467
AC_JACK_LINE_IN,
468
AC_JACK_AUX,
469
AC_JACK_MIC_IN,
470
AC_JACK_TELEPHONY,
471
AC_JACK_SPDIF_IN,
472
AC_JACK_DIG_OTHER_IN,
473
AC_JACK_OTHER = 0xf,
474
};
475
476
/* jack connection types (0x0-0xf) */
477
enum {
478
AC_JACK_CONN_UNKNOWN,
479
AC_JACK_CONN_1_8,
480
AC_JACK_CONN_1_4,
481
AC_JACK_CONN_ATAPI,
482
AC_JACK_CONN_RCA,
483
AC_JACK_CONN_OPTICAL,
484
AC_JACK_CONN_OTHER_DIGITAL,
485
AC_JACK_CONN_OTHER_ANALOG,
486
AC_JACK_CONN_DIN,
487
AC_JACK_CONN_XLR,
488
AC_JACK_CONN_RJ11,
489
AC_JACK_CONN_COMB,
490
AC_JACK_CONN_OTHER = 0xf,
491
};
492
493
/* jack colors (0x0-0xf) */
494
enum {
495
AC_JACK_COLOR_UNKNOWN,
496
AC_JACK_COLOR_BLACK,
497
AC_JACK_COLOR_GREY,
498
AC_JACK_COLOR_BLUE,
499
AC_JACK_COLOR_GREEN,
500
AC_JACK_COLOR_RED,
501
AC_JACK_COLOR_ORANGE,
502
AC_JACK_COLOR_YELLOW,
503
AC_JACK_COLOR_PURPLE,
504
AC_JACK_COLOR_PINK,
505
AC_JACK_COLOR_WHITE = 0xe,
506
AC_JACK_COLOR_OTHER,
507
};
508
509
/* Jack location (0x0-0x3f) */
510
/* common case */
511
enum {
512
AC_JACK_LOC_NONE,
513
AC_JACK_LOC_REAR,
514
AC_JACK_LOC_FRONT,
515
AC_JACK_LOC_LEFT,
516
AC_JACK_LOC_RIGHT,
517
AC_JACK_LOC_TOP,
518
AC_JACK_LOC_BOTTOM,
519
};
520
/* bits 4-5 */
521
enum {
522
AC_JACK_LOC_EXTERNAL = 0x00,
523
AC_JACK_LOC_INTERNAL = 0x10,
524
AC_JACK_LOC_SEPARATE = 0x20,
525
AC_JACK_LOC_OTHER = 0x30,
526
};
527
enum {
528
/* external on primary chasis */
529
AC_JACK_LOC_REAR_PANEL = 0x07,
530
AC_JACK_LOC_DRIVE_BAY,
531
/* internal */
532
AC_JACK_LOC_RISER = 0x17,
533
AC_JACK_LOC_HDMI,
534
AC_JACK_LOC_ATAPI,
535
/* others */
536
AC_JACK_LOC_MOBILE_IN = 0x37,
537
AC_JACK_LOC_MOBILE_OUT,
538
};
539
540
/* Port connectivity (0-3) */
541
enum {
542
AC_JACK_PORT_COMPLEX,
543
AC_JACK_PORT_NONE,
544
AC_JACK_PORT_FIXED,
545
AC_JACK_PORT_BOTH,
546
};
547
548
/* max. connections to a widget */
549
#define HDA_MAX_CONNECTIONS 32
550
551
/* max. codec address */
552
#define HDA_MAX_CODEC_ADDRESS 0x0f
553
554
/* max number of PCM devics per card */
555
#define HDA_MAX_PCMS 10
556
557
/*
558
* generic arrays
559
*/
560
struct snd_array {
561
unsigned int used;
562
unsigned int alloced;
563
unsigned int elem_size;
564
unsigned int alloc_align;
565
void *list;
566
};
567
568
void *snd_array_new(struct snd_array *array);
569
void snd_array_free(struct snd_array *array);
570
static inline void snd_array_init(struct snd_array *array, unsigned int size,
571
unsigned int align)
572
{
573
array->elem_size = size;
574
array->alloc_align = align;
575
}
576
577
static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
578
{
579
return array->list + idx * array->elem_size;
580
}
581
582
static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
583
{
584
return (unsigned long)(ptr - array->list) / array->elem_size;
585
}
586
587
/*
588
* Structures
589
*/
590
591
struct hda_bus;
592
struct hda_beep;
593
struct hda_codec;
594
struct hda_pcm;
595
struct hda_pcm_stream;
596
struct hda_bus_unsolicited;
597
598
/* NID type */
599
typedef u16 hda_nid_t;
600
601
/* bus operators */
602
struct hda_bus_ops {
603
/* send a single command */
604
int (*command)(struct hda_bus *bus, unsigned int cmd);
605
/* get a response from the last command */
606
unsigned int (*get_response)(struct hda_bus *bus, unsigned int addr);
607
/* free the private data */
608
void (*private_free)(struct hda_bus *);
609
/* attach a PCM stream */
610
int (*attach_pcm)(struct hda_bus *bus, struct hda_codec *codec,
611
struct hda_pcm *pcm);
612
/* reset bus for retry verb */
613
void (*bus_reset)(struct hda_bus *bus);
614
#ifdef CONFIG_SND_HDA_POWER_SAVE
615
/* notify power-up/down from codec to controller */
616
void (*pm_notify)(struct hda_bus *bus);
617
#endif
618
};
619
620
/* template to pass to the bus constructor */
621
struct hda_bus_template {
622
void *private_data;
623
struct pci_dev *pci;
624
const char *modelname;
625
int *power_save;
626
struct hda_bus_ops ops;
627
};
628
629
/*
630
* codec bus
631
*
632
* each controller needs to creata a hda_bus to assign the accessor.
633
* A hda_bus contains several codecs in the list codec_list.
634
*/
635
struct hda_bus {
636
struct snd_card *card;
637
638
/* copied from template */
639
void *private_data;
640
struct pci_dev *pci;
641
const char *modelname;
642
int *power_save;
643
struct hda_bus_ops ops;
644
645
/* codec linked list */
646
struct list_head codec_list;
647
/* link caddr -> codec */
648
struct hda_codec *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
649
650
struct mutex cmd_mutex;
651
struct mutex prepare_mutex;
652
653
/* unsolicited event queue */
654
struct hda_bus_unsolicited *unsol;
655
char workq_name[16];
656
struct workqueue_struct *workq; /* common workqueue for codecs */
657
658
/* assigned PCMs */
659
DECLARE_BITMAP(pcm_dev_bits, SNDRV_PCM_DEVICES);
660
661
/* misc op flags */
662
unsigned int needs_damn_long_delay :1;
663
unsigned int allow_bus_reset:1; /* allow bus reset at fatal error */
664
unsigned int sync_write:1; /* sync after verb write */
665
/* status for codec/controller */
666
unsigned int shutdown :1; /* being unloaded */
667
unsigned int rirb_error:1; /* error in codec communication */
668
unsigned int response_reset:1; /* controller was reset */
669
unsigned int in_reset:1; /* during reset operation */
670
unsigned int power_keep_link_on:1; /* don't power off HDA link */
671
};
672
673
/*
674
* codec preset
675
*
676
* Known codecs have the patch to build and set up the controls/PCMs
677
* better than the generic parser.
678
*/
679
struct hda_codec_preset {
680
unsigned int id;
681
unsigned int mask;
682
unsigned int subs;
683
unsigned int subs_mask;
684
unsigned int rev;
685
hda_nid_t afg, mfg;
686
const char *name;
687
int (*patch)(struct hda_codec *codec);
688
};
689
690
struct hda_codec_preset_list {
691
const struct hda_codec_preset *preset;
692
struct module *owner;
693
struct list_head list;
694
};
695
696
/* initial hook */
697
int snd_hda_add_codec_preset(struct hda_codec_preset_list *preset);
698
int snd_hda_delete_codec_preset(struct hda_codec_preset_list *preset);
699
700
/* ops set by the preset patch */
701
struct hda_codec_ops {
702
int (*build_controls)(struct hda_codec *codec);
703
int (*build_pcms)(struct hda_codec *codec);
704
int (*init)(struct hda_codec *codec);
705
void (*free)(struct hda_codec *codec);
706
void (*unsol_event)(struct hda_codec *codec, unsigned int res);
707
#ifdef SND_HDA_NEEDS_RESUME
708
int (*suspend)(struct hda_codec *codec, pm_message_t state);
709
int (*resume)(struct hda_codec *codec);
710
#endif
711
#ifdef CONFIG_SND_HDA_POWER_SAVE
712
int (*check_power_status)(struct hda_codec *codec, hda_nid_t nid);
713
#endif
714
void (*reboot_notify)(struct hda_codec *codec);
715
};
716
717
/* record for amp information cache */
718
struct hda_cache_head {
719
u32 key; /* hash key */
720
u16 val; /* assigned value */
721
u16 next; /* next link; -1 = terminal */
722
};
723
724
struct hda_amp_info {
725
struct hda_cache_head head;
726
u32 amp_caps; /* amp capabilities */
727
u16 vol[2]; /* current volume & mute */
728
};
729
730
struct hda_cache_rec {
731
u16 hash[64]; /* hash table for index */
732
struct snd_array buf; /* record entries */
733
};
734
735
/* PCM callbacks */
736
struct hda_pcm_ops {
737
int (*open)(struct hda_pcm_stream *info, struct hda_codec *codec,
738
struct snd_pcm_substream *substream);
739
int (*close)(struct hda_pcm_stream *info, struct hda_codec *codec,
740
struct snd_pcm_substream *substream);
741
int (*prepare)(struct hda_pcm_stream *info, struct hda_codec *codec,
742
unsigned int stream_tag, unsigned int format,
743
struct snd_pcm_substream *substream);
744
int (*cleanup)(struct hda_pcm_stream *info, struct hda_codec *codec,
745
struct snd_pcm_substream *substream);
746
};
747
748
/* PCM information for each substream */
749
struct hda_pcm_stream {
750
unsigned int substreams; /* number of substreams, 0 = not exist*/
751
unsigned int channels_min; /* min. number of channels */
752
unsigned int channels_max; /* max. number of channels */
753
hda_nid_t nid; /* default NID to query rates/formats/bps, or set up */
754
u32 rates; /* supported rates */
755
u64 formats; /* supported formats (SNDRV_PCM_FMTBIT_) */
756
unsigned int maxbps; /* supported max. bit per sample */
757
struct hda_pcm_ops ops;
758
};
759
760
/* PCM types */
761
enum {
762
HDA_PCM_TYPE_AUDIO,
763
HDA_PCM_TYPE_SPDIF,
764
HDA_PCM_TYPE_HDMI,
765
HDA_PCM_TYPE_MODEM,
766
HDA_PCM_NTYPES
767
};
768
769
/* for PCM creation */
770
struct hda_pcm {
771
char *name;
772
struct hda_pcm_stream stream[2];
773
unsigned int pcm_type; /* HDA_PCM_TYPE_XXX */
774
int device; /* device number to assign */
775
struct snd_pcm *pcm; /* assigned PCM instance */
776
};
777
778
/* codec information */
779
struct hda_codec {
780
struct hda_bus *bus;
781
unsigned int addr; /* codec addr*/
782
struct list_head list; /* list point */
783
784
hda_nid_t afg; /* AFG node id */
785
hda_nid_t mfg; /* MFG node id */
786
787
/* ids */
788
u8 afg_function_id;
789
u8 mfg_function_id;
790
u8 afg_unsol;
791
u8 mfg_unsol;
792
u32 vendor_id;
793
u32 subsystem_id;
794
u32 revision_id;
795
796
/* detected preset */
797
const struct hda_codec_preset *preset;
798
struct module *owner;
799
const char *vendor_name; /* codec vendor name */
800
const char *chip_name; /* codec chip name */
801
const char *modelname; /* model name for preset */
802
803
/* set by patch */
804
struct hda_codec_ops patch_ops;
805
806
/* PCM to create, set by patch_ops.build_pcms callback */
807
unsigned int num_pcms;
808
struct hda_pcm *pcm_info;
809
810
/* codec specific info */
811
void *spec;
812
813
/* beep device */
814
struct hda_beep *beep;
815
unsigned int beep_mode;
816
817
/* widget capabilities cache */
818
unsigned int num_nodes;
819
hda_nid_t start_nid;
820
u32 *wcaps;
821
822
struct snd_array mixers; /* list of assigned mixer elements */
823
struct snd_array nids; /* list of mapped mixer elements */
824
825
struct hda_cache_rec amp_cache; /* cache for amp access */
826
struct hda_cache_rec cmd_cache; /* cache for other commands */
827
828
struct snd_array conn_lists; /* connection-list array */
829
830
struct mutex spdif_mutex;
831
struct mutex control_mutex;
832
unsigned int spdif_status; /* IEC958 status bits */
833
unsigned short spdif_ctls; /* SPDIF control bits */
834
unsigned int spdif_in_enable; /* SPDIF input enable? */
835
const hda_nid_t *slave_dig_outs; /* optional digital out slave widgets */
836
struct snd_array init_pins; /* initial (BIOS) pin configurations */
837
struct snd_array driver_pins; /* pin configs set by codec parser */
838
struct snd_array cvt_setups; /* audio convert setups */
839
840
#ifdef CONFIG_SND_HDA_HWDEP
841
struct snd_hwdep *hwdep; /* assigned hwdep device */
842
struct snd_array init_verbs; /* additional init verbs */
843
struct snd_array hints; /* additional hints */
844
struct snd_array user_pins; /* default pin configs to override */
845
#endif
846
847
/* misc flags */
848
unsigned int spdif_status_reset :1; /* needs to toggle SPDIF for each
849
* status change
850
* (e.g. Realtek codecs)
851
*/
852
unsigned int pin_amp_workaround:1; /* pin out-amp takes index
853
* (e.g. Conexant codecs)
854
*/
855
unsigned int no_sticky_stream:1; /* no sticky-PCM stream assignment */
856
unsigned int pins_shutup:1; /* pins are shut up */
857
unsigned int no_trigger_sense:1; /* don't trigger at pin-sensing */
858
#ifdef CONFIG_SND_HDA_POWER_SAVE
859
unsigned int power_on :1; /* current (global) power-state */
860
unsigned int power_transition :1; /* power-state in transition */
861
int power_count; /* current (global) power refcount */
862
struct delayed_work power_work; /* delayed task for powerdown */
863
unsigned long power_on_acct;
864
unsigned long power_off_acct;
865
unsigned long power_jiffies;
866
#endif
867
868
/* codec-specific additional proc output */
869
void (*proc_widget_hook)(struct snd_info_buffer *buffer,
870
struct hda_codec *codec, hda_nid_t nid);
871
872
#ifdef CONFIG_SND_HDA_INPUT_JACK
873
/* jack detection */
874
struct snd_array jacks;
875
#endif
876
};
877
878
/* direction */
879
enum {
880
HDA_INPUT, HDA_OUTPUT
881
};
882
883
884
/*
885
* constructors
886
*/
887
int snd_hda_bus_new(struct snd_card *card, const struct hda_bus_template *temp,
888
struct hda_bus **busp);
889
int snd_hda_codec_new(struct hda_bus *bus, unsigned int codec_addr,
890
struct hda_codec **codecp);
891
int snd_hda_codec_configure(struct hda_codec *codec);
892
893
/*
894
* low level functions
895
*/
896
unsigned int snd_hda_codec_read(struct hda_codec *codec, hda_nid_t nid,
897
int direct,
898
unsigned int verb, unsigned int parm);
899
int snd_hda_codec_write(struct hda_codec *codec, hda_nid_t nid, int direct,
900
unsigned int verb, unsigned int parm);
901
#define snd_hda_param_read(codec, nid, param) \
902
snd_hda_codec_read(codec, nid, 0, AC_VERB_PARAMETERS, param)
903
int snd_hda_get_sub_nodes(struct hda_codec *codec, hda_nid_t nid,
904
hda_nid_t *start_id);
905
int snd_hda_get_connections(struct hda_codec *codec, hda_nid_t nid,
906
hda_nid_t *conn_list, int max_conns);
907
908
struct hda_verb {
909
hda_nid_t nid;
910
u32 verb;
911
u32 param;
912
};
913
914
void snd_hda_sequence_write(struct hda_codec *codec,
915
const struct hda_verb *seq);
916
917
/* unsolicited event */
918
int snd_hda_queue_unsol_event(struct hda_bus *bus, u32 res, u32 res_ex);
919
920
/* cached write */
921
#ifdef SND_HDA_NEEDS_RESUME
922
int snd_hda_codec_write_cache(struct hda_codec *codec, hda_nid_t nid,
923
int direct, unsigned int verb, unsigned int parm);
924
void snd_hda_sequence_write_cache(struct hda_codec *codec,
925
const struct hda_verb *seq);
926
int snd_hda_codec_update_cache(struct hda_codec *codec, hda_nid_t nid,
927
int direct, unsigned int verb, unsigned int parm);
928
void snd_hda_codec_resume_cache(struct hda_codec *codec);
929
#else
930
#define snd_hda_codec_write_cache snd_hda_codec_write
931
#define snd_hda_codec_update_cache snd_hda_codec_write
932
#define snd_hda_sequence_write_cache snd_hda_sequence_write
933
#endif
934
935
/* the struct for codec->pin_configs */
936
struct hda_pincfg {
937
hda_nid_t nid;
938
unsigned char ctrl; /* current pin control value */
939
unsigned char pad; /* reserved */
940
unsigned int cfg; /* default configuration */
941
};
942
943
unsigned int snd_hda_codec_get_pincfg(struct hda_codec *codec, hda_nid_t nid);
944
int snd_hda_codec_set_pincfg(struct hda_codec *codec, hda_nid_t nid,
945
unsigned int cfg);
946
int snd_hda_add_pincfg(struct hda_codec *codec, struct snd_array *list,
947
hda_nid_t nid, unsigned int cfg); /* for hwdep */
948
void snd_hda_shutup_pins(struct hda_codec *codec);
949
950
/*
951
* Mixer
952
*/
953
int snd_hda_build_controls(struct hda_bus *bus);
954
int snd_hda_codec_build_controls(struct hda_codec *codec);
955
956
/*
957
* PCM
958
*/
959
int snd_hda_build_pcms(struct hda_bus *bus);
960
int snd_hda_codec_build_pcms(struct hda_codec *codec);
961
962
int snd_hda_codec_prepare(struct hda_codec *codec,
963
struct hda_pcm_stream *hinfo,
964
unsigned int stream,
965
unsigned int format,
966
struct snd_pcm_substream *substream);
967
void snd_hda_codec_cleanup(struct hda_codec *codec,
968
struct hda_pcm_stream *hinfo,
969
struct snd_pcm_substream *substream);
970
971
void snd_hda_codec_setup_stream(struct hda_codec *codec, hda_nid_t nid,
972
u32 stream_tag,
973
int channel_id, int format);
974
void __snd_hda_codec_cleanup_stream(struct hda_codec *codec, hda_nid_t nid,
975
int do_now);
976
#define snd_hda_codec_cleanup_stream(codec, nid) \
977
__snd_hda_codec_cleanup_stream(codec, nid, 0)
978
unsigned int snd_hda_calc_stream_format(unsigned int rate,
979
unsigned int channels,
980
unsigned int format,
981
unsigned int maxbps,
982
unsigned short spdif_ctls);
983
int snd_hda_is_supported_format(struct hda_codec *codec, hda_nid_t nid,
984
unsigned int format);
985
986
/*
987
* Misc
988
*/
989
void snd_hda_get_codec_name(struct hda_codec *codec, char *name, int namelen);
990
void snd_hda_bus_reboot_notify(struct hda_bus *bus);
991
992
/*
993
* power management
994
*/
995
#ifdef CONFIG_PM
996
int snd_hda_suspend(struct hda_bus *bus);
997
int snd_hda_resume(struct hda_bus *bus);
998
#endif
999
1000
#ifdef CONFIG_SND_HDA_POWER_SAVE
1001
static inline
1002
int hda_call_check_power_status(struct hda_codec *codec, hda_nid_t nid)
1003
{
1004
if (codec->patch_ops.check_power_status)
1005
return codec->patch_ops.check_power_status(codec, nid);
1006
return 0;
1007
}
1008
#else
1009
#define hda_call_check_power_status(codec, nid) 0
1010
#endif
1011
1012
/*
1013
* get widget information
1014
*/
1015
const char *snd_hda_get_jack_connectivity(u32 cfg);
1016
const char *snd_hda_get_jack_type(u32 cfg);
1017
const char *snd_hda_get_jack_location(u32 cfg);
1018
1019
/*
1020
* power saving
1021
*/
1022
#ifdef CONFIG_SND_HDA_POWER_SAVE
1023
void snd_hda_power_up(struct hda_codec *codec);
1024
void snd_hda_power_down(struct hda_codec *codec);
1025
#define snd_hda_codec_needs_resume(codec) codec->power_count
1026
void snd_hda_update_power_acct(struct hda_codec *codec);
1027
#else
1028
static inline void snd_hda_power_up(struct hda_codec *codec) {}
1029
static inline void snd_hda_power_down(struct hda_codec *codec) {}
1030
#define snd_hda_codec_needs_resume(codec) 1
1031
#endif
1032
1033
#ifdef CONFIG_SND_HDA_PATCH_LOADER
1034
/*
1035
* patch firmware
1036
*/
1037
int snd_hda_load_patch(struct hda_bus *bus, const char *patch);
1038
#endif
1039
1040
/*
1041
* Codec modularization
1042
*/
1043
1044
/* Export symbols only for communication with codec drivers;
1045
* When built in kernel, all HD-audio drivers are supposed to be statically
1046
* linked to the kernel. Thus, the symbols don't have to (or shouldn't) be
1047
* exported unless it's built as a module.
1048
*/
1049
#ifdef MODULE
1050
#define EXPORT_SYMBOL_HDA(sym) EXPORT_SYMBOL_GPL(sym)
1051
#else
1052
#define EXPORT_SYMBOL_HDA(sym)
1053
#endif
1054
1055
#endif /* __SOUND_HDA_CODEC_H */
1056
1057