Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
awilliam
GitHub Repository: awilliam/linux-vfio
Path: blob/master/sound/pci/ice1712/ice1712.c
10820 views
1
/*
2
* ALSA driver for ICEnsemble ICE1712 (Envy24)
3
*
4
* Copyright (c) 2000 Jaroslav Kysela <[email protected]>
5
*
6
* This program is free software; you can redistribute it and/or modify
7
* it under the terms of the GNU General Public License as published by
8
* the Free Software Foundation; either version 2 of the License, or
9
* (at your option) any later version.
10
*
11
* This program is distributed in the hope that it will be useful,
12
* but WITHOUT ANY WARRANTY; without even the implied warranty of
13
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14
* GNU General Public License for more details.
15
*
16
* You should have received a copy of the GNU General Public License
17
* along with this program; if not, write to the Free Software
18
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19
*
20
*/
21
22
/*
23
NOTES:
24
- spdif nonaudio consumer mode does not work (at least with my
25
Sony STR-DB830)
26
*/
27
28
/*
29
* Changes:
30
*
31
* 2002.09.09 Takashi Iwai <[email protected]>
32
* split the code to several files. each low-level routine
33
* is stored in the local file and called from registration
34
* function from card_info struct.
35
*
36
* 2002.11.26 James Stafford <[email protected]>
37
* Added support for VT1724 (Envy24HT)
38
* I have left out support for 176.4 and 192 KHz for the moment.
39
* I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
40
*
41
* 2003.02.20 Taksahi Iwai <[email protected]>
42
* Split vt1724 part to an independent driver.
43
* The GPIO is accessed through the callback functions now.
44
*
45
* 2004.03.31 Doug McLain <[email protected]>
46
* Added support for Event Electronics EZ8 card to hoontech.c.
47
*/
48
49
50
#include <linux/io.h>
51
#include <linux/delay.h>
52
#include <linux/interrupt.h>
53
#include <linux/init.h>
54
#include <linux/pci.h>
55
#include <linux/dma-mapping.h>
56
#include <linux/slab.h>
57
#include <linux/moduleparam.h>
58
#include <linux/mutex.h>
59
60
#include <sound/core.h>
61
#include <sound/cs8427.h>
62
#include <sound/info.h>
63
#include <sound/initval.h>
64
#include <sound/tlv.h>
65
66
#include <sound/asoundef.h>
67
68
#include "ice1712.h"
69
70
/* lowlevel routines */
71
#include "delta.h"
72
#include "ews.h"
73
#include "hoontech.h"
74
75
MODULE_AUTHOR("Jaroslav Kysela <[email protected]>");
76
MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
77
MODULE_LICENSE("GPL");
78
MODULE_SUPPORTED_DEVICE("{"
79
HOONTECH_DEVICE_DESC
80
DELTA_DEVICE_DESC
81
EWS_DEVICE_DESC
82
"{ICEnsemble,Generic ICE1712},"
83
"{ICEnsemble,Generic Envy24}}");
84
85
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
86
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
87
static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
88
static char *model[SNDRV_CARDS];
89
static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
90
static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transciever reset timeout value in msec */
91
static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
92
93
module_param_array(index, int, NULL, 0444);
94
MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
95
module_param_array(id, charp, NULL, 0444);
96
MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
97
module_param_array(enable, bool, NULL, 0444);
98
MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
99
module_param_array(omni, bool, NULL, 0444);
100
MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
101
module_param_array(cs8427_timeout, int, NULL, 0444);
102
MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
103
module_param_array(model, charp, NULL, 0444);
104
MODULE_PARM_DESC(model, "Use the given board model.");
105
module_param_array(dxr_enable, int, NULL, 0444);
106
MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
107
108
109
static DEFINE_PCI_DEVICE_TABLE(snd_ice1712_ids) = {
110
{ PCI_VDEVICE(ICE, PCI_DEVICE_ID_ICE_1712), 0 }, /* ICE1712 */
111
{ 0, }
112
};
113
114
MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
115
116
static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
117
static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
118
119
static int PRO_RATE_LOCKED;
120
static int PRO_RATE_RESET = 1;
121
static unsigned int PRO_RATE_DEFAULT = 44100;
122
123
/*
124
* Basic I/O
125
*/
126
127
/* check whether the clock mode is spdif-in */
128
static inline int is_spdif_master(struct snd_ice1712 *ice)
129
{
130
return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
131
}
132
133
static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
134
{
135
return is_spdif_master(ice) || PRO_RATE_LOCKED;
136
}
137
138
static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data)
139
{
140
outb((channel << 4) | addr, ICEDS(ice, INDEX));
141
outl(data, ICEDS(ice, DATA));
142
}
143
144
static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr)
145
{
146
outb((channel << 4) | addr, ICEDS(ice, INDEX));
147
return inl(ICEDS(ice, DATA));
148
}
149
150
static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
151
unsigned short reg,
152
unsigned short val)
153
{
154
struct snd_ice1712 *ice = ac97->private_data;
155
int tm;
156
unsigned char old_cmd = 0;
157
158
for (tm = 0; tm < 0x10000; tm++) {
159
old_cmd = inb(ICEREG(ice, AC97_CMD));
160
if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
161
continue;
162
if (!(old_cmd & ICE1712_AC97_READY))
163
continue;
164
break;
165
}
166
outb(reg, ICEREG(ice, AC97_INDEX));
167
outw(val, ICEREG(ice, AC97_DATA));
168
old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
169
outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
170
for (tm = 0; tm < 0x10000; tm++)
171
if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
172
break;
173
}
174
175
static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
176
unsigned short reg)
177
{
178
struct snd_ice1712 *ice = ac97->private_data;
179
int tm;
180
unsigned char old_cmd = 0;
181
182
for (tm = 0; tm < 0x10000; tm++) {
183
old_cmd = inb(ICEREG(ice, AC97_CMD));
184
if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
185
continue;
186
if (!(old_cmd & ICE1712_AC97_READY))
187
continue;
188
break;
189
}
190
outb(reg, ICEREG(ice, AC97_INDEX));
191
outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
192
for (tm = 0; tm < 0x10000; tm++)
193
if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
194
break;
195
if (tm >= 0x10000) /* timeout */
196
return ~0;
197
return inw(ICEREG(ice, AC97_DATA));
198
}
199
200
/*
201
* pro ac97 section
202
*/
203
204
static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
205
unsigned short reg,
206
unsigned short val)
207
{
208
struct snd_ice1712 *ice = ac97->private_data;
209
int tm;
210
unsigned char old_cmd = 0;
211
212
for (tm = 0; tm < 0x10000; tm++) {
213
old_cmd = inb(ICEMT(ice, AC97_CMD));
214
if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
215
continue;
216
if (!(old_cmd & ICE1712_AC97_READY))
217
continue;
218
break;
219
}
220
outb(reg, ICEMT(ice, AC97_INDEX));
221
outw(val, ICEMT(ice, AC97_DATA));
222
old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
223
outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
224
for (tm = 0; tm < 0x10000; tm++)
225
if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
226
break;
227
}
228
229
230
static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
231
unsigned short reg)
232
{
233
struct snd_ice1712 *ice = ac97->private_data;
234
int tm;
235
unsigned char old_cmd = 0;
236
237
for (tm = 0; tm < 0x10000; tm++) {
238
old_cmd = inb(ICEMT(ice, AC97_CMD));
239
if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
240
continue;
241
if (!(old_cmd & ICE1712_AC97_READY))
242
continue;
243
break;
244
}
245
outb(reg, ICEMT(ice, AC97_INDEX));
246
outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
247
for (tm = 0; tm < 0x10000; tm++)
248
if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
249
break;
250
if (tm >= 0x10000) /* timeout */
251
return ~0;
252
return inw(ICEMT(ice, AC97_DATA));
253
}
254
255
/*
256
* consumer ac97 digital mix
257
*/
258
#define snd_ice1712_digmix_route_ac97_info snd_ctl_boolean_mono_info
259
260
static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
261
{
262
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
263
264
ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
265
return 0;
266
}
267
268
static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
269
{
270
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
271
unsigned char val, nval;
272
273
spin_lock_irq(&ice->reg_lock);
274
val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
275
nval = val & ~ICE1712_ROUTE_AC97;
276
if (ucontrol->value.integer.value[0])
277
nval |= ICE1712_ROUTE_AC97;
278
outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
279
spin_unlock_irq(&ice->reg_lock);
280
return val != nval;
281
}
282
283
static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 __devinitdata = {
284
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
285
.name = "Digital Mixer To AC97",
286
.info = snd_ice1712_digmix_route_ac97_info,
287
.get = snd_ice1712_digmix_route_ac97_get,
288
.put = snd_ice1712_digmix_route_ac97_put,
289
};
290
291
292
/*
293
* gpio operations
294
*/
295
static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
296
{
297
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
298
inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
299
}
300
301
static unsigned int snd_ice1712_get_gpio_dir(struct snd_ice1712 *ice)
302
{
303
return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION);
304
}
305
306
static unsigned int snd_ice1712_get_gpio_mask(struct snd_ice1712 *ice)
307
{
308
return snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK);
309
}
310
311
static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
312
{
313
snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
314
inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
315
}
316
317
static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
318
{
319
return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
320
}
321
322
static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
323
{
324
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
325
inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
326
}
327
328
/*
329
*
330
* CS8427 interface
331
*
332
*/
333
334
/*
335
* change the input clock selection
336
* spdif_clock = 1 - IEC958 input, 0 - Envy24
337
*/
338
static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
339
{
340
unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
341
unsigned char val, nval;
342
int res = 0;
343
344
snd_i2c_lock(ice->i2c);
345
if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
346
snd_i2c_unlock(ice->i2c);
347
return -EIO;
348
}
349
if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
350
snd_i2c_unlock(ice->i2c);
351
return -EIO;
352
}
353
nval = val & 0xf0;
354
if (spdif_clock)
355
nval |= 0x01;
356
else
357
nval |= 0x04;
358
if (val != nval) {
359
reg[1] = nval;
360
if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
361
res = -EIO;
362
} else {
363
res++;
364
}
365
}
366
snd_i2c_unlock(ice->i2c);
367
return res;
368
}
369
370
/*
371
* spdif callbacks
372
*/
373
static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
374
{
375
snd_cs8427_iec958_active(ice->cs8427, 1);
376
}
377
378
static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
379
{
380
snd_cs8427_iec958_active(ice->cs8427, 0);
381
}
382
383
static void setup_cs8427(struct snd_ice1712 *ice, int rate)
384
{
385
snd_cs8427_iec958_pcm(ice->cs8427, rate);
386
}
387
388
/*
389
* create and initialize callbacks for cs8427 interface
390
*/
391
int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
392
{
393
int err;
394
395
err = snd_cs8427_create(ice->i2c, addr,
396
(ice->cs8427_timeout * HZ) / 1000, &ice->cs8427);
397
if (err < 0) {
398
snd_printk(KERN_ERR "CS8427 initialization failed\n");
399
return err;
400
}
401
ice->spdif.ops.open = open_cs8427;
402
ice->spdif.ops.close = close_cs8427;
403
ice->spdif.ops.setup_rate = setup_cs8427;
404
return 0;
405
}
406
407
static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
408
{
409
/* change CS8427 clock source too */
410
if (ice->cs8427)
411
snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
412
/* notify ak4524 chip as well */
413
if (spdif_is_master) {
414
unsigned int i;
415
for (i = 0; i < ice->akm_codecs; i++) {
416
if (ice->akm[i].ops.set_rate_val)
417
ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
418
}
419
}
420
}
421
422
/*
423
* Interrupt handler
424
*/
425
426
static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id)
427
{
428
struct snd_ice1712 *ice = dev_id;
429
unsigned char status;
430
int handled = 0;
431
432
while (1) {
433
status = inb(ICEREG(ice, IRQSTAT));
434
if (status == 0)
435
break;
436
handled = 1;
437
if (status & ICE1712_IRQ_MPU1) {
438
if (ice->rmidi[0])
439
snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
440
outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
441
status &= ~ICE1712_IRQ_MPU1;
442
}
443
if (status & ICE1712_IRQ_TIMER)
444
outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
445
if (status & ICE1712_IRQ_MPU2) {
446
if (ice->rmidi[1])
447
snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data);
448
outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
449
status &= ~ICE1712_IRQ_MPU2;
450
}
451
if (status & ICE1712_IRQ_PROPCM) {
452
unsigned char mtstat = inb(ICEMT(ice, IRQ));
453
if (mtstat & ICE1712_MULTI_PBKSTATUS) {
454
if (ice->playback_pro_substream)
455
snd_pcm_period_elapsed(ice->playback_pro_substream);
456
outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
457
}
458
if (mtstat & ICE1712_MULTI_CAPSTATUS) {
459
if (ice->capture_pro_substream)
460
snd_pcm_period_elapsed(ice->capture_pro_substream);
461
outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
462
}
463
}
464
if (status & ICE1712_IRQ_FM)
465
outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
466
if (status & ICE1712_IRQ_PBKDS) {
467
u32 idx;
468
u16 pbkstatus;
469
struct snd_pcm_substream *substream;
470
pbkstatus = inw(ICEDS(ice, INTSTAT));
471
/* printk(KERN_DEBUG "pbkstatus = 0x%x\n", pbkstatus); */
472
for (idx = 0; idx < 6; idx++) {
473
if ((pbkstatus & (3 << (idx * 2))) == 0)
474
continue;
475
substream = ice->playback_con_substream_ds[idx];
476
if (substream != NULL)
477
snd_pcm_period_elapsed(substream);
478
outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
479
}
480
outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
481
}
482
if (status & ICE1712_IRQ_CONCAP) {
483
if (ice->capture_con_substream)
484
snd_pcm_period_elapsed(ice->capture_con_substream);
485
outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
486
}
487
if (status & ICE1712_IRQ_CONPBK) {
488
if (ice->playback_con_substream)
489
snd_pcm_period_elapsed(ice->playback_con_substream);
490
outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
491
}
492
}
493
return IRQ_RETVAL(handled);
494
}
495
496
497
/*
498
* PCM part - misc
499
*/
500
501
static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
502
struct snd_pcm_hw_params *hw_params)
503
{
504
return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
505
}
506
507
static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
508
{
509
return snd_pcm_lib_free_pages(substream);
510
}
511
512
/*
513
* PCM part - consumer I/O
514
*/
515
516
static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
517
int cmd)
518
{
519
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
520
int result = 0;
521
u32 tmp;
522
523
spin_lock(&ice->reg_lock);
524
tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
525
if (cmd == SNDRV_PCM_TRIGGER_START) {
526
tmp |= 1;
527
} else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
528
tmp &= ~1;
529
} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
530
tmp |= 2;
531
} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
532
tmp &= ~2;
533
} else {
534
result = -EINVAL;
535
}
536
snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
537
spin_unlock(&ice->reg_lock);
538
return result;
539
}
540
541
static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
542
int cmd)
543
{
544
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
545
int result = 0;
546
u32 tmp;
547
548
spin_lock(&ice->reg_lock);
549
tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
550
if (cmd == SNDRV_PCM_TRIGGER_START) {
551
tmp |= 1;
552
} else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
553
tmp &= ~1;
554
} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
555
tmp |= 2;
556
} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
557
tmp &= ~2;
558
} else {
559
result = -EINVAL;
560
}
561
snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
562
spin_unlock(&ice->reg_lock);
563
return result;
564
}
565
566
static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
567
int cmd)
568
{
569
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
570
int result = 0;
571
u8 tmp;
572
573
spin_lock(&ice->reg_lock);
574
tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
575
if (cmd == SNDRV_PCM_TRIGGER_START) {
576
tmp |= 1;
577
} else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
578
tmp &= ~1;
579
} else {
580
result = -EINVAL;
581
}
582
snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
583
spin_unlock(&ice->reg_lock);
584
return result;
585
}
586
587
static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
588
{
589
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
590
struct snd_pcm_runtime *runtime = substream->runtime;
591
u32 period_size, buf_size, rate, tmp;
592
593
period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
594
buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
595
tmp = 0x0000;
596
if (snd_pcm_format_width(runtime->format) == 16)
597
tmp |= 0x10;
598
if (runtime->channels == 2)
599
tmp |= 0x08;
600
rate = (runtime->rate * 8192) / 375;
601
if (rate > 0x000fffff)
602
rate = 0x000fffff;
603
spin_lock_irq(&ice->reg_lock);
604
outb(0, ice->ddma_port + 15);
605
outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
606
outl(runtime->dma_addr, ice->ddma_port + 0);
607
outw(buf_size, ice->ddma_port + 4);
608
snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
609
snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
610
snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
611
snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
612
snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
613
snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
614
snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
615
snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
616
spin_unlock_irq(&ice->reg_lock);
617
return 0;
618
}
619
620
static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
621
{
622
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
623
struct snd_pcm_runtime *runtime = substream->runtime;
624
u32 period_size, buf_size, rate, tmp, chn;
625
626
period_size = snd_pcm_lib_period_bytes(substream) - 1;
627
buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
628
tmp = 0x0064;
629
if (snd_pcm_format_width(runtime->format) == 16)
630
tmp &= ~0x04;
631
if (runtime->channels == 2)
632
tmp |= 0x08;
633
rate = (runtime->rate * 8192) / 375;
634
if (rate > 0x000fffff)
635
rate = 0x000fffff;
636
ice->playback_con_active_buf[substream->number] = 0;
637
ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
638
chn = substream->number * 2;
639
spin_lock_irq(&ice->reg_lock);
640
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
641
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
642
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
643
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
644
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
645
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
646
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
647
if (runtime->channels == 2) {
648
snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
649
snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
650
}
651
spin_unlock_irq(&ice->reg_lock);
652
return 0;
653
}
654
655
static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
656
{
657
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
658
struct snd_pcm_runtime *runtime = substream->runtime;
659
u32 period_size, buf_size;
660
u8 tmp;
661
662
period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
663
buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
664
tmp = 0x06;
665
if (snd_pcm_format_width(runtime->format) == 16)
666
tmp &= ~0x04;
667
if (runtime->channels == 2)
668
tmp &= ~0x02;
669
spin_lock_irq(&ice->reg_lock);
670
outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
671
outw(buf_size, ICEREG(ice, CONCAP_COUNT));
672
snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
673
snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
674
snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
675
spin_unlock_irq(&ice->reg_lock);
676
snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
677
return 0;
678
}
679
680
static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
681
{
682
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
683
struct snd_pcm_runtime *runtime = substream->runtime;
684
size_t ptr;
685
686
if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
687
return 0;
688
ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
689
if (ptr == runtime->buffer_size)
690
ptr = 0;
691
return bytes_to_frames(substream->runtime, ptr);
692
}
693
694
static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
695
{
696
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
697
u8 addr;
698
size_t ptr;
699
700
if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
701
return 0;
702
if (ice->playback_con_active_buf[substream->number])
703
addr = ICE1712_DSC_ADDR1;
704
else
705
addr = ICE1712_DSC_ADDR0;
706
ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
707
ice->playback_con_virt_addr[substream->number];
708
if (ptr == substream->runtime->buffer_size)
709
ptr = 0;
710
return bytes_to_frames(substream->runtime, ptr);
711
}
712
713
static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
714
{
715
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
716
size_t ptr;
717
718
if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
719
return 0;
720
ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
721
if (ptr == substream->runtime->buffer_size)
722
ptr = 0;
723
return bytes_to_frames(substream->runtime, ptr);
724
}
725
726
static const struct snd_pcm_hardware snd_ice1712_playback = {
727
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
728
SNDRV_PCM_INFO_BLOCK_TRANSFER |
729
SNDRV_PCM_INFO_MMAP_VALID |
730
SNDRV_PCM_INFO_PAUSE),
731
.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
732
.rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
733
.rate_min = 4000,
734
.rate_max = 48000,
735
.channels_min = 1,
736
.channels_max = 2,
737
.buffer_bytes_max = (64*1024),
738
.period_bytes_min = 64,
739
.period_bytes_max = (64*1024),
740
.periods_min = 1,
741
.periods_max = 1024,
742
.fifo_size = 0,
743
};
744
745
static const struct snd_pcm_hardware snd_ice1712_playback_ds = {
746
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
747
SNDRV_PCM_INFO_BLOCK_TRANSFER |
748
SNDRV_PCM_INFO_MMAP_VALID |
749
SNDRV_PCM_INFO_PAUSE),
750
.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
751
.rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
752
.rate_min = 4000,
753
.rate_max = 48000,
754
.channels_min = 1,
755
.channels_max = 2,
756
.buffer_bytes_max = (128*1024),
757
.period_bytes_min = 64,
758
.period_bytes_max = (128*1024),
759
.periods_min = 2,
760
.periods_max = 2,
761
.fifo_size = 0,
762
};
763
764
static const struct snd_pcm_hardware snd_ice1712_capture = {
765
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
766
SNDRV_PCM_INFO_BLOCK_TRANSFER |
767
SNDRV_PCM_INFO_MMAP_VALID),
768
.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
769
.rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
770
.rate_min = 4000,
771
.rate_max = 48000,
772
.channels_min = 1,
773
.channels_max = 2,
774
.buffer_bytes_max = (64*1024),
775
.period_bytes_min = 64,
776
.period_bytes_max = (64*1024),
777
.periods_min = 1,
778
.periods_max = 1024,
779
.fifo_size = 0,
780
};
781
782
static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
783
{
784
struct snd_pcm_runtime *runtime = substream->runtime;
785
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
786
787
ice->playback_con_substream = substream;
788
runtime->hw = snd_ice1712_playback;
789
return 0;
790
}
791
792
static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
793
{
794
struct snd_pcm_runtime *runtime = substream->runtime;
795
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
796
u32 tmp;
797
798
ice->playback_con_substream_ds[substream->number] = substream;
799
runtime->hw = snd_ice1712_playback_ds;
800
spin_lock_irq(&ice->reg_lock);
801
tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
802
outw(tmp, ICEDS(ice, INTMASK));
803
spin_unlock_irq(&ice->reg_lock);
804
return 0;
805
}
806
807
static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
808
{
809
struct snd_pcm_runtime *runtime = substream->runtime;
810
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
811
812
ice->capture_con_substream = substream;
813
runtime->hw = snd_ice1712_capture;
814
runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
815
if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
816
runtime->hw.rate_min = 48000;
817
return 0;
818
}
819
820
static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
821
{
822
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
823
824
ice->playback_con_substream = NULL;
825
return 0;
826
}
827
828
static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
829
{
830
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
831
u32 tmp;
832
833
spin_lock_irq(&ice->reg_lock);
834
tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
835
outw(tmp, ICEDS(ice, INTMASK));
836
spin_unlock_irq(&ice->reg_lock);
837
ice->playback_con_substream_ds[substream->number] = NULL;
838
return 0;
839
}
840
841
static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
842
{
843
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
844
845
ice->capture_con_substream = NULL;
846
return 0;
847
}
848
849
static struct snd_pcm_ops snd_ice1712_playback_ops = {
850
.open = snd_ice1712_playback_open,
851
.close = snd_ice1712_playback_close,
852
.ioctl = snd_pcm_lib_ioctl,
853
.hw_params = snd_ice1712_hw_params,
854
.hw_free = snd_ice1712_hw_free,
855
.prepare = snd_ice1712_playback_prepare,
856
.trigger = snd_ice1712_playback_trigger,
857
.pointer = snd_ice1712_playback_pointer,
858
};
859
860
static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
861
.open = snd_ice1712_playback_ds_open,
862
.close = snd_ice1712_playback_ds_close,
863
.ioctl = snd_pcm_lib_ioctl,
864
.hw_params = snd_ice1712_hw_params,
865
.hw_free = snd_ice1712_hw_free,
866
.prepare = snd_ice1712_playback_ds_prepare,
867
.trigger = snd_ice1712_playback_ds_trigger,
868
.pointer = snd_ice1712_playback_ds_pointer,
869
};
870
871
static struct snd_pcm_ops snd_ice1712_capture_ops = {
872
.open = snd_ice1712_capture_open,
873
.close = snd_ice1712_capture_close,
874
.ioctl = snd_pcm_lib_ioctl,
875
.hw_params = snd_ice1712_hw_params,
876
.hw_free = snd_ice1712_hw_free,
877
.prepare = snd_ice1712_capture_prepare,
878
.trigger = snd_ice1712_capture_trigger,
879
.pointer = snd_ice1712_capture_pointer,
880
};
881
882
static int __devinit snd_ice1712_pcm(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
883
{
884
struct snd_pcm *pcm;
885
int err;
886
887
if (rpcm)
888
*rpcm = NULL;
889
err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
890
if (err < 0)
891
return err;
892
893
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
894
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
895
896
pcm->private_data = ice;
897
pcm->info_flags = 0;
898
strcpy(pcm->name, "ICE1712 consumer");
899
ice->pcm = pcm;
900
901
snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
902
snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
903
904
if (rpcm)
905
*rpcm = pcm;
906
907
printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n");
908
909
return 0;
910
}
911
912
static int __devinit snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
913
{
914
struct snd_pcm *pcm;
915
int err;
916
917
if (rpcm)
918
*rpcm = NULL;
919
err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
920
if (err < 0)
921
return err;
922
923
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
924
925
pcm->private_data = ice;
926
pcm->info_flags = 0;
927
strcpy(pcm->name, "ICE1712 consumer (DS)");
928
ice->pcm_ds = pcm;
929
930
snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
931
snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
932
933
if (rpcm)
934
*rpcm = pcm;
935
936
return 0;
937
}
938
939
/*
940
* PCM code - professional part (multitrack)
941
*/
942
943
static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
944
32000, 44100, 48000, 64000, 88200, 96000 };
945
946
static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
947
.count = ARRAY_SIZE(rates),
948
.list = rates,
949
.mask = 0,
950
};
951
952
static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
953
int cmd)
954
{
955
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
956
switch (cmd) {
957
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
958
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
959
{
960
unsigned int what;
961
unsigned int old;
962
if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
963
return -EINVAL;
964
what = ICE1712_PLAYBACK_PAUSE;
965
snd_pcm_trigger_done(substream, substream);
966
spin_lock(&ice->reg_lock);
967
old = inl(ICEMT(ice, PLAYBACK_CONTROL));
968
if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
969
old |= what;
970
else
971
old &= ~what;
972
outl(old, ICEMT(ice, PLAYBACK_CONTROL));
973
spin_unlock(&ice->reg_lock);
974
break;
975
}
976
case SNDRV_PCM_TRIGGER_START:
977
case SNDRV_PCM_TRIGGER_STOP:
978
{
979
unsigned int what = 0;
980
unsigned int old;
981
struct snd_pcm_substream *s;
982
983
snd_pcm_group_for_each_entry(s, substream) {
984
if (s == ice->playback_pro_substream) {
985
what |= ICE1712_PLAYBACK_START;
986
snd_pcm_trigger_done(s, substream);
987
} else if (s == ice->capture_pro_substream) {
988
what |= ICE1712_CAPTURE_START_SHADOW;
989
snd_pcm_trigger_done(s, substream);
990
}
991
}
992
spin_lock(&ice->reg_lock);
993
old = inl(ICEMT(ice, PLAYBACK_CONTROL));
994
if (cmd == SNDRV_PCM_TRIGGER_START)
995
old |= what;
996
else
997
old &= ~what;
998
outl(old, ICEMT(ice, PLAYBACK_CONTROL));
999
spin_unlock(&ice->reg_lock);
1000
break;
1001
}
1002
default:
1003
return -EINVAL;
1004
}
1005
return 0;
1006
}
1007
1008
/*
1009
*/
1010
static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
1011
{
1012
unsigned long flags;
1013
unsigned char val, old;
1014
unsigned int i;
1015
1016
switch (rate) {
1017
case 8000: val = 6; break;
1018
case 9600: val = 3; break;
1019
case 11025: val = 10; break;
1020
case 12000: val = 2; break;
1021
case 16000: val = 5; break;
1022
case 22050: val = 9; break;
1023
case 24000: val = 1; break;
1024
case 32000: val = 4; break;
1025
case 44100: val = 8; break;
1026
case 48000: val = 0; break;
1027
case 64000: val = 15; break;
1028
case 88200: val = 11; break;
1029
case 96000: val = 7; break;
1030
default:
1031
snd_BUG();
1032
val = 0;
1033
rate = 48000;
1034
break;
1035
}
1036
1037
spin_lock_irqsave(&ice->reg_lock, flags);
1038
if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
1039
ICE1712_PLAYBACK_PAUSE|
1040
ICE1712_PLAYBACK_START)) {
1041
__out:
1042
spin_unlock_irqrestore(&ice->reg_lock, flags);
1043
return;
1044
}
1045
if (!force && is_pro_rate_locked(ice))
1046
goto __out;
1047
1048
old = inb(ICEMT(ice, RATE));
1049
if (!force && old == val)
1050
goto __out;
1051
outb(val, ICEMT(ice, RATE));
1052
spin_unlock_irqrestore(&ice->reg_lock, flags);
1053
1054
if (ice->gpio.set_pro_rate)
1055
ice->gpio.set_pro_rate(ice, rate);
1056
for (i = 0; i < ice->akm_codecs; i++) {
1057
if (ice->akm[i].ops.set_rate_val)
1058
ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
1059
}
1060
if (ice->spdif.ops.setup_rate)
1061
ice->spdif.ops.setup_rate(ice, rate);
1062
}
1063
1064
static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
1065
{
1066
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1067
1068
ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
1069
spin_lock_irq(&ice->reg_lock);
1070
outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
1071
outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
1072
outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
1073
spin_unlock_irq(&ice->reg_lock);
1074
1075
return 0;
1076
}
1077
1078
static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
1079
struct snd_pcm_hw_params *hw_params)
1080
{
1081
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1082
1083
snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1084
return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1085
}
1086
1087
static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
1088
{
1089
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1090
1091
ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
1092
spin_lock_irq(&ice->reg_lock);
1093
outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
1094
outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
1095
outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
1096
spin_unlock_irq(&ice->reg_lock);
1097
return 0;
1098
}
1099
1100
static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
1101
struct snd_pcm_hw_params *hw_params)
1102
{
1103
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1104
1105
snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1106
return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1107
}
1108
1109
static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
1110
{
1111
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1112
size_t ptr;
1113
1114
if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
1115
return 0;
1116
ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
1117
if (ptr == substream->runtime->buffer_size)
1118
ptr = 0;
1119
return bytes_to_frames(substream->runtime, ptr);
1120
}
1121
1122
static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
1123
{
1124
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1125
size_t ptr;
1126
1127
if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
1128
return 0;
1129
ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
1130
if (ptr == substream->runtime->buffer_size)
1131
ptr = 0;
1132
return bytes_to_frames(substream->runtime, ptr);
1133
}
1134
1135
static const struct snd_pcm_hardware snd_ice1712_playback_pro = {
1136
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1137
SNDRV_PCM_INFO_BLOCK_TRANSFER |
1138
SNDRV_PCM_INFO_MMAP_VALID |
1139
SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1140
.formats = SNDRV_PCM_FMTBIT_S32_LE,
1141
.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1142
.rate_min = 4000,
1143
.rate_max = 96000,
1144
.channels_min = 10,
1145
.channels_max = 10,
1146
.buffer_bytes_max = (256*1024),
1147
.period_bytes_min = 10 * 4 * 2,
1148
.period_bytes_max = 131040,
1149
.periods_min = 1,
1150
.periods_max = 1024,
1151
.fifo_size = 0,
1152
};
1153
1154
static const struct snd_pcm_hardware snd_ice1712_capture_pro = {
1155
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1156
SNDRV_PCM_INFO_BLOCK_TRANSFER |
1157
SNDRV_PCM_INFO_MMAP_VALID |
1158
SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1159
.formats = SNDRV_PCM_FMTBIT_S32_LE,
1160
.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1161
.rate_min = 4000,
1162
.rate_max = 96000,
1163
.channels_min = 12,
1164
.channels_max = 12,
1165
.buffer_bytes_max = (256*1024),
1166
.period_bytes_min = 12 * 4 * 2,
1167
.period_bytes_max = 131040,
1168
.periods_min = 1,
1169
.periods_max = 1024,
1170
.fifo_size = 0,
1171
};
1172
1173
static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
1174
{
1175
struct snd_pcm_runtime *runtime = substream->runtime;
1176
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1177
1178
ice->playback_pro_substream = substream;
1179
runtime->hw = snd_ice1712_playback_pro;
1180
snd_pcm_set_sync(substream);
1181
snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1182
snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1183
if (is_pro_rate_locked(ice)) {
1184
runtime->hw.rate_min = PRO_RATE_DEFAULT;
1185
runtime->hw.rate_max = PRO_RATE_DEFAULT;
1186
}
1187
1188
if (ice->spdif.ops.open)
1189
ice->spdif.ops.open(ice, substream);
1190
1191
return 0;
1192
}
1193
1194
static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
1195
{
1196
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1197
struct snd_pcm_runtime *runtime = substream->runtime;
1198
1199
ice->capture_pro_substream = substream;
1200
runtime->hw = snd_ice1712_capture_pro;
1201
snd_pcm_set_sync(substream);
1202
snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1203
snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1204
if (is_pro_rate_locked(ice)) {
1205
runtime->hw.rate_min = PRO_RATE_DEFAULT;
1206
runtime->hw.rate_max = PRO_RATE_DEFAULT;
1207
}
1208
1209
return 0;
1210
}
1211
1212
static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
1213
{
1214
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1215
1216
if (PRO_RATE_RESET)
1217
snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1218
ice->playback_pro_substream = NULL;
1219
if (ice->spdif.ops.close)
1220
ice->spdif.ops.close(ice, substream);
1221
1222
return 0;
1223
}
1224
1225
static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
1226
{
1227
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1228
1229
if (PRO_RATE_RESET)
1230
snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1231
ice->capture_pro_substream = NULL;
1232
return 0;
1233
}
1234
1235
static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
1236
.open = snd_ice1712_playback_pro_open,
1237
.close = snd_ice1712_playback_pro_close,
1238
.ioctl = snd_pcm_lib_ioctl,
1239
.hw_params = snd_ice1712_playback_pro_hw_params,
1240
.hw_free = snd_ice1712_hw_free,
1241
.prepare = snd_ice1712_playback_pro_prepare,
1242
.trigger = snd_ice1712_pro_trigger,
1243
.pointer = snd_ice1712_playback_pro_pointer,
1244
};
1245
1246
static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
1247
.open = snd_ice1712_capture_pro_open,
1248
.close = snd_ice1712_capture_pro_close,
1249
.ioctl = snd_pcm_lib_ioctl,
1250
.hw_params = snd_ice1712_capture_pro_hw_params,
1251
.hw_free = snd_ice1712_hw_free,
1252
.prepare = snd_ice1712_capture_pro_prepare,
1253
.trigger = snd_ice1712_pro_trigger,
1254
.pointer = snd_ice1712_capture_pro_pointer,
1255
};
1256
1257
static int __devinit snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
1258
{
1259
struct snd_pcm *pcm;
1260
int err;
1261
1262
if (rpcm)
1263
*rpcm = NULL;
1264
err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
1265
if (err < 0)
1266
return err;
1267
1268
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
1269
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
1270
1271
pcm->private_data = ice;
1272
pcm->info_flags = 0;
1273
strcpy(pcm->name, "ICE1712 multi");
1274
1275
snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1276
snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
1277
1278
ice->pcm_pro = pcm;
1279
if (rpcm)
1280
*rpcm = pcm;
1281
1282
if (ice->cs8427) {
1283
/* assign channels to iec958 */
1284
err = snd_cs8427_iec958_build(ice->cs8427,
1285
pcm->streams[0].substream,
1286
pcm->streams[1].substream);
1287
if (err < 0)
1288
return err;
1289
}
1290
1291
err = snd_ice1712_build_pro_mixer(ice);
1292
if (err < 0)
1293
return err;
1294
return 0;
1295
}
1296
1297
/*
1298
* Mixer section
1299
*/
1300
1301
static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
1302
{
1303
unsigned int vol = ice->pro_volumes[index];
1304
unsigned short val = 0;
1305
1306
val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
1307
val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
1308
outb(index, ICEMT(ice, MONITOR_INDEX));
1309
outw(val, ICEMT(ice, MONITOR_VOLUME));
1310
}
1311
1312
#define snd_ice1712_pro_mixer_switch_info snd_ctl_boolean_stereo_info
1313
1314
static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1315
{
1316
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1317
int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1318
kcontrol->private_value;
1319
1320
spin_lock_irq(&ice->reg_lock);
1321
ucontrol->value.integer.value[0] =
1322
!((ice->pro_volumes[priv_idx] >> 15) & 1);
1323
ucontrol->value.integer.value[1] =
1324
!((ice->pro_volumes[priv_idx] >> 31) & 1);
1325
spin_unlock_irq(&ice->reg_lock);
1326
return 0;
1327
}
1328
1329
static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1330
{
1331
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1332
int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1333
kcontrol->private_value;
1334
unsigned int nval, change;
1335
1336
nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
1337
(ucontrol->value.integer.value[1] ? 0 : 0x80000000);
1338
spin_lock_irq(&ice->reg_lock);
1339
nval |= ice->pro_volumes[priv_idx] & ~0x80008000;
1340
change = nval != ice->pro_volumes[priv_idx];
1341
ice->pro_volumes[priv_idx] = nval;
1342
snd_ice1712_update_volume(ice, priv_idx);
1343
spin_unlock_irq(&ice->reg_lock);
1344
return change;
1345
}
1346
1347
static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1348
{
1349
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1350
uinfo->count = 2;
1351
uinfo->value.integer.min = 0;
1352
uinfo->value.integer.max = 96;
1353
return 0;
1354
}
1355
1356
static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1357
{
1358
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1359
int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1360
kcontrol->private_value;
1361
1362
spin_lock_irq(&ice->reg_lock);
1363
ucontrol->value.integer.value[0] =
1364
(ice->pro_volumes[priv_idx] >> 0) & 127;
1365
ucontrol->value.integer.value[1] =
1366
(ice->pro_volumes[priv_idx] >> 16) & 127;
1367
spin_unlock_irq(&ice->reg_lock);
1368
return 0;
1369
}
1370
1371
static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1372
{
1373
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1374
int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1375
kcontrol->private_value;
1376
unsigned int nval, change;
1377
1378
nval = (ucontrol->value.integer.value[0] & 127) |
1379
((ucontrol->value.integer.value[1] & 127) << 16);
1380
spin_lock_irq(&ice->reg_lock);
1381
nval |= ice->pro_volumes[priv_idx] & ~0x007f007f;
1382
change = nval != ice->pro_volumes[priv_idx];
1383
ice->pro_volumes[priv_idx] = nval;
1384
snd_ice1712_update_volume(ice, priv_idx);
1385
spin_unlock_irq(&ice->reg_lock);
1386
return change;
1387
}
1388
1389
static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0);
1390
1391
static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] __devinitdata = {
1392
{
1393
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1394
.name = "Multi Playback Switch",
1395
.info = snd_ice1712_pro_mixer_switch_info,
1396
.get = snd_ice1712_pro_mixer_switch_get,
1397
.put = snd_ice1712_pro_mixer_switch_put,
1398
.private_value = 0,
1399
.count = 10,
1400
},
1401
{
1402
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1403
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1404
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1405
.name = "Multi Playback Volume",
1406
.info = snd_ice1712_pro_mixer_volume_info,
1407
.get = snd_ice1712_pro_mixer_volume_get,
1408
.put = snd_ice1712_pro_mixer_volume_put,
1409
.private_value = 0,
1410
.count = 10,
1411
.tlv = { .p = db_scale_playback }
1412
},
1413
};
1414
1415
static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch __devinitdata = {
1416
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1417
.name = "H/W Multi Capture Switch",
1418
.info = snd_ice1712_pro_mixer_switch_info,
1419
.get = snd_ice1712_pro_mixer_switch_get,
1420
.put = snd_ice1712_pro_mixer_switch_put,
1421
.private_value = 10,
1422
};
1423
1424
static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch __devinitdata = {
1425
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1426
.name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, SWITCH),
1427
.info = snd_ice1712_pro_mixer_switch_info,
1428
.get = snd_ice1712_pro_mixer_switch_get,
1429
.put = snd_ice1712_pro_mixer_switch_put,
1430
.private_value = 18,
1431
.count = 2,
1432
};
1433
1434
static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume __devinitdata = {
1435
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1436
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1437
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1438
.name = "H/W Multi Capture Volume",
1439
.info = snd_ice1712_pro_mixer_volume_info,
1440
.get = snd_ice1712_pro_mixer_volume_get,
1441
.put = snd_ice1712_pro_mixer_volume_put,
1442
.private_value = 10,
1443
.tlv = { .p = db_scale_playback }
1444
};
1445
1446
static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume __devinitdata = {
1447
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1448
.name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, VOLUME),
1449
.info = snd_ice1712_pro_mixer_volume_info,
1450
.get = snd_ice1712_pro_mixer_volume_get,
1451
.put = snd_ice1712_pro_mixer_volume_put,
1452
.private_value = 18,
1453
.count = 2,
1454
};
1455
1456
static int __devinit snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
1457
{
1458
struct snd_card *card = ice->card;
1459
unsigned int idx;
1460
int err;
1461
1462
/* multi-channel mixer */
1463
for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
1464
err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
1465
if (err < 0)
1466
return err;
1467
}
1468
1469
if (ice->num_total_adcs > 0) {
1470
struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
1471
tmp.count = ice->num_total_adcs;
1472
err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1473
if (err < 0)
1474
return err;
1475
}
1476
1477
err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
1478
if (err < 0)
1479
return err;
1480
1481
if (ice->num_total_adcs > 0) {
1482
struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
1483
tmp.count = ice->num_total_adcs;
1484
err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1485
if (err < 0)
1486
return err;
1487
}
1488
1489
err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
1490
if (err < 0)
1491
return err;
1492
1493
/* initialize volumes */
1494
for (idx = 0; idx < 10; idx++) {
1495
ice->pro_volumes[idx] = 0x80008000; /* mute */
1496
snd_ice1712_update_volume(ice, idx);
1497
}
1498
for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
1499
ice->pro_volumes[idx] = 0x80008000; /* mute */
1500
snd_ice1712_update_volume(ice, idx);
1501
}
1502
for (idx = 18; idx < 20; idx++) {
1503
ice->pro_volumes[idx] = 0x80008000; /* mute */
1504
snd_ice1712_update_volume(ice, idx);
1505
}
1506
return 0;
1507
}
1508
1509
static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
1510
{
1511
struct snd_ice1712 *ice = ac97->private_data;
1512
ice->ac97 = NULL;
1513
}
1514
1515
static int __devinit snd_ice1712_ac97_mixer(struct snd_ice1712 *ice)
1516
{
1517
int err, bus_num = 0;
1518
struct snd_ac97_template ac97;
1519
struct snd_ac97_bus *pbus;
1520
static struct snd_ac97_bus_ops con_ops = {
1521
.write = snd_ice1712_ac97_write,
1522
.read = snd_ice1712_ac97_read,
1523
};
1524
static struct snd_ac97_bus_ops pro_ops = {
1525
.write = snd_ice1712_pro_ac97_write,
1526
.read = snd_ice1712_pro_ac97_read,
1527
};
1528
1529
if (ice_has_con_ac97(ice)) {
1530
err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus);
1531
if (err < 0)
1532
return err;
1533
memset(&ac97, 0, sizeof(ac97));
1534
ac97.private_data = ice;
1535
ac97.private_free = snd_ice1712_mixer_free_ac97;
1536
err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1537
if (err < 0)
1538
printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n");
1539
else {
1540
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice));
1541
if (err < 0)
1542
return err;
1543
return 0;
1544
}
1545
}
1546
1547
if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
1548
err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus);
1549
if (err < 0)
1550
return err;
1551
memset(&ac97, 0, sizeof(ac97));
1552
ac97.private_data = ice;
1553
ac97.private_free = snd_ice1712_mixer_free_ac97;
1554
err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1555
if (err < 0)
1556
printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1557
else
1558
return 0;
1559
}
1560
/* I2S mixer only */
1561
strcat(ice->card->mixername, "ICE1712 - multitrack");
1562
return 0;
1563
}
1564
1565
/*
1566
*
1567
*/
1568
1569
static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
1570
{
1571
return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
1572
}
1573
1574
static void snd_ice1712_proc_read(struct snd_info_entry *entry,
1575
struct snd_info_buffer *buffer)
1576
{
1577
struct snd_ice1712 *ice = entry->private_data;
1578
unsigned int idx;
1579
1580
snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1581
snd_iprintf(buffer, "EEPROM:\n");
1582
1583
snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1584
snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1585
snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1586
snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
1587
snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
1588
snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
1589
snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
1590
snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1591
snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1592
snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1593
snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
1594
snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
1595
snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
1596
snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
1597
for (idx = 0; idx < 4; idx++)
1598
snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
1599
for (idx = 0; idx < 4; idx++)
1600
snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
1601
for (idx = 0x1c; idx < ice->eeprom.size; idx++)
1602
snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1603
1604
snd_iprintf(buffer, "\nRegisters:\n");
1605
snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
1606
snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
1607
snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
1608
snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
1609
snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
1610
snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
1611
snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
1612
}
1613
1614
static void __devinit snd_ice1712_proc_init(struct snd_ice1712 *ice)
1615
{
1616
struct snd_info_entry *entry;
1617
1618
if (!snd_card_proc_new(ice->card, "ice1712", &entry))
1619
snd_info_set_text_ops(entry, ice, snd_ice1712_proc_read);
1620
}
1621
1622
/*
1623
*
1624
*/
1625
1626
static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
1627
struct snd_ctl_elem_info *uinfo)
1628
{
1629
uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1630
uinfo->count = sizeof(struct snd_ice1712_eeprom);
1631
return 0;
1632
}
1633
1634
static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
1635
struct snd_ctl_elem_value *ucontrol)
1636
{
1637
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1638
1639
memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1640
return 0;
1641
}
1642
1643
static struct snd_kcontrol_new snd_ice1712_eeprom __devinitdata = {
1644
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
1645
.name = "ICE1712 EEPROM",
1646
.access = SNDRV_CTL_ELEM_ACCESS_READ,
1647
.info = snd_ice1712_eeprom_info,
1648
.get = snd_ice1712_eeprom_get
1649
};
1650
1651
/*
1652
*/
1653
static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
1654
struct snd_ctl_elem_info *uinfo)
1655
{
1656
uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1657
uinfo->count = 1;
1658
return 0;
1659
}
1660
1661
static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
1662
struct snd_ctl_elem_value *ucontrol)
1663
{
1664
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1665
if (ice->spdif.ops.default_get)
1666
ice->spdif.ops.default_get(ice, ucontrol);
1667
return 0;
1668
}
1669
1670
static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
1671
struct snd_ctl_elem_value *ucontrol)
1672
{
1673
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1674
if (ice->spdif.ops.default_put)
1675
return ice->spdif.ops.default_put(ice, ucontrol);
1676
return 0;
1677
}
1678
1679
static struct snd_kcontrol_new snd_ice1712_spdif_default __devinitdata =
1680
{
1681
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
1682
.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1683
.info = snd_ice1712_spdif_info,
1684
.get = snd_ice1712_spdif_default_get,
1685
.put = snd_ice1712_spdif_default_put
1686
};
1687
1688
static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1689
struct snd_ctl_elem_value *ucontrol)
1690
{
1691
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1692
if (ice->spdif.ops.default_get) {
1693
ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1694
IEC958_AES0_PROFESSIONAL |
1695
IEC958_AES0_CON_NOT_COPYRIGHT |
1696
IEC958_AES0_CON_EMPHASIS;
1697
ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1698
IEC958_AES1_CON_CATEGORY;
1699
ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1700
} else {
1701
ucontrol->value.iec958.status[0] = 0xff;
1702
ucontrol->value.iec958.status[1] = 0xff;
1703
ucontrol->value.iec958.status[2] = 0xff;
1704
ucontrol->value.iec958.status[3] = 0xff;
1705
ucontrol->value.iec958.status[4] = 0xff;
1706
}
1707
return 0;
1708
}
1709
1710
static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1711
struct snd_ctl_elem_value *ucontrol)
1712
{
1713
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1714
if (ice->spdif.ops.default_get) {
1715
ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1716
IEC958_AES0_PROFESSIONAL |
1717
IEC958_AES0_PRO_FS |
1718
IEC958_AES0_PRO_EMPHASIS;
1719
ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
1720
} else {
1721
ucontrol->value.iec958.status[0] = 0xff;
1722
ucontrol->value.iec958.status[1] = 0xff;
1723
ucontrol->value.iec958.status[2] = 0xff;
1724
ucontrol->value.iec958.status[3] = 0xff;
1725
ucontrol->value.iec958.status[4] = 0xff;
1726
}
1727
return 0;
1728
}
1729
1730
static struct snd_kcontrol_new snd_ice1712_spdif_maskc __devinitdata =
1731
{
1732
.access = SNDRV_CTL_ELEM_ACCESS_READ,
1733
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
1734
.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1735
.info = snd_ice1712_spdif_info,
1736
.get = snd_ice1712_spdif_maskc_get,
1737
};
1738
1739
static struct snd_kcontrol_new snd_ice1712_spdif_maskp __devinitdata =
1740
{
1741
.access = SNDRV_CTL_ELEM_ACCESS_READ,
1742
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
1743
.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1744
.info = snd_ice1712_spdif_info,
1745
.get = snd_ice1712_spdif_maskp_get,
1746
};
1747
1748
static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
1749
struct snd_ctl_elem_value *ucontrol)
1750
{
1751
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1752
if (ice->spdif.ops.stream_get)
1753
ice->spdif.ops.stream_get(ice, ucontrol);
1754
return 0;
1755
}
1756
1757
static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
1758
struct snd_ctl_elem_value *ucontrol)
1759
{
1760
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1761
if (ice->spdif.ops.stream_put)
1762
return ice->spdif.ops.stream_put(ice, ucontrol);
1763
return 0;
1764
}
1765
1766
static struct snd_kcontrol_new snd_ice1712_spdif_stream __devinitdata =
1767
{
1768
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1769
SNDRV_CTL_ELEM_ACCESS_INACTIVE),
1770
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
1771
.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1772
.info = snd_ice1712_spdif_info,
1773
.get = snd_ice1712_spdif_stream_get,
1774
.put = snd_ice1712_spdif_stream_put
1775
};
1776
1777
int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
1778
struct snd_ctl_elem_value *ucontrol)
1779
{
1780
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1781
unsigned char mask = kcontrol->private_value & 0xff;
1782
int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1783
1784
snd_ice1712_save_gpio_status(ice);
1785
ucontrol->value.integer.value[0] =
1786
(snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
1787
snd_ice1712_restore_gpio_status(ice);
1788
return 0;
1789
}
1790
1791
int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1792
struct snd_ctl_elem_value *ucontrol)
1793
{
1794
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1795
unsigned char mask = kcontrol->private_value & 0xff;
1796
int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1797
unsigned int val, nval;
1798
1799
if (kcontrol->private_value & (1 << 31))
1800
return -EPERM;
1801
nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
1802
snd_ice1712_save_gpio_status(ice);
1803
val = snd_ice1712_gpio_read(ice);
1804
nval |= val & ~mask;
1805
if (val != nval)
1806
snd_ice1712_gpio_write(ice, nval);
1807
snd_ice1712_restore_gpio_status(ice);
1808
return val != nval;
1809
}
1810
1811
/*
1812
* rate
1813
*/
1814
static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1815
struct snd_ctl_elem_info *uinfo)
1816
{
1817
static const char * const texts[] = {
1818
"8000", /* 0: 6 */
1819
"9600", /* 1: 3 */
1820
"11025", /* 2: 10 */
1821
"12000", /* 3: 2 */
1822
"16000", /* 4: 5 */
1823
"22050", /* 5: 9 */
1824
"24000", /* 6: 1 */
1825
"32000", /* 7: 4 */
1826
"44100", /* 8: 8 */
1827
"48000", /* 9: 0 */
1828
"64000", /* 10: 15 */
1829
"88200", /* 11: 11 */
1830
"96000", /* 12: 7 */
1831
"IEC958 Input", /* 13: -- */
1832
};
1833
uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1834
uinfo->count = 1;
1835
uinfo->value.enumerated.items = 14;
1836
if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1837
uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1838
strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1839
return 0;
1840
}
1841
1842
static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1843
struct snd_ctl_elem_value *ucontrol)
1844
{
1845
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1846
static const unsigned char xlate[16] = {
1847
9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
1848
};
1849
unsigned char val;
1850
1851
spin_lock_irq(&ice->reg_lock);
1852
if (is_spdif_master(ice)) {
1853
ucontrol->value.enumerated.item[0] = 13;
1854
} else {
1855
val = xlate[inb(ICEMT(ice, RATE)) & 15];
1856
if (val == 255) {
1857
snd_BUG();
1858
val = 0;
1859
}
1860
ucontrol->value.enumerated.item[0] = val;
1861
}
1862
spin_unlock_irq(&ice->reg_lock);
1863
return 0;
1864
}
1865
1866
static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1867
struct snd_ctl_elem_value *ucontrol)
1868
{
1869
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1870
static const unsigned int xrate[13] = {
1871
8000, 9600, 11025, 12000, 16000, 22050, 24000,
1872
32000, 44100, 48000, 64000, 88200, 96000
1873
};
1874
unsigned char oval;
1875
int change = 0;
1876
1877
spin_lock_irq(&ice->reg_lock);
1878
oval = inb(ICEMT(ice, RATE));
1879
if (ucontrol->value.enumerated.item[0] == 13) {
1880
outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
1881
} else {
1882
PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1883
spin_unlock_irq(&ice->reg_lock);
1884
snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1885
spin_lock_irq(&ice->reg_lock);
1886
}
1887
change = inb(ICEMT(ice, RATE)) != oval;
1888
spin_unlock_irq(&ice->reg_lock);
1889
1890
if ((oval & ICE1712_SPDIF_MASTER) !=
1891
(inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
1892
snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
1893
1894
return change;
1895
}
1896
1897
static struct snd_kcontrol_new snd_ice1712_pro_internal_clock __devinitdata = {
1898
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1899
.name = "Multi Track Internal Clock",
1900
.info = snd_ice1712_pro_internal_clock_info,
1901
.get = snd_ice1712_pro_internal_clock_get,
1902
.put = snd_ice1712_pro_internal_clock_put
1903
};
1904
1905
static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
1906
struct snd_ctl_elem_info *uinfo)
1907
{
1908
static const char * const texts[] = {
1909
"8000", /* 0: 6 */
1910
"9600", /* 1: 3 */
1911
"11025", /* 2: 10 */
1912
"12000", /* 3: 2 */
1913
"16000", /* 4: 5 */
1914
"22050", /* 5: 9 */
1915
"24000", /* 6: 1 */
1916
"32000", /* 7: 4 */
1917
"44100", /* 8: 8 */
1918
"48000", /* 9: 0 */
1919
"64000", /* 10: 15 */
1920
"88200", /* 11: 11 */
1921
"96000", /* 12: 7 */
1922
/* "IEC958 Input", 13: -- */
1923
};
1924
uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1925
uinfo->count = 1;
1926
uinfo->value.enumerated.items = 13;
1927
if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1928
uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1929
strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1930
return 0;
1931
}
1932
1933
static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
1934
struct snd_ctl_elem_value *ucontrol)
1935
{
1936
int val;
1937
static const unsigned int xrate[13] = {
1938
8000, 9600, 11025, 12000, 16000, 22050, 24000,
1939
32000, 44100, 48000, 64000, 88200, 96000
1940
};
1941
1942
for (val = 0; val < 13; val++) {
1943
if (xrate[val] == PRO_RATE_DEFAULT)
1944
break;
1945
}
1946
1947
ucontrol->value.enumerated.item[0] = val;
1948
return 0;
1949
}
1950
1951
static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
1952
struct snd_ctl_elem_value *ucontrol)
1953
{
1954
static const unsigned int xrate[13] = {
1955
8000, 9600, 11025, 12000, 16000, 22050, 24000,
1956
32000, 44100, 48000, 64000, 88200, 96000
1957
};
1958
unsigned char oval;
1959
int change = 0;
1960
1961
oval = PRO_RATE_DEFAULT;
1962
PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1963
change = PRO_RATE_DEFAULT != oval;
1964
1965
return change;
1966
}
1967
1968
static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default __devinitdata = {
1969
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1970
.name = "Multi Track Internal Clock Default",
1971
.info = snd_ice1712_pro_internal_clock_default_info,
1972
.get = snd_ice1712_pro_internal_clock_default_get,
1973
.put = snd_ice1712_pro_internal_clock_default_put
1974
};
1975
1976
#define snd_ice1712_pro_rate_locking_info snd_ctl_boolean_mono_info
1977
1978
static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1979
struct snd_ctl_elem_value *ucontrol)
1980
{
1981
ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1982
return 0;
1983
}
1984
1985
static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1986
struct snd_ctl_elem_value *ucontrol)
1987
{
1988
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1989
int change = 0, nval;
1990
1991
nval = ucontrol->value.integer.value[0] ? 1 : 0;
1992
spin_lock_irq(&ice->reg_lock);
1993
change = PRO_RATE_LOCKED != nval;
1994
PRO_RATE_LOCKED = nval;
1995
spin_unlock_irq(&ice->reg_lock);
1996
return change;
1997
}
1998
1999
static struct snd_kcontrol_new snd_ice1712_pro_rate_locking __devinitdata = {
2000
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2001
.name = "Multi Track Rate Locking",
2002
.info = snd_ice1712_pro_rate_locking_info,
2003
.get = snd_ice1712_pro_rate_locking_get,
2004
.put = snd_ice1712_pro_rate_locking_put
2005
};
2006
2007
#define snd_ice1712_pro_rate_reset_info snd_ctl_boolean_mono_info
2008
2009
static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
2010
struct snd_ctl_elem_value *ucontrol)
2011
{
2012
ucontrol->value.integer.value[0] = PRO_RATE_RESET;
2013
return 0;
2014
}
2015
2016
static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
2017
struct snd_ctl_elem_value *ucontrol)
2018
{
2019
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2020
int change = 0, nval;
2021
2022
nval = ucontrol->value.integer.value[0] ? 1 : 0;
2023
spin_lock_irq(&ice->reg_lock);
2024
change = PRO_RATE_RESET != nval;
2025
PRO_RATE_RESET = nval;
2026
spin_unlock_irq(&ice->reg_lock);
2027
return change;
2028
}
2029
2030
static struct snd_kcontrol_new snd_ice1712_pro_rate_reset __devinitdata = {
2031
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2032
.name = "Multi Track Rate Reset",
2033
.info = snd_ice1712_pro_rate_reset_info,
2034
.get = snd_ice1712_pro_rate_reset_get,
2035
.put = snd_ice1712_pro_rate_reset_put
2036
};
2037
2038
/*
2039
* routing
2040
*/
2041
static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
2042
struct snd_ctl_elem_info *uinfo)
2043
{
2044
static const char * const texts[] = {
2045
"PCM Out", /* 0 */
2046
"H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
2047
"H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
2048
"IEC958 In L", "IEC958 In R", /* 9-10 */
2049
"Digital Mixer", /* 11 - optional */
2050
};
2051
2052
uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2053
uinfo->count = 1;
2054
uinfo->value.enumerated.items =
2055
snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
2056
if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2057
uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2058
strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2059
return 0;
2060
}
2061
2062
static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2063
struct snd_ctl_elem_value *ucontrol)
2064
{
2065
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2066
int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2067
unsigned int val, cval;
2068
2069
spin_lock_irq(&ice->reg_lock);
2070
val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2071
cval = inl(ICEMT(ice, ROUTE_CAPTURE));
2072
spin_unlock_irq(&ice->reg_lock);
2073
2074
val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
2075
val &= 3;
2076
cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
2077
if (val == 1 && idx < 2)
2078
ucontrol->value.enumerated.item[0] = 11;
2079
else if (val == 2)
2080
ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2081
else if (val == 3)
2082
ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2083
else
2084
ucontrol->value.enumerated.item[0] = 0;
2085
return 0;
2086
}
2087
2088
static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2089
struct snd_ctl_elem_value *ucontrol)
2090
{
2091
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2092
int change, shift;
2093
int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2094
unsigned int val, old_val, nval;
2095
2096
/* update PSDOUT */
2097
if (ucontrol->value.enumerated.item[0] >= 11)
2098
nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
2099
else if (ucontrol->value.enumerated.item[0] >= 9)
2100
nval = 3; /* spdif in */
2101
else if (ucontrol->value.enumerated.item[0] >= 1)
2102
nval = 2; /* analog in */
2103
else
2104
nval = 0; /* pcm */
2105
shift = ((idx % 2) * 8) + ((idx / 2) * 2);
2106
spin_lock_irq(&ice->reg_lock);
2107
val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2108
val &= ~(0x03 << shift);
2109
val |= nval << shift;
2110
change = val != old_val;
2111
if (change)
2112
outw(val, ICEMT(ice, ROUTE_PSDOUT03));
2113
spin_unlock_irq(&ice->reg_lock);
2114
if (nval < 2) /* dig mixer of pcm */
2115
return change;
2116
2117
/* update CAPTURE */
2118
spin_lock_irq(&ice->reg_lock);
2119
val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
2120
shift = ((idx / 2) * 8) + ((idx % 2) * 4);
2121
if (nval == 2) { /* analog in */
2122
nval = ucontrol->value.enumerated.item[0] - 1;
2123
val &= ~(0x07 << shift);
2124
val |= nval << shift;
2125
} else { /* spdif in */
2126
nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2127
val &= ~(0x08 << shift);
2128
val |= nval << shift;
2129
}
2130
if (val != old_val) {
2131
change = 1;
2132
outl(val, ICEMT(ice, ROUTE_CAPTURE));
2133
}
2134
spin_unlock_irq(&ice->reg_lock);
2135
return change;
2136
}
2137
2138
static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2139
struct snd_ctl_elem_value *ucontrol)
2140
{
2141
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2142
int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2143
unsigned int val, cval;
2144
val = inw(ICEMT(ice, ROUTE_SPDOUT));
2145
cval = (val >> (idx * 4 + 8)) & 0x0f;
2146
val = (val >> (idx * 2)) & 0x03;
2147
if (val == 1)
2148
ucontrol->value.enumerated.item[0] = 11;
2149
else if (val == 2)
2150
ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2151
else if (val == 3)
2152
ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2153
else
2154
ucontrol->value.enumerated.item[0] = 0;
2155
return 0;
2156
}
2157
2158
static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2159
struct snd_ctl_elem_value *ucontrol)
2160
{
2161
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2162
int change, shift;
2163
int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2164
unsigned int val, old_val, nval;
2165
2166
/* update SPDOUT */
2167
spin_lock_irq(&ice->reg_lock);
2168
val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
2169
if (ucontrol->value.enumerated.item[0] >= 11)
2170
nval = 1;
2171
else if (ucontrol->value.enumerated.item[0] >= 9)
2172
nval = 3;
2173
else if (ucontrol->value.enumerated.item[0] >= 1)
2174
nval = 2;
2175
else
2176
nval = 0;
2177
shift = idx * 2;
2178
val &= ~(0x03 << shift);
2179
val |= nval << shift;
2180
shift = idx * 4 + 8;
2181
if (nval == 2) {
2182
nval = ucontrol->value.enumerated.item[0] - 1;
2183
val &= ~(0x07 << shift);
2184
val |= nval << shift;
2185
} else if (nval == 3) {
2186
nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2187
val &= ~(0x08 << shift);
2188
val |= nval << shift;
2189
}
2190
change = val != old_val;
2191
if (change)
2192
outw(val, ICEMT(ice, ROUTE_SPDOUT));
2193
spin_unlock_irq(&ice->reg_lock);
2194
return change;
2195
}
2196
2197
static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route __devinitdata = {
2198
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2199
.name = "H/W Playback Route",
2200
.info = snd_ice1712_pro_route_info,
2201
.get = snd_ice1712_pro_route_analog_get,
2202
.put = snd_ice1712_pro_route_analog_put,
2203
};
2204
2205
static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route __devinitdata = {
2206
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2207
.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
2208
.info = snd_ice1712_pro_route_info,
2209
.get = snd_ice1712_pro_route_spdif_get,
2210
.put = snd_ice1712_pro_route_spdif_put,
2211
.count = 2,
2212
};
2213
2214
2215
static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
2216
struct snd_ctl_elem_info *uinfo)
2217
{
2218
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2219
uinfo->count = 1;
2220
uinfo->value.integer.min = 0;
2221
uinfo->value.integer.max = 255;
2222
return 0;
2223
}
2224
2225
static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
2226
struct snd_ctl_elem_value *ucontrol)
2227
{
2228
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2229
2230
ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
2231
return 0;
2232
}
2233
2234
static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
2235
struct snd_ctl_elem_value *ucontrol)
2236
{
2237
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2238
int change;
2239
2240
spin_lock_irq(&ice->reg_lock);
2241
change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
2242
outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
2243
spin_unlock_irq(&ice->reg_lock);
2244
return change;
2245
}
2246
2247
static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate __devinitdata = {
2248
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2249
.name = "Multi Track Volume Rate",
2250
.info = snd_ice1712_pro_volume_rate_info,
2251
.get = snd_ice1712_pro_volume_rate_get,
2252
.put = snd_ice1712_pro_volume_rate_put
2253
};
2254
2255
static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
2256
struct snd_ctl_elem_info *uinfo)
2257
{
2258
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2259
uinfo->count = 22;
2260
uinfo->value.integer.min = 0;
2261
uinfo->value.integer.max = 255;
2262
return 0;
2263
}
2264
2265
static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
2266
struct snd_ctl_elem_value *ucontrol)
2267
{
2268
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2269
int idx;
2270
2271
spin_lock_irq(&ice->reg_lock);
2272
for (idx = 0; idx < 22; idx++) {
2273
outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
2274
ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
2275
}
2276
spin_unlock_irq(&ice->reg_lock);
2277
return 0;
2278
}
2279
2280
static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak __devinitdata = {
2281
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
2282
.name = "Multi Track Peak",
2283
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2284
.info = snd_ice1712_pro_peak_info,
2285
.get = snd_ice1712_pro_peak_get
2286
};
2287
2288
/*
2289
*
2290
*/
2291
2292
/*
2293
* list of available boards
2294
*/
2295
static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
2296
snd_ice1712_hoontech_cards,
2297
snd_ice1712_delta_cards,
2298
snd_ice1712_ews_cards,
2299
NULL,
2300
};
2301
2302
static unsigned char __devinit snd_ice1712_read_i2c(struct snd_ice1712 *ice,
2303
unsigned char dev,
2304
unsigned char addr)
2305
{
2306
long t = 0x10000;
2307
2308
outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
2309
outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
2310
while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
2311
return inb(ICEREG(ice, I2C_DATA));
2312
}
2313
2314
static int __devinit snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
2315
const char *modelname)
2316
{
2317
int dev = 0xa0; /* EEPROM device address */
2318
unsigned int i, size;
2319
struct snd_ice1712_card_info * const *tbl, *c;
2320
2321
if (!modelname || !*modelname) {
2322
ice->eeprom.subvendor = 0;
2323
if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
2324
ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
2325
(snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
2326
(snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
2327
(snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
2328
if (ice->eeprom.subvendor == 0 ||
2329
ice->eeprom.subvendor == (unsigned int)-1) {
2330
/* invalid subvendor from EEPROM, try the PCI subststem ID instead */
2331
u16 vendor, device;
2332
pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
2333
pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2334
ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
2335
if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
2336
printk(KERN_ERR "ice1712: No valid ID is found\n");
2337
return -ENXIO;
2338
}
2339
}
2340
}
2341
for (tbl = card_tables; *tbl; tbl++) {
2342
for (c = *tbl; c->subvendor; c++) {
2343
if (modelname && c->model && !strcmp(modelname, c->model)) {
2344
printk(KERN_INFO "ice1712: Using board model %s\n", c->name);
2345
ice->eeprom.subvendor = c->subvendor;
2346
} else if (c->subvendor != ice->eeprom.subvendor)
2347
continue;
2348
if (!c->eeprom_size || !c->eeprom_data)
2349
goto found;
2350
/* if the EEPROM is given by the driver, use it */
2351
snd_printdd("using the defined eeprom..\n");
2352
ice->eeprom.version = 1;
2353
ice->eeprom.size = c->eeprom_size + 6;
2354
memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2355
goto read_skipped;
2356
}
2357
}
2358
printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n",
2359
ice->eeprom.subvendor);
2360
2361
found:
2362
ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
2363
if (ice->eeprom.size < 6)
2364
ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
2365
else if (ice->eeprom.size > 32) {
2366
snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size);
2367
return -EIO;
2368
}
2369
ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
2370
if (ice->eeprom.version != 1) {
2371
snd_printk(KERN_ERR "invalid EEPROM version %i\n",
2372
ice->eeprom.version);
2373
/* return -EIO; */
2374
}
2375
size = ice->eeprom.size - 6;
2376
for (i = 0; i < size; i++)
2377
ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
2378
2379
read_skipped:
2380
ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
2381
ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
2382
ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
2383
2384
return 0;
2385
}
2386
2387
2388
2389
static int __devinit snd_ice1712_chip_init(struct snd_ice1712 *ice)
2390
{
2391
outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
2392
udelay(200);
2393
outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
2394
udelay(200);
2395
if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
2396
!ice->dxr_enable)
2397
/* Set eeprom value to limit active ADCs and DACs to 6;
2398
* Also disable AC97 as no hardware in standard 6fire card/box
2399
* Note: DXR extensions are not currently supported
2400
*/
2401
ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
2402
pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
2403
pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
2404
pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
2405
pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
2406
if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
2407
ice->gpio.write_mask = ice->eeprom.gpiomask;
2408
ice->gpio.direction = ice->eeprom.gpiodir;
2409
snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
2410
ice->eeprom.gpiomask);
2411
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
2412
ice->eeprom.gpiodir);
2413
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2414
ice->eeprom.gpiostate);
2415
} else {
2416
ice->gpio.write_mask = 0xc0;
2417
ice->gpio.direction = 0xff;
2418
snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
2419
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
2420
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2421
ICE1712_STDSP24_CLOCK_BIT);
2422
}
2423
snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
2424
if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
2425
outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
2426
udelay(100);
2427
outb(0, ICEREG(ice, AC97_CMD));
2428
udelay(200);
2429
snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
2430
}
2431
snd_ice1712_set_pro_rate(ice, 48000, 1);
2432
2433
return 0;
2434
}
2435
2436
int __devinit snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
2437
{
2438
int err;
2439
struct snd_kcontrol *kctl;
2440
2441
if (snd_BUG_ON(!ice->pcm_pro))
2442
return -EIO;
2443
err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
2444
if (err < 0)
2445
return err;
2446
kctl->id.device = ice->pcm_pro->device;
2447
err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
2448
if (err < 0)
2449
return err;
2450
kctl->id.device = ice->pcm_pro->device;
2451
err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
2452
if (err < 0)
2453
return err;
2454
kctl->id.device = ice->pcm_pro->device;
2455
err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
2456
if (err < 0)
2457
return err;
2458
kctl->id.device = ice->pcm_pro->device;
2459
ice->spdif.stream_ctl = kctl;
2460
return 0;
2461
}
2462
2463
2464
static int __devinit snd_ice1712_build_controls(struct snd_ice1712 *ice)
2465
{
2466
int err;
2467
2468
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
2469
if (err < 0)
2470
return err;
2471
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
2472
if (err < 0)
2473
return err;
2474
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
2475
if (err < 0)
2476
return err;
2477
2478
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
2479
if (err < 0)
2480
return err;
2481
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
2482
if (err < 0)
2483
return err;
2484
2485
if (ice->num_total_dacs > 0) {
2486
struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
2487
tmp.count = ice->num_total_dacs;
2488
err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2489
if (err < 0)
2490
return err;
2491
}
2492
2493
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
2494
if (err < 0)
2495
return err;
2496
2497
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
2498
if (err < 0)
2499
return err;
2500
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
2501
if (err < 0)
2502
return err;
2503
2504
return 0;
2505
}
2506
2507
static int snd_ice1712_free(struct snd_ice1712 *ice)
2508
{
2509
if (!ice->port)
2510
goto __hw_end;
2511
/* mask all interrupts */
2512
outb(0xc0, ICEMT(ice, IRQ));
2513
outb(0xff, ICEREG(ice, IRQMASK));
2514
/* --- */
2515
__hw_end:
2516
if (ice->irq >= 0)
2517
free_irq(ice->irq, ice);
2518
2519
if (ice->port)
2520
pci_release_regions(ice->pci);
2521
snd_ice1712_akm4xxx_free(ice);
2522
pci_disable_device(ice->pci);
2523
kfree(ice->spec);
2524
kfree(ice);
2525
return 0;
2526
}
2527
2528
static int snd_ice1712_dev_free(struct snd_device *device)
2529
{
2530
struct snd_ice1712 *ice = device->device_data;
2531
return snd_ice1712_free(ice);
2532
}
2533
2534
static int __devinit snd_ice1712_create(struct snd_card *card,
2535
struct pci_dev *pci,
2536
const char *modelname,
2537
int omni,
2538
int cs8427_timeout,
2539
int dxr_enable,
2540
struct snd_ice1712 **r_ice1712)
2541
{
2542
struct snd_ice1712 *ice;
2543
int err;
2544
static struct snd_device_ops ops = {
2545
.dev_free = snd_ice1712_dev_free,
2546
};
2547
2548
*r_ice1712 = NULL;
2549
2550
/* enable PCI device */
2551
err = pci_enable_device(pci);
2552
if (err < 0)
2553
return err;
2554
/* check, if we can restrict PCI DMA transfers to 28 bits */
2555
if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
2556
pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
2557
snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
2558
pci_disable_device(pci);
2559
return -ENXIO;
2560
}
2561
2562
ice = kzalloc(sizeof(*ice), GFP_KERNEL);
2563
if (ice == NULL) {
2564
pci_disable_device(pci);
2565
return -ENOMEM;
2566
}
2567
ice->omni = omni ? 1 : 0;
2568
if (cs8427_timeout < 1)
2569
cs8427_timeout = 1;
2570
else if (cs8427_timeout > 1000)
2571
cs8427_timeout = 1000;
2572
ice->cs8427_timeout = cs8427_timeout;
2573
ice->dxr_enable = dxr_enable;
2574
spin_lock_init(&ice->reg_lock);
2575
mutex_init(&ice->gpio_mutex);
2576
mutex_init(&ice->i2c_mutex);
2577
mutex_init(&ice->open_mutex);
2578
ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
2579
ice->gpio.get_mask = snd_ice1712_get_gpio_mask;
2580
ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
2581
ice->gpio.get_dir = snd_ice1712_get_gpio_dir;
2582
ice->gpio.set_data = snd_ice1712_set_gpio_data;
2583
ice->gpio.get_data = snd_ice1712_get_gpio_data;
2584
2585
ice->spdif.cs8403_bits =
2586
ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
2587
0x10 | /* no emphasis */
2588
0x20); /* PCM encoder/decoder */
2589
ice->card = card;
2590
ice->pci = pci;
2591
ice->irq = -1;
2592
pci_set_master(pci);
2593
pci_write_config_word(ice->pci, 0x40, 0x807f);
2594
pci_write_config_word(ice->pci, 0x42, 0x0006);
2595
snd_ice1712_proc_init(ice);
2596
synchronize_irq(pci->irq);
2597
2598
err = pci_request_regions(pci, "ICE1712");
2599
if (err < 0) {
2600
kfree(ice);
2601
pci_disable_device(pci);
2602
return err;
2603
}
2604
ice->port = pci_resource_start(pci, 0);
2605
ice->ddma_port = pci_resource_start(pci, 1);
2606
ice->dmapath_port = pci_resource_start(pci, 2);
2607
ice->profi_port = pci_resource_start(pci, 3);
2608
2609
if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED,
2610
"ICE1712", ice)) {
2611
snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
2612
snd_ice1712_free(ice);
2613
return -EIO;
2614
}
2615
2616
ice->irq = pci->irq;
2617
2618
if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
2619
snd_ice1712_free(ice);
2620
return -EIO;
2621
}
2622
if (snd_ice1712_chip_init(ice) < 0) {
2623
snd_ice1712_free(ice);
2624
return -EIO;
2625
}
2626
2627
/* unmask used interrupts */
2628
outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
2629
ICE1712_IRQ_MPU2 : 0) |
2630
((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
2631
ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
2632
ICEREG(ice, IRQMASK));
2633
outb(0x00, ICEMT(ice, IRQ));
2634
2635
err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
2636
if (err < 0) {
2637
snd_ice1712_free(ice);
2638
return err;
2639
}
2640
2641
snd_card_set_dev(card, &pci->dev);
2642
2643
*r_ice1712 = ice;
2644
return 0;
2645
}
2646
2647
2648
/*
2649
*
2650
* Registration
2651
*
2652
*/
2653
2654
static struct snd_ice1712_card_info no_matched __devinitdata;
2655
2656
static int __devinit snd_ice1712_probe(struct pci_dev *pci,
2657
const struct pci_device_id *pci_id)
2658
{
2659
static int dev;
2660
struct snd_card *card;
2661
struct snd_ice1712 *ice;
2662
int pcm_dev = 0, err;
2663
struct snd_ice1712_card_info * const *tbl, *c;
2664
2665
if (dev >= SNDRV_CARDS)
2666
return -ENODEV;
2667
if (!enable[dev]) {
2668
dev++;
2669
return -ENOENT;
2670
}
2671
2672
err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
2673
if (err < 0)
2674
return err;
2675
2676
strcpy(card->driver, "ICE1712");
2677
strcpy(card->shortname, "ICEnsemble ICE1712");
2678
2679
err = snd_ice1712_create(card, pci, model[dev], omni[dev],
2680
cs8427_timeout[dev], dxr_enable[dev], &ice);
2681
if (err < 0) {
2682
snd_card_free(card);
2683
return err;
2684
}
2685
2686
for (tbl = card_tables; *tbl; tbl++) {
2687
for (c = *tbl; c->subvendor; c++) {
2688
if (c->subvendor == ice->eeprom.subvendor) {
2689
strcpy(card->shortname, c->name);
2690
if (c->driver) /* specific driver? */
2691
strcpy(card->driver, c->driver);
2692
if (c->chip_init) {
2693
err = c->chip_init(ice);
2694
if (err < 0) {
2695
snd_card_free(card);
2696
return err;
2697
}
2698
}
2699
goto __found;
2700
}
2701
}
2702
}
2703
c = &no_matched;
2704
__found:
2705
2706
err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL);
2707
if (err < 0) {
2708
snd_card_free(card);
2709
return err;
2710
}
2711
2712
if (ice_has_con_ac97(ice)) {
2713
err = snd_ice1712_pcm(ice, pcm_dev++, NULL);
2714
if (err < 0) {
2715
snd_card_free(card);
2716
return err;
2717
}
2718
}
2719
2720
err = snd_ice1712_ac97_mixer(ice);
2721
if (err < 0) {
2722
snd_card_free(card);
2723
return err;
2724
}
2725
2726
err = snd_ice1712_build_controls(ice);
2727
if (err < 0) {
2728
snd_card_free(card);
2729
return err;
2730
}
2731
2732
if (c->build_controls) {
2733
err = c->build_controls(ice);
2734
if (err < 0) {
2735
snd_card_free(card);
2736
return err;
2737
}
2738
}
2739
2740
if (ice_has_con_ac97(ice)) {
2741
err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL);
2742
if (err < 0) {
2743
snd_card_free(card);
2744
return err;
2745
}
2746
}
2747
2748
if (!c->no_mpu401) {
2749
err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2750
ICEREG(ice, MPU1_CTRL),
2751
(c->mpu401_1_info_flags | MPU401_INFO_INTEGRATED),
2752
ice->irq, 0, &ice->rmidi[0]);
2753
if (err < 0) {
2754
snd_card_free(card);
2755
return err;
2756
}
2757
if (c->mpu401_1_name)
2758
/* Preferred name available in card_info */
2759
snprintf(ice->rmidi[0]->name,
2760
sizeof(ice->rmidi[0]->name),
2761
"%s %d", c->mpu401_1_name, card->number);
2762
2763
if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) {
2764
/* 2nd port used */
2765
err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
2766
ICEREG(ice, MPU2_CTRL),
2767
(c->mpu401_2_info_flags | MPU401_INFO_INTEGRATED),
2768
ice->irq, 0, &ice->rmidi[1]);
2769
2770
if (err < 0) {
2771
snd_card_free(card);
2772
return err;
2773
}
2774
if (c->mpu401_2_name)
2775
/* Preferred name available in card_info */
2776
snprintf(ice->rmidi[1]->name,
2777
sizeof(ice->rmidi[1]->name),
2778
"%s %d", c->mpu401_2_name,
2779
card->number);
2780
}
2781
}
2782
2783
snd_ice1712_set_input_clock_source(ice, 0);
2784
2785
sprintf(card->longname, "%s at 0x%lx, irq %i",
2786
card->shortname, ice->port, ice->irq);
2787
2788
err = snd_card_register(card);
2789
if (err < 0) {
2790
snd_card_free(card);
2791
return err;
2792
}
2793
pci_set_drvdata(pci, card);
2794
dev++;
2795
return 0;
2796
}
2797
2798
static void __devexit snd_ice1712_remove(struct pci_dev *pci)
2799
{
2800
snd_card_free(pci_get_drvdata(pci));
2801
pci_set_drvdata(pci, NULL);
2802
}
2803
2804
static struct pci_driver driver = {
2805
.name = "ICE1712",
2806
.id_table = snd_ice1712_ids,
2807
.probe = snd_ice1712_probe,
2808
.remove = __devexit_p(snd_ice1712_remove),
2809
};
2810
2811
static int __init alsa_card_ice1712_init(void)
2812
{
2813
return pci_register_driver(&driver);
2814
}
2815
2816
static void __exit alsa_card_ice1712_exit(void)
2817
{
2818
pci_unregister_driver(&driver);
2819
}
2820
2821
module_init(alsa_card_ice1712_init)
2822
module_exit(alsa_card_ice1712_exit)
2823
2824