Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
awilliam
GitHub Repository: awilliam/linux-vfio
Path: blob/master/sound/pci/oxygen/oxygen.c
10817 views
1
/*
2
* C-Media CMI8788 driver for C-Media's reference design and similar models
3
*
4
* Copyright (c) Clemens Ladisch <[email protected]>
5
*
6
*
7
* This driver is free software; you can redistribute it and/or modify
8
* it under the terms of the GNU General Public License, version 2.
9
*
10
* This driver is distributed in the hope that it will be useful,
11
* but WITHOUT ANY WARRANTY; without even the implied warranty of
12
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13
* GNU General Public License for more details.
14
*
15
* You should have received a copy of the GNU General Public License
16
* along with this driver; if not, write to the Free Software
17
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18
*/
19
20
/*
21
* CMI8788:
22
*
23
* SPI 0 -> 1st AK4396 (front)
24
* SPI 1 -> 2nd AK4396 (surround)
25
* SPI 2 -> 3rd AK4396 (center/LFE)
26
* SPI 3 -> WM8785
27
* SPI 4 -> 4th AK4396 (back)
28
*
29
* GPIO 0 -> DFS0 of AK5385
30
* GPIO 1 -> DFS1 of AK5385
31
*
32
* X-Meridian models:
33
* GPIO 4 -> enable extension S/PDIF input
34
* GPIO 6 -> enable on-board S/PDIF input
35
*
36
* Claro models:
37
* GPIO 6 -> S/PDIF from optical (0) or coaxial (1) input
38
* GPIO 8 -> enable headphone amplifier
39
*
40
* CM9780:
41
*
42
* LINE_OUT -> input of ADC
43
*
44
* AUX_IN <- aux
45
* CD_IN <- CD
46
* MIC_IN <- mic
47
*
48
* GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
49
*/
50
51
#include <linux/delay.h>
52
#include <linux/mutex.h>
53
#include <linux/pci.h>
54
#include <sound/ac97_codec.h>
55
#include <sound/control.h>
56
#include <sound/core.h>
57
#include <sound/info.h>
58
#include <sound/initval.h>
59
#include <sound/pcm.h>
60
#include <sound/pcm_params.h>
61
#include <sound/tlv.h>
62
#include "oxygen.h"
63
#include "xonar_dg.h"
64
#include "ak4396.h"
65
#include "wm8785.h"
66
67
MODULE_AUTHOR("Clemens Ladisch <[email protected]>");
68
MODULE_DESCRIPTION("C-Media CMI8788 driver");
69
MODULE_LICENSE("GPL v2");
70
MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8786}"
71
",{C-Media,CMI8787}"
72
",{C-Media,CMI8788}}");
73
74
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
75
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
76
static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
77
78
module_param_array(index, int, NULL, 0444);
79
MODULE_PARM_DESC(index, "card index");
80
module_param_array(id, charp, NULL, 0444);
81
MODULE_PARM_DESC(id, "ID string");
82
module_param_array(enable, bool, NULL, 0444);
83
MODULE_PARM_DESC(enable, "enable card");
84
85
enum {
86
MODEL_CMEDIA_REF,
87
MODEL_MERIDIAN,
88
MODEL_MERIDIAN_2G,
89
MODEL_CLARO,
90
MODEL_CLARO_HALO,
91
MODEL_FANTASIA,
92
MODEL_SERENADE,
93
MODEL_2CH_OUTPUT,
94
MODEL_HG2PCI,
95
MODEL_XONAR_DG,
96
};
97
98
static DEFINE_PCI_DEVICE_TABLE(oxygen_ids) = {
99
/* C-Media's reference design */
100
{ OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
101
{ OXYGEN_PCI_SUBID(0x10b0, 0x0217), .driver_data = MODEL_CMEDIA_REF },
102
{ OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
103
{ OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
104
{ OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
105
{ OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
106
{ OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
107
{ OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
108
{ OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
109
/* Asus Xonar DG */
110
{ OXYGEN_PCI_SUBID(0x1043, 0x8467), .driver_data = MODEL_XONAR_DG },
111
/* PCI 2.0 HD Audio */
112
{ OXYGEN_PCI_SUBID(0x13f6, 0x8782), .driver_data = MODEL_2CH_OUTPUT },
113
/* Kuroutoshikou CMI8787-HG2PCI */
114
{ OXYGEN_PCI_SUBID(0x13f6, 0xffff), .driver_data = MODEL_HG2PCI },
115
/* TempoTec HiFier Fantasia */
116
{ OXYGEN_PCI_SUBID(0x14c3, 0x1710), .driver_data = MODEL_FANTASIA },
117
/* TempoTec HiFier Serenade */
118
{ OXYGEN_PCI_SUBID(0x14c3, 0x1711), .driver_data = MODEL_SERENADE },
119
/* AuzenTech X-Meridian */
120
{ OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
121
/* AuzenTech X-Meridian 2G */
122
{ OXYGEN_PCI_SUBID(0x5431, 0x017a), .driver_data = MODEL_MERIDIAN_2G },
123
/* HT-Omega Claro */
124
{ OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
125
/* HT-Omega Claro halo */
126
{ OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
127
{ }
128
};
129
MODULE_DEVICE_TABLE(pci, oxygen_ids);
130
131
132
#define GPIO_AK5385_DFS_MASK 0x0003
133
#define GPIO_AK5385_DFS_NORMAL 0x0000
134
#define GPIO_AK5385_DFS_DOUBLE 0x0001
135
#define GPIO_AK5385_DFS_QUAD 0x0002
136
137
#define GPIO_MERIDIAN_DIG_MASK 0x0050
138
#define GPIO_MERIDIAN_DIG_EXT 0x0010
139
#define GPIO_MERIDIAN_DIG_BOARD 0x0040
140
141
#define GPIO_CLARO_DIG_COAX 0x0040
142
#define GPIO_CLARO_HP 0x0100
143
144
struct generic_data {
145
unsigned int dacs;
146
u8 ak4396_regs[4][5];
147
u16 wm8785_regs[3];
148
};
149
150
static void ak4396_write(struct oxygen *chip, unsigned int codec,
151
u8 reg, u8 value)
152
{
153
/* maps ALSA channel pair number to SPI output */
154
static const u8 codec_spi_map[4] = {
155
0, 1, 2, 4
156
};
157
struct generic_data *data = chip->model_data;
158
159
oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
160
OXYGEN_SPI_DATA_LENGTH_2 |
161
OXYGEN_SPI_CLOCK_160 |
162
(codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
163
OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
164
AK4396_WRITE | (reg << 8) | value);
165
data->ak4396_regs[codec][reg] = value;
166
}
167
168
static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
169
u8 reg, u8 value)
170
{
171
struct generic_data *data = chip->model_data;
172
173
if (value != data->ak4396_regs[codec][reg])
174
ak4396_write(chip, codec, reg, value);
175
}
176
177
static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
178
{
179
struct generic_data *data = chip->model_data;
180
181
oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
182
OXYGEN_SPI_DATA_LENGTH_2 |
183
OXYGEN_SPI_CLOCK_160 |
184
(3 << OXYGEN_SPI_CODEC_SHIFT) |
185
OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
186
(reg << 9) | value);
187
if (reg < ARRAY_SIZE(data->wm8785_regs))
188
data->wm8785_regs[reg] = value;
189
}
190
191
static void ak4396_registers_init(struct oxygen *chip)
192
{
193
struct generic_data *data = chip->model_data;
194
unsigned int i;
195
196
for (i = 0; i < data->dacs; ++i) {
197
ak4396_write(chip, i, AK4396_CONTROL_1,
198
AK4396_DIF_24_MSB | AK4396_RSTN);
199
ak4396_write(chip, i, AK4396_CONTROL_2,
200
data->ak4396_regs[0][AK4396_CONTROL_2]);
201
ak4396_write(chip, i, AK4396_CONTROL_3,
202
AK4396_PCM);
203
ak4396_write(chip, i, AK4396_LCH_ATT,
204
chip->dac_volume[i * 2]);
205
ak4396_write(chip, i, AK4396_RCH_ATT,
206
chip->dac_volume[i * 2 + 1]);
207
}
208
}
209
210
static void ak4396_init(struct oxygen *chip)
211
{
212
struct generic_data *data = chip->model_data;
213
214
data->dacs = chip->model.dac_channels_pcm / 2;
215
data->ak4396_regs[0][AK4396_CONTROL_2] =
216
AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
217
ak4396_registers_init(chip);
218
snd_component_add(chip->card, "AK4396");
219
}
220
221
static void ak5385_init(struct oxygen *chip)
222
{
223
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
224
oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
225
snd_component_add(chip->card, "AK5385");
226
}
227
228
static void wm8785_registers_init(struct oxygen *chip)
229
{
230
struct generic_data *data = chip->model_data;
231
232
wm8785_write(chip, WM8785_R7, 0);
233
wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
234
wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
235
}
236
237
static void wm8785_init(struct oxygen *chip)
238
{
239
struct generic_data *data = chip->model_data;
240
241
data->wm8785_regs[0] =
242
WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
243
data->wm8785_regs[2] = WM8785_HPFR | WM8785_HPFL;
244
wm8785_registers_init(chip);
245
snd_component_add(chip->card, "WM8785");
246
}
247
248
static void generic_init(struct oxygen *chip)
249
{
250
ak4396_init(chip);
251
wm8785_init(chip);
252
}
253
254
static void meridian_init(struct oxygen *chip)
255
{
256
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
257
GPIO_MERIDIAN_DIG_MASK);
258
oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
259
GPIO_MERIDIAN_DIG_BOARD, GPIO_MERIDIAN_DIG_MASK);
260
ak4396_init(chip);
261
ak5385_init(chip);
262
}
263
264
static void claro_enable_hp(struct oxygen *chip)
265
{
266
msleep(300);
267
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
268
oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
269
}
270
271
static void claro_init(struct oxygen *chip)
272
{
273
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
274
oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
275
ak4396_init(chip);
276
wm8785_init(chip);
277
claro_enable_hp(chip);
278
}
279
280
static void claro_halo_init(struct oxygen *chip)
281
{
282
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
283
oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
284
ak4396_init(chip);
285
ak5385_init(chip);
286
claro_enable_hp(chip);
287
}
288
289
static void fantasia_init(struct oxygen *chip)
290
{
291
ak4396_init(chip);
292
snd_component_add(chip->card, "CS5340");
293
}
294
295
static void stereo_output_init(struct oxygen *chip)
296
{
297
ak4396_init(chip);
298
}
299
300
static void generic_cleanup(struct oxygen *chip)
301
{
302
}
303
304
static void claro_disable_hp(struct oxygen *chip)
305
{
306
oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
307
}
308
309
static void claro_cleanup(struct oxygen *chip)
310
{
311
claro_disable_hp(chip);
312
}
313
314
static void claro_suspend(struct oxygen *chip)
315
{
316
claro_disable_hp(chip);
317
}
318
319
static void generic_resume(struct oxygen *chip)
320
{
321
ak4396_registers_init(chip);
322
wm8785_registers_init(chip);
323
}
324
325
static void meridian_resume(struct oxygen *chip)
326
{
327
ak4396_registers_init(chip);
328
}
329
330
static void claro_resume(struct oxygen *chip)
331
{
332
ak4396_registers_init(chip);
333
claro_enable_hp(chip);
334
}
335
336
static void stereo_resume(struct oxygen *chip)
337
{
338
ak4396_registers_init(chip);
339
}
340
341
static void set_ak4396_params(struct oxygen *chip,
342
struct snd_pcm_hw_params *params)
343
{
344
struct generic_data *data = chip->model_data;
345
unsigned int i;
346
u8 value;
347
348
value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
349
if (params_rate(params) <= 54000)
350
value |= AK4396_DFS_NORMAL;
351
else if (params_rate(params) <= 108000)
352
value |= AK4396_DFS_DOUBLE;
353
else
354
value |= AK4396_DFS_QUAD;
355
356
msleep(1); /* wait for the new MCLK to become stable */
357
358
if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
359
for (i = 0; i < data->dacs; ++i) {
360
ak4396_write(chip, i, AK4396_CONTROL_1,
361
AK4396_DIF_24_MSB);
362
ak4396_write(chip, i, AK4396_CONTROL_2, value);
363
ak4396_write(chip, i, AK4396_CONTROL_1,
364
AK4396_DIF_24_MSB | AK4396_RSTN);
365
}
366
}
367
}
368
369
static void update_ak4396_volume(struct oxygen *chip)
370
{
371
struct generic_data *data = chip->model_data;
372
unsigned int i;
373
374
for (i = 0; i < data->dacs; ++i) {
375
ak4396_write_cached(chip, i, AK4396_LCH_ATT,
376
chip->dac_volume[i * 2]);
377
ak4396_write_cached(chip, i, AK4396_RCH_ATT,
378
chip->dac_volume[i * 2 + 1]);
379
}
380
}
381
382
static void update_ak4396_mute(struct oxygen *chip)
383
{
384
struct generic_data *data = chip->model_data;
385
unsigned int i;
386
u8 value;
387
388
value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
389
if (chip->dac_mute)
390
value |= AK4396_SMUTE;
391
for (i = 0; i < data->dacs; ++i)
392
ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
393
}
394
395
static void set_wm8785_params(struct oxygen *chip,
396
struct snd_pcm_hw_params *params)
397
{
398
struct generic_data *data = chip->model_data;
399
unsigned int value;
400
401
value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
402
if (params_rate(params) <= 48000)
403
value |= WM8785_OSR_SINGLE;
404
else if (params_rate(params) <= 96000)
405
value |= WM8785_OSR_DOUBLE;
406
else
407
value |= WM8785_OSR_QUAD;
408
if (value != data->wm8785_regs[0]) {
409
wm8785_write(chip, WM8785_R7, 0);
410
wm8785_write(chip, WM8785_R0, value);
411
wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
412
}
413
}
414
415
static void set_ak5385_params(struct oxygen *chip,
416
struct snd_pcm_hw_params *params)
417
{
418
unsigned int value;
419
420
if (params_rate(params) <= 54000)
421
value = GPIO_AK5385_DFS_NORMAL;
422
else if (params_rate(params) <= 108000)
423
value = GPIO_AK5385_DFS_DOUBLE;
424
else
425
value = GPIO_AK5385_DFS_QUAD;
426
oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
427
value, GPIO_AK5385_DFS_MASK);
428
}
429
430
static void set_no_params(struct oxygen *chip, struct snd_pcm_hw_params *params)
431
{
432
}
433
434
static int rolloff_info(struct snd_kcontrol *ctl,
435
struct snd_ctl_elem_info *info)
436
{
437
static const char *const names[2] = {
438
"Sharp Roll-off", "Slow Roll-off"
439
};
440
441
return snd_ctl_enum_info(info, 1, 2, names);
442
}
443
444
static int rolloff_get(struct snd_kcontrol *ctl,
445
struct snd_ctl_elem_value *value)
446
{
447
struct oxygen *chip = ctl->private_data;
448
struct generic_data *data = chip->model_data;
449
450
value->value.enumerated.item[0] =
451
(data->ak4396_regs[0][AK4396_CONTROL_2] & AK4396_SLOW) != 0;
452
return 0;
453
}
454
455
static int rolloff_put(struct snd_kcontrol *ctl,
456
struct snd_ctl_elem_value *value)
457
{
458
struct oxygen *chip = ctl->private_data;
459
struct generic_data *data = chip->model_data;
460
unsigned int i;
461
int changed;
462
u8 reg;
463
464
mutex_lock(&chip->mutex);
465
reg = data->ak4396_regs[0][AK4396_CONTROL_2];
466
if (value->value.enumerated.item[0])
467
reg |= AK4396_SLOW;
468
else
469
reg &= ~AK4396_SLOW;
470
changed = reg != data->ak4396_regs[0][AK4396_CONTROL_2];
471
if (changed) {
472
for (i = 0; i < data->dacs; ++i)
473
ak4396_write(chip, i, AK4396_CONTROL_2, reg);
474
}
475
mutex_unlock(&chip->mutex);
476
return changed;
477
}
478
479
static const struct snd_kcontrol_new rolloff_control = {
480
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
481
.name = "DAC Filter Playback Enum",
482
.info = rolloff_info,
483
.get = rolloff_get,
484
.put = rolloff_put,
485
};
486
487
static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
488
{
489
static const char *const names[2] = {
490
"None", "High-pass Filter"
491
};
492
493
return snd_ctl_enum_info(info, 1, 2, names);
494
}
495
496
static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
497
{
498
struct oxygen *chip = ctl->private_data;
499
struct generic_data *data = chip->model_data;
500
501
value->value.enumerated.item[0] =
502
(data->wm8785_regs[WM8785_R2] & WM8785_HPFR) != 0;
503
return 0;
504
}
505
506
static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
507
{
508
struct oxygen *chip = ctl->private_data;
509
struct generic_data *data = chip->model_data;
510
unsigned int reg;
511
int changed;
512
513
mutex_lock(&chip->mutex);
514
reg = data->wm8785_regs[WM8785_R2] & ~(WM8785_HPFR | WM8785_HPFL);
515
if (value->value.enumerated.item[0])
516
reg |= WM8785_HPFR | WM8785_HPFL;
517
changed = reg != data->wm8785_regs[WM8785_R2];
518
if (changed)
519
wm8785_write(chip, WM8785_R2, reg);
520
mutex_unlock(&chip->mutex);
521
return changed;
522
}
523
524
static const struct snd_kcontrol_new hpf_control = {
525
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
526
.name = "ADC Filter Capture Enum",
527
.info = hpf_info,
528
.get = hpf_get,
529
.put = hpf_put,
530
};
531
532
static int meridian_dig_source_info(struct snd_kcontrol *ctl,
533
struct snd_ctl_elem_info *info)
534
{
535
static const char *const names[2] = { "On-board", "Extension" };
536
537
return snd_ctl_enum_info(info, 1, 2, names);
538
}
539
540
static int claro_dig_source_info(struct snd_kcontrol *ctl,
541
struct snd_ctl_elem_info *info)
542
{
543
static const char *const names[2] = { "Optical", "Coaxial" };
544
545
return snd_ctl_enum_info(info, 1, 2, names);
546
}
547
548
static int meridian_dig_source_get(struct snd_kcontrol *ctl,
549
struct snd_ctl_elem_value *value)
550
{
551
struct oxygen *chip = ctl->private_data;
552
553
value->value.enumerated.item[0] =
554
!!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
555
GPIO_MERIDIAN_DIG_EXT);
556
return 0;
557
}
558
559
static int claro_dig_source_get(struct snd_kcontrol *ctl,
560
struct snd_ctl_elem_value *value)
561
{
562
struct oxygen *chip = ctl->private_data;
563
564
value->value.enumerated.item[0] =
565
!!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
566
GPIO_CLARO_DIG_COAX);
567
return 0;
568
}
569
570
static int meridian_dig_source_put(struct snd_kcontrol *ctl,
571
struct snd_ctl_elem_value *value)
572
{
573
struct oxygen *chip = ctl->private_data;
574
u16 old_reg, new_reg;
575
int changed;
576
577
mutex_lock(&chip->mutex);
578
old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
579
new_reg = old_reg & ~GPIO_MERIDIAN_DIG_MASK;
580
if (value->value.enumerated.item[0] == 0)
581
new_reg |= GPIO_MERIDIAN_DIG_BOARD;
582
else
583
new_reg |= GPIO_MERIDIAN_DIG_EXT;
584
changed = new_reg != old_reg;
585
if (changed)
586
oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
587
mutex_unlock(&chip->mutex);
588
return changed;
589
}
590
591
static int claro_dig_source_put(struct snd_kcontrol *ctl,
592
struct snd_ctl_elem_value *value)
593
{
594
struct oxygen *chip = ctl->private_data;
595
u16 old_reg, new_reg;
596
int changed;
597
598
mutex_lock(&chip->mutex);
599
old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
600
new_reg = old_reg & ~GPIO_CLARO_DIG_COAX;
601
if (value->value.enumerated.item[0])
602
new_reg |= GPIO_CLARO_DIG_COAX;
603
changed = new_reg != old_reg;
604
if (changed)
605
oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
606
mutex_unlock(&chip->mutex);
607
return changed;
608
}
609
610
static const struct snd_kcontrol_new meridian_dig_source_control = {
611
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
612
.name = "IEC958 Source Capture Enum",
613
.info = meridian_dig_source_info,
614
.get = meridian_dig_source_get,
615
.put = meridian_dig_source_put,
616
};
617
618
static const struct snd_kcontrol_new claro_dig_source_control = {
619
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
620
.name = "IEC958 Source Capture Enum",
621
.info = claro_dig_source_info,
622
.get = claro_dig_source_get,
623
.put = claro_dig_source_put,
624
};
625
626
static int generic_mixer_init(struct oxygen *chip)
627
{
628
return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
629
}
630
631
static int generic_wm8785_mixer_init(struct oxygen *chip)
632
{
633
int err;
634
635
err = generic_mixer_init(chip);
636
if (err < 0)
637
return err;
638
err = snd_ctl_add(chip->card, snd_ctl_new1(&hpf_control, chip));
639
if (err < 0)
640
return err;
641
return 0;
642
}
643
644
static int meridian_mixer_init(struct oxygen *chip)
645
{
646
int err;
647
648
err = generic_mixer_init(chip);
649
if (err < 0)
650
return err;
651
err = snd_ctl_add(chip->card,
652
snd_ctl_new1(&meridian_dig_source_control, chip));
653
if (err < 0)
654
return err;
655
return 0;
656
}
657
658
static int claro_mixer_init(struct oxygen *chip)
659
{
660
int err;
661
662
err = generic_wm8785_mixer_init(chip);
663
if (err < 0)
664
return err;
665
err = snd_ctl_add(chip->card,
666
snd_ctl_new1(&claro_dig_source_control, chip));
667
if (err < 0)
668
return err;
669
return 0;
670
}
671
672
static int claro_halo_mixer_init(struct oxygen *chip)
673
{
674
int err;
675
676
err = generic_mixer_init(chip);
677
if (err < 0)
678
return err;
679
err = snd_ctl_add(chip->card,
680
snd_ctl_new1(&claro_dig_source_control, chip));
681
if (err < 0)
682
return err;
683
return 0;
684
}
685
686
static void dump_ak4396_registers(struct oxygen *chip,
687
struct snd_info_buffer *buffer)
688
{
689
struct generic_data *data = chip->model_data;
690
unsigned int dac, i;
691
692
for (dac = 0; dac < data->dacs; ++dac) {
693
snd_iprintf(buffer, "\nAK4396 %u:", dac + 1);
694
for (i = 0; i < 5; ++i)
695
snd_iprintf(buffer, " %02x", data->ak4396_regs[dac][i]);
696
}
697
snd_iprintf(buffer, "\n");
698
}
699
700
static void dump_wm8785_registers(struct oxygen *chip,
701
struct snd_info_buffer *buffer)
702
{
703
struct generic_data *data = chip->model_data;
704
unsigned int i;
705
706
snd_iprintf(buffer, "\nWM8785:");
707
for (i = 0; i < 3; ++i)
708
snd_iprintf(buffer, " %03x", data->wm8785_regs[i]);
709
snd_iprintf(buffer, "\n");
710
}
711
712
static void dump_oxygen_registers(struct oxygen *chip,
713
struct snd_info_buffer *buffer)
714
{
715
dump_ak4396_registers(chip, buffer);
716
dump_wm8785_registers(chip, buffer);
717
}
718
719
static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
720
721
static const struct oxygen_model model_generic = {
722
.shortname = "C-Media CMI8788",
723
.longname = "C-Media Oxygen HD Audio",
724
.chip = "CMI8788",
725
.init = generic_init,
726
.mixer_init = generic_wm8785_mixer_init,
727
.cleanup = generic_cleanup,
728
.resume = generic_resume,
729
.set_dac_params = set_ak4396_params,
730
.set_adc_params = set_wm8785_params,
731
.update_dac_volume = update_ak4396_volume,
732
.update_dac_mute = update_ak4396_mute,
733
.dump_registers = dump_oxygen_registers,
734
.dac_tlv = ak4396_db_scale,
735
.model_data_size = sizeof(struct generic_data),
736
.device_config = PLAYBACK_0_TO_I2S |
737
PLAYBACK_1_TO_SPDIF |
738
PLAYBACK_2_TO_AC97_1 |
739
CAPTURE_0_FROM_I2S_1 |
740
CAPTURE_1_FROM_SPDIF |
741
CAPTURE_2_FROM_AC97_1 |
742
AC97_CD_INPUT,
743
.dac_channels_pcm = 8,
744
.dac_channels_mixer = 8,
745
.dac_volume_min = 0,
746
.dac_volume_max = 255,
747
.function_flags = OXYGEN_FUNCTION_SPI |
748
OXYGEN_FUNCTION_ENABLE_SPI_4_5,
749
.dac_mclks = OXYGEN_MCLKS(256, 128, 128),
750
.adc_mclks = OXYGEN_MCLKS(256, 256, 128),
751
.dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
752
.adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
753
};
754
755
static int __devinit get_oxygen_model(struct oxygen *chip,
756
const struct pci_device_id *id)
757
{
758
static const char *const names[] = {
759
[MODEL_MERIDIAN] = "AuzenTech X-Meridian",
760
[MODEL_MERIDIAN_2G] = "AuzenTech X-Meridian 2G",
761
[MODEL_CLARO] = "HT-Omega Claro",
762
[MODEL_CLARO_HALO] = "HT-Omega Claro halo",
763
[MODEL_FANTASIA] = "TempoTec HiFier Fantasia",
764
[MODEL_SERENADE] = "TempoTec HiFier Serenade",
765
[MODEL_HG2PCI] = "CMI8787-HG2PCI",
766
};
767
768
chip->model = model_generic;
769
switch (id->driver_data) {
770
case MODEL_MERIDIAN:
771
case MODEL_MERIDIAN_2G:
772
chip->model.init = meridian_init;
773
chip->model.mixer_init = meridian_mixer_init;
774
chip->model.resume = meridian_resume;
775
chip->model.set_adc_params = set_ak5385_params;
776
chip->model.dump_registers = dump_ak4396_registers;
777
chip->model.device_config = PLAYBACK_0_TO_I2S |
778
PLAYBACK_1_TO_SPDIF |
779
CAPTURE_0_FROM_I2S_2 |
780
CAPTURE_1_FROM_SPDIF;
781
if (id->driver_data == MODEL_MERIDIAN)
782
chip->model.device_config |= AC97_CD_INPUT;
783
break;
784
case MODEL_CLARO:
785
chip->model.init = claro_init;
786
chip->model.mixer_init = claro_mixer_init;
787
chip->model.cleanup = claro_cleanup;
788
chip->model.suspend = claro_suspend;
789
chip->model.resume = claro_resume;
790
break;
791
case MODEL_CLARO_HALO:
792
chip->model.init = claro_halo_init;
793
chip->model.mixer_init = claro_halo_mixer_init;
794
chip->model.cleanup = claro_cleanup;
795
chip->model.suspend = claro_suspend;
796
chip->model.resume = claro_resume;
797
chip->model.set_adc_params = set_ak5385_params;
798
chip->model.dump_registers = dump_ak4396_registers;
799
chip->model.device_config = PLAYBACK_0_TO_I2S |
800
PLAYBACK_1_TO_SPDIF |
801
CAPTURE_0_FROM_I2S_2 |
802
CAPTURE_1_FROM_SPDIF;
803
break;
804
case MODEL_FANTASIA:
805
case MODEL_SERENADE:
806
case MODEL_2CH_OUTPUT:
807
case MODEL_HG2PCI:
808
chip->model.shortname = "C-Media CMI8787";
809
chip->model.chip = "CMI8787";
810
if (id->driver_data == MODEL_FANTASIA)
811
chip->model.init = fantasia_init;
812
else
813
chip->model.init = stereo_output_init;
814
chip->model.resume = stereo_resume;
815
chip->model.mixer_init = generic_mixer_init;
816
chip->model.set_adc_params = set_no_params;
817
chip->model.dump_registers = dump_ak4396_registers;
818
chip->model.device_config = PLAYBACK_0_TO_I2S |
819
PLAYBACK_1_TO_SPDIF;
820
if (id->driver_data == MODEL_FANTASIA) {
821
chip->model.device_config |= CAPTURE_0_FROM_I2S_1;
822
chip->model.adc_mclks = OXYGEN_MCLKS(256, 128, 128);
823
}
824
chip->model.dac_channels_pcm = 2;
825
chip->model.dac_channels_mixer = 2;
826
break;
827
case MODEL_XONAR_DG:
828
chip->model = model_xonar_dg;
829
break;
830
}
831
if (id->driver_data == MODEL_MERIDIAN ||
832
id->driver_data == MODEL_MERIDIAN_2G ||
833
id->driver_data == MODEL_CLARO_HALO) {
834
chip->model.misc_flags = OXYGEN_MISC_MIDI;
835
chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
836
}
837
if (id->driver_data < ARRAY_SIZE(names) && names[id->driver_data])
838
chip->model.shortname = names[id->driver_data];
839
return 0;
840
}
841
842
static int __devinit generic_oxygen_probe(struct pci_dev *pci,
843
const struct pci_device_id *pci_id)
844
{
845
static int dev;
846
int err;
847
848
if (dev >= SNDRV_CARDS)
849
return -ENODEV;
850
if (!enable[dev]) {
851
++dev;
852
return -ENOENT;
853
}
854
err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
855
oxygen_ids, get_oxygen_model);
856
if (err >= 0)
857
++dev;
858
return err;
859
}
860
861
static struct pci_driver oxygen_driver = {
862
.name = "CMI8788",
863
.id_table = oxygen_ids,
864
.probe = generic_oxygen_probe,
865
.remove = __devexit_p(oxygen_pci_remove),
866
#ifdef CONFIG_PM
867
.suspend = oxygen_pci_suspend,
868
.resume = oxygen_pci_resume,
869
#endif
870
};
871
872
static int __init alsa_card_oxygen_init(void)
873
{
874
return pci_register_driver(&oxygen_driver);
875
}
876
877
static void __exit alsa_card_oxygen_exit(void)
878
{
879
pci_unregister_driver(&oxygen_driver);
880
}
881
882
module_init(alsa_card_oxygen_init)
883
module_exit(alsa_card_oxygen_exit)
884
885