Path: blob/master/sound/pcmcia/pdaudiocf/pdaudiocf.h
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/*1* Driver for Sound Cors PDAudioCF soundcard2*3* Copyright (c) 2003 by Jaroslav Kysela <[email protected]>4*5* This program is free software; you can redistribute it and/or modify6* it under the terms of the GNU General Public License as published by7* the Free Software Foundation; either version 2 of the License, or8* (at your option) any later version.9*10* This program is distributed in the hope that it will be useful,11* but WITHOUT ANY WARRANTY; without even the implied warranty of12* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the13* GNU General Public License for more details.14*15* You should have received a copy of the GNU General Public License16* along with this program; if not, write to the Free Software17* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA18*/1920#ifndef __PDAUDIOCF_H21#define __PDAUDIOCF_H2223#include <sound/pcm.h>24#include <linux/io.h>25#include <linux/interrupt.h>26#include <pcmcia/cistpl.h>27#include <pcmcia/ds.h>2829#include <sound/ak4117.h>3031/* PDAUDIOCF registers */32#define PDAUDIOCF_REG_MD 0x00 /* music data, R/O */33#define PDAUDIOCF_REG_WDP 0x02 /* write data pointer / 2, R/O */34#define PDAUDIOCF_REG_RDP 0x04 /* read data pointer / 2, R/O */35#define PDAUDIOCF_REG_TCR 0x06 /* test control register W/O */36#define PDAUDIOCF_REG_SCR 0x08 /* status and control, R/W (see bit description) */37#define PDAUDIOCF_REG_ISR 0x0a /* interrupt status, R/O */38#define PDAUDIOCF_REG_IER 0x0c /* interrupt enable, R/W */39#define PDAUDIOCF_REG_AK_IFR 0x0e /* AK interface register, R/W */4041/* PDAUDIOCF_REG_TCR */42#define PDAUDIOCF_ELIMAKMBIT (1<<0) /* simulate AKM music data */43#define PDAUDIOCF_TESTDATASEL (1<<1) /* test data selection, 0 = 0x55, 1 = pseudo-random */4445/* PDAUDIOCF_REG_SCR */46#define PDAUDIOCF_AK_SBP (1<<0) /* serial port busy flag */47#define PDAUDIOCF_RST (1<<2) /* FPGA, AKM + SRAM buffer reset */48#define PDAUDIOCF_PDN (1<<3) /* power down bit */49#define PDAUDIOCF_CLKDIV0 (1<<4) /* choose 24.576Mhz clock divided by 1,2,3 or 4 */50#define PDAUDIOCF_CLKDIV1 (1<<5)51#define PDAUDIOCF_RECORD (1<<6) /* start capturing to SRAM */52#define PDAUDIOCF_AK_SDD (1<<7) /* music data detected */53#define PDAUDIOCF_RED_LED_OFF (1<<8) /* red LED off override */54#define PDAUDIOCF_BLUE_LED_OFF (1<<9) /* blue LED off override */55#define PDAUDIOCF_DATAFMT0 (1<<10) /* data format bits: 00 = 16-bit, 01 = 18-bit */56#define PDAUDIOCF_DATAFMT1 (1<<11) /* 10 = 20-bit, 11 = 24-bit, all right justified */57#define PDAUDIOCF_FPGAREV(x) ((x>>12)&0x0f) /* FPGA revision */5859/* PDAUDIOCF_REG_ISR */60#define PDAUDIOCF_IRQLVL (1<<0) /* Buffer level IRQ */61#define PDAUDIOCF_IRQOVR (1<<1) /* Overrun IRQ */62#define PDAUDIOCF_IRQAKM (1<<2) /* AKM IRQ */6364/* PDAUDIOCF_REG_IER */65#define PDAUDIOCF_IRQLVLEN0 (1<<0) /* fill threshold levels; 00 = none, 01 = 1/8th of buffer */66#define PDAUDIOCF_IRQLVLEN1 (1<<1) /* 10 = 1/4th of buffer, 11 = 1/2th of buffer */67#define PDAUDIOCF_IRQOVREN (1<<2) /* enable overrun IRQ */68#define PDAUDIOCF_IRQAKMEN (1<<3) /* enable AKM IRQ */69#define PDAUDIOCF_BLUEDUTY0 (1<<8) /* blue LED duty cycle; 00 = 100%, 01 = 50% */70#define PDAUDIOCF_BLUEDUTY1 (1<<9) /* 02 = 25%, 11 = 12% */71#define PDAUDIOCF_REDDUTY0 (1<<10) /* red LED duty cycle; 00 = 100%, 01 = 50% */72#define PDAUDIOCF_REDDUTY1 (1<<11) /* 02 = 25%, 11 = 12% */73#define PDAUDIOCF_BLUESDD (1<<12) /* blue LED against SDD bit */74#define PDAUDIOCF_BLUEMODULATE (1<<13) /* save power when 100% duty cycle selected */75#define PDAUDIOCF_REDMODULATE (1<<14) /* save power when 100% duty cycle selected */76#define PDAUDIOCF_HALFRATE (1<<15) /* slow both LED blinks by half (also spdif detect rate) */7778/* chip status */79#define PDAUDIOCF_STAT_IS_STALE (1<<0)80#define PDAUDIOCF_STAT_IS_CONFIGURED (1<<1)81#define PDAUDIOCF_STAT_IS_SUSPENDED (1<<2)8283struct snd_pdacf {84struct snd_card *card;85int index;8687unsigned long port;88int irq;8990spinlock_t reg_lock;91unsigned short regmap[8];92unsigned short suspend_reg_scr;93struct tasklet_struct tq;9495spinlock_t ak4117_lock;96struct ak4117 *ak4117;9798unsigned int chip_status;99100struct snd_pcm *pcm;101struct snd_pcm_substream *pcm_substream;102unsigned int pcm_running: 1;103unsigned int pcm_channels;104unsigned int pcm_swab;105unsigned int pcm_little;106unsigned int pcm_frame;107unsigned int pcm_sample;108unsigned int pcm_xor;109unsigned int pcm_size;110unsigned int pcm_period;111unsigned int pcm_tdone;112unsigned int pcm_hwptr;113void *pcm_area;114115/* pcmcia stuff */116struct pcmcia_device *p_dev;117};118119static inline void pdacf_reg_write(struct snd_pdacf *chip, unsigned char reg, unsigned short val)120{121outw(chip->regmap[reg>>1] = val, chip->port + reg);122}123124static inline unsigned short pdacf_reg_read(struct snd_pdacf *chip, unsigned char reg)125{126return inw(chip->port + reg);127}128129struct snd_pdacf *snd_pdacf_create(struct snd_card *card);130int snd_pdacf_ak4117_create(struct snd_pdacf *pdacf);131void snd_pdacf_powerdown(struct snd_pdacf *chip);132#ifdef CONFIG_PM133int snd_pdacf_suspend(struct snd_pdacf *chip, pm_message_t state);134int snd_pdacf_resume(struct snd_pdacf *chip);135#endif136int snd_pdacf_pcm_new(struct snd_pdacf *chip);137irqreturn_t pdacf_interrupt(int irq, void *dev);138void pdacf_tasklet(unsigned long private_data);139void pdacf_reinit(struct snd_pdacf *chip, int resume);140141#endif /* __PDAUDIOCF_H */142143144