/*1* atmel_ssc_dai.h - ALSA SSC interface for the Atmel SoC2*3* Copyright (C) 2005 SAN People4* Copyright (C) 2008 Atmel5*6* Author: Sedji Gaouaou <[email protected]>7* ATMEL CORP.8*9* Based on at91-ssc.c by10* Frank Mandarino <[email protected]>11* Based on pxa2xx Platform drivers by12* Liam Girdwood <[email protected]>13*14* This program is free software; you can redistribute it and/or modify15* it under the terms of the GNU General Public License as published by16* the Free Software Foundation; either version 2 of the License, or17* (at your option) any later version.18*19* This program is distributed in the hope that it will be useful,20* but WITHOUT ANY WARRANTY; without even the implied warranty of21* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the22* GNU General Public License for more details.23*24* You should have received a copy of the GNU General Public License25* along with this program; if not, write to the Free Software26* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA27*/2829#ifndef _ATMEL_SSC_DAI_H30#define _ATMEL_SSC_DAI_H3132#include <linux/types.h>33#include <linux/atmel-ssc.h>3435#include "atmel-pcm.h"3637/* SSC system clock ids */38#define ATMEL_SYSCLK_MCK 0 /* SSC uses AT91 MCK as system clock */3940/* SSC divider ids */41#define ATMEL_SSC_CMR_DIV 0 /* MCK divider for BCLK */42#define ATMEL_SSC_TCMR_PERIOD 1 /* BCLK divider for transmit FS */43#define ATMEL_SSC_RCMR_PERIOD 2 /* BCLK divider for receive FS */44/*45* SSC direction masks46*/47#define SSC_DIR_MASK_UNUSED 048#define SSC_DIR_MASK_PLAYBACK 149#define SSC_DIR_MASK_CAPTURE 25051/*52* SSC register values that Atmel left out of <linux/atmel-ssc.h>. These53* are expected to be used with SSC_BF54*/55/* START bit field values */56#define SSC_START_CONTINUOUS 057#define SSC_START_TX_RX 158#define SSC_START_LOW_RF 259#define SSC_START_HIGH_RF 360#define SSC_START_FALLING_RF 461#define SSC_START_RISING_RF 562#define SSC_START_LEVEL_RF 663#define SSC_START_EDGE_RF 764#define SSS_START_COMPARE_0 86566/* CKI bit field values */67#define SSC_CKI_FALLING 068#define SSC_CKI_RISING 16970/* CKO bit field values */71#define SSC_CKO_NONE 072#define SSC_CKO_CONTINUOUS 173#define SSC_CKO_TRANSFER 27475/* CKS bit field values */76#define SSC_CKS_DIV 077#define SSC_CKS_CLOCK 178#define SSC_CKS_PIN 27980/* FSEDGE bit field values */81#define SSC_FSEDGE_POSITIVE 082#define SSC_FSEDGE_NEGATIVE 18384/* FSOS bit field values */85#define SSC_FSOS_NONE 086#define SSC_FSOS_NEGATIVE 187#define SSC_FSOS_POSITIVE 288#define SSC_FSOS_LOW 389#define SSC_FSOS_HIGH 490#define SSC_FSOS_TOGGLE 59192#define START_DELAY 19394struct atmel_ssc_state {95u32 ssc_cmr;96u32 ssc_rcmr;97u32 ssc_rfmr;98u32 ssc_tcmr;99u32 ssc_tfmr;100u32 ssc_sr;101u32 ssc_imr;102};103104105struct atmel_ssc_info {106char *name;107struct ssc_device *ssc;108spinlock_t lock; /* lock for dir_mask */109unsigned short dir_mask; /* 0=unused, 1=playback, 2=capture */110unsigned short initialized; /* true if SSC has been initialized */111unsigned short daifmt;112unsigned short cmr_div;113unsigned short tcmr_period;114unsigned short rcmr_period;115struct atmel_pcm_dma_params *dma_params[2];116struct atmel_ssc_state ssc_state;117};118119int atmel_ssc_set_audio(int ssc);120121#endif /* _AT91_SSC_DAI_H */122123124