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awilliam
GitHub Repository: awilliam/linux-vfio
 Path: blob/master/sound/soc/nuc900/nuc900-audio.h
10817 views
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/*

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 * Copyright (c) 2010 Nuvoton technology corporation.

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 *

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 * Wan ZongShun <[email protected]>

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 *

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 * This program is free software; you can redistribute it and/or modify

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 * it under the terms of the GNU General Public License as published by

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 * the Free Software Foundation;version 2 of the License.

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 *

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 */

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#ifndef _NUC900_AUDIO_H

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#define _NUC900_AUDIO_H

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#include <linux/io.h>

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/* Audio Control Registers */

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#define ACTL_CON		0x00

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#define ACTL_RESET		0x04

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#define ACTL_RDSTB		0x08

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#define ACTL_RDST_LENGTH	0x0C

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#define ACTL_RDSTC		0x10

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#define ACTL_RSR		0x14

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#define ACTL_PDSTB		0x18

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#define ACTL_PDST_LENGTH	0x1C

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#define ACTL_PDSTC		0x20

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#define ACTL_PSR		0x24

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#define ACTL_IISCON		0x28

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#define ACTL_ACCON		0x2C

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#define ACTL_ACOS0		0x30

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#define ACTL_ACOS1		0x34

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#define ACTL_ACOS2		0x38

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#define ACTL_ACIS0		0x3C

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#define ACTL_ACIS1		0x40

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#define ACTL_ACIS2		0x44

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#define ACTL_COUNTER		0x48

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/* bit definition of REG_ACTL_CON register */

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#define R_DMA_IRQ		0x1000

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#define T_DMA_IRQ		0x0800

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#define IIS_AC_PIN_SEL		0x0100

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#define FIFO_TH			0x0080

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#define ADC_EN			0x0010

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#define M80_EN			0x0008

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#define ACLINK_EN		0x0004

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#define IIS_EN			0x0002

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/* bit definition of REG_ACTL_RESET register */

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#define W5691_PLAY		0x20000

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#define ACTL_RESET_BIT		0x10000

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#define RECORD_RIGHT_CHNNEL	0x08000

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#define RECORD_LEFT_CHNNEL	0x04000

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#define PLAY_RIGHT_CHNNEL	0x02000

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#define PLAY_LEFT_CHNNEL	0x01000

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#define DAC_PLAY		0x00800

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#define ADC_RECORD		0x00400

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#define M80_PLAY		0x00200

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#define AC_RECORD		0x00100

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#define AC_PLAY			0x00080

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#define IIS_RECORD		0x00040

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#define IIS_PLAY		0x00020

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#define DAC_RESET		0x00010

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#define ADC_RESET		0x00008

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#define M80_RESET		0x00004

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#define AC_RESET		0x00002

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#define IIS_RESET		0x00001

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/* bit definition of REG_ACTL_ACCON register */

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#define AC_BCLK_PU_EN		0x20

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#define AC_R_FINISH		0x10

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#define AC_W_FINISH		0x08

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#define AC_W_RES		0x04

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#define AC_C_RES		0x02

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/* bit definition of ACTL_RSR register */

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#define R_FIFO_EMPTY		0x04

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#define R_DMA_END_IRQ		0x02

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#define R_DMA_MIDDLE_IRQ	0x01

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/* bit definition of ACTL_PSR register */

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#define P_FIFO_EMPTY		0x04

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#define P_DMA_END_IRQ		0x02

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#define P_DMA_MIDDLE_IRQ	0x01

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/* bit definition of ACTL_ACOS0 register */

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#define SLOT1_VALID		0x01

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#define SLOT2_VALID		0x02

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#define SLOT3_VALID		0x04

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#define SLOT4_VALID		0x08

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#define VALID_FRAME		0x10

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/* bit definition of ACTL_ACOS1 register */

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#define R_WB			0x80

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#define CODEC_READY		0x10

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#define RESET_PRSR		0x00

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#define AUDIO_WRITE(addr, val)	__raw_writel(val, addr)

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#define AUDIO_READ(addr)	__raw_readl(addr)

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struct nuc900_audio {

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	void __iomem *mmio;

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	spinlock_t lock;

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	dma_addr_t dma_addr[2];

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	unsigned long buffersize[2];

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	unsigned long irq_num;

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	struct snd_pcm_substream *substream;

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	struct resource *res;

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	struct clk *clk;

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	struct device *dev;

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};

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extern struct nuc900_audio *nuc900_ac97_data;

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#endif /*end _NUC900_AUDIO_H */

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