/*1* tegra_das.h - Definitions for Tegra DAS driver2*3* Author: Stephen Warren <[email protected]>4* Copyright (C) 2010 - NVIDIA, Inc.5*6* This program is free software; you can redistribute it and/or7* modify it under the terms of the GNU General Public License8* version 2 as published by the Free Software Foundation.9*10* This program is distributed in the hope that it will be useful, but11* WITHOUT ANY WARRANTY; without even the implied warranty of12* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU13* General Public License for more details.14*15* You should have received a copy of the GNU General Public License16* along with this program; if not, write to the Free Software17* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA18* 02110-1301 USA19*20*/2122#ifndef __TEGRA_DAS_H__23#define __TEGRA_DAS_H__2425/* Register TEGRA_DAS_DAP_CTRL_SEL */26#define TEGRA_DAS_DAP_CTRL_SEL 0x0027#define TEGRA_DAS_DAP_CTRL_SEL_COUNT 528#define TEGRA_DAS_DAP_CTRL_SEL_STRIDE 429#define TEGRA_DAS_DAP_CTRL_SEL_DAP_MS_SEL_P 3130#define TEGRA_DAS_DAP_CTRL_SEL_DAP_MS_SEL_S 131#define TEGRA_DAS_DAP_CTRL_SEL_DAP_SDATA1_TX_RX_P 3032#define TEGRA_DAS_DAP_CTRL_SEL_DAP_SDATA1_TX_RX_S 133#define TEGRA_DAS_DAP_CTRL_SEL_DAP_SDATA2_TX_RX_P 2934#define TEGRA_DAS_DAP_CTRL_SEL_DAP_SDATA2_TX_RX_S 135#define TEGRA_DAS_DAP_CTRL_SEL_DAP_CTRL_SEL_P 036#define TEGRA_DAS_DAP_CTRL_SEL_DAP_CTRL_SEL_S 53738/* Values for field TEGRA_DAS_DAP_CTRL_SEL_DAP_CTRL_SEL */39#define TEGRA_DAS_DAP_SEL_DAC1 040#define TEGRA_DAS_DAP_SEL_DAC2 141#define TEGRA_DAS_DAP_SEL_DAC3 242#define TEGRA_DAS_DAP_SEL_DAP1 1643#define TEGRA_DAS_DAP_SEL_DAP2 1744#define TEGRA_DAS_DAP_SEL_DAP3 1845#define TEGRA_DAS_DAP_SEL_DAP4 1946#define TEGRA_DAS_DAP_SEL_DAP5 204748/* Register TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL */49#define TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL 0x4050#define TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_COUNT 351#define TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_STRIDE 452#define TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA2_SEL_P 2853#define TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA2_SEL_S 454#define TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA1_SEL_P 2455#define TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA1_SEL_S 456#define TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_CLK_SEL_P 057#define TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_CLK_SEL_S 45859/*60* Values for:61* TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA2_SEL62* TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_SDATA1_SEL63* TEGRA_DAS_DAC_INPUT_DATA_CLK_SEL_DAC_CLK_SEL64*/65#define TEGRA_DAS_DAC_SEL_DAP1 066#define TEGRA_DAS_DAC_SEL_DAP2 167#define TEGRA_DAS_DAC_SEL_DAP3 268#define TEGRA_DAS_DAC_SEL_DAP4 369#define TEGRA_DAS_DAC_SEL_DAP5 47071/*72* Names/IDs of the DACs/DAPs.73*/7475#define TEGRA_DAS_DAP_ID_1 076#define TEGRA_DAS_DAP_ID_2 177#define TEGRA_DAS_DAP_ID_3 278#define TEGRA_DAS_DAP_ID_4 379#define TEGRA_DAS_DAP_ID_5 48081#define TEGRA_DAS_DAC_ID_1 082#define TEGRA_DAS_DAC_ID_2 183#define TEGRA_DAS_DAC_ID_3 28485struct tegra_das {86struct device *dev;87void __iomem *regs;88struct dentry *debug;89};9091/*92* Terminology:93* DAS: Digital audio switch (HW module controlled by this driver)94* DAP: Digital audio port (port/pins on Tegra device)95* DAC: Digital audio controller (e.g. I2S or AC97 controller elsewhere)96*97* The Tegra DAS is a mux/cross-bar which can connect each DAP to a specific98* DAC, or another DAP. When DAPs are connected, one must be the master and99* one the slave. Each DAC allows selection of a specific DAP for input, to100* cater for the case where N DAPs are connected to 1 DAC for broadcast101* output.102*103* This driver is dumb; no attempt is made to ensure that a valid routing104* configuration is programmed.105*/106107/*108* Connect a DAP to to a DAC109* dap_id: DAP to connect: TEGRA_DAS_DAP_ID_*110* dac_sel: DAC to connect to: TEGRA_DAS_DAP_SEL_DAC*111*/112extern int tegra_das_connect_dap_to_dac(int dap_id, int dac_sel);113114/*115* Connect a DAP to to another DAP116* dap_id: DAP to connect: TEGRA_DAS_DAP_ID_*117* other_dap_sel: DAP to connect to: TEGRA_DAS_DAP_SEL_DAP*118* master: Is this DAP the master (1) or slave (0)119* sdata1rx: Is this DAP's SDATA1 pin RX (1) or TX (0)120* sdata2rx: Is this DAP's SDATA2 pin RX (1) or TX (0)121*/122extern int tegra_das_connect_dap_to_dap(int dap_id, int other_dap_sel,123int master, int sdata1rx,124int sdata2rx);125126/*127* Connect a DAC's input to a DAP128* (DAC outputs are selected by the DAP)129* dac_id: DAC ID to connect: TEGRA_DAS_DAC_ID_*130* dap_sel: DAP to receive input from: TEGRA_DAS_DAC_SEL_DAP*131*/132extern int tegra_das_connect_dac_to_dap(int dac_id, int dap_sel);133134#endif135136137