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bytecodealliance
GitHub Repository: bytecodealliance/wasmtime
Path: blob/main/cranelift/codegen/src/isa/s390x/inst/emit_tests.rs
3088 views
1
use crate::ir::{MemFlags, TrapCode};
2
use crate::isa::s390x::inst::*;
3
use crate::isa::s390x::settings as s390x_settings;
4
5
#[cfg(test)]
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fn simm20_zero() -> SImm20 {
7
SImm20::maybe_from_i64(0).unwrap()
8
}
9
10
#[test]
11
fn test_s390x_binemit() {
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let mut insns = Vec::<(Inst, &str, &str)>::new();
13
14
insns.push((Inst::Nop0, "", "nop-zero-len"));
15
insns.push((Inst::Nop2, "0707", "nop"));
16
17
insns.push((
18
Inst::AluRRR {
19
alu_op: ALUOp::Add32,
20
rd: writable_gpr(1),
21
rn: gpr(2),
22
rm: gpr(3),
23
},
24
"B9F83012",
25
"ark %r1, %r2, %r3",
26
));
27
insns.push((
28
Inst::AluRRR {
29
alu_op: ALUOp::Add64,
30
rd: writable_gpr(4),
31
rn: gpr(5),
32
rm: gpr(6),
33
},
34
"B9E86045",
35
"agrk %r4, %r5, %r6",
36
));
37
insns.push((
38
Inst::AluRRR {
39
alu_op: ALUOp::AddLogical32,
40
rd: writable_gpr(1),
41
rn: gpr(2),
42
rm: gpr(3),
43
},
44
"B9FA3012",
45
"alrk %r1, %r2, %r3",
46
));
47
insns.push((
48
Inst::AluRRR {
49
alu_op: ALUOp::AddLogical64,
50
rd: writable_gpr(4),
51
rn: gpr(5),
52
rm: gpr(6),
53
},
54
"B9EA6045",
55
"algrk %r4, %r5, %r6",
56
));
57
insns.push((
58
Inst::AluRRR {
59
alu_op: ALUOp::Sub32,
60
rd: writable_gpr(1),
61
rn: gpr(2),
62
rm: gpr(3),
63
},
64
"B9F93012",
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"srk %r1, %r2, %r3",
66
));
67
insns.push((
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Inst::AluRRR {
69
alu_op: ALUOp::Sub64,
70
rd: writable_gpr(4),
71
rn: gpr(5),
72
rm: gpr(6),
73
},
74
"B9E96045",
75
"sgrk %r4, %r5, %r6",
76
));
77
insns.push((
78
Inst::AluRRR {
79
alu_op: ALUOp::SubLogical32,
80
rd: writable_gpr(1),
81
rn: gpr(2),
82
rm: gpr(3),
83
},
84
"B9FB3012",
85
"slrk %r1, %r2, %r3",
86
));
87
insns.push((
88
Inst::AluRRR {
89
alu_op: ALUOp::SubLogical64,
90
rd: writable_gpr(4),
91
rn: gpr(5),
92
rm: gpr(6),
93
},
94
"B9EB6045",
95
"slgrk %r4, %r5, %r6",
96
));
97
insns.push((
98
Inst::AluRRR {
99
alu_op: ALUOp::Mul32,
100
rd: writable_gpr(1),
101
rn: gpr(2),
102
rm: gpr(3),
103
},
104
"B9FD3012",
105
"msrkc %r1, %r2, %r3",
106
));
107
insns.push((
108
Inst::AluRRR {
109
alu_op: ALUOp::Mul64,
110
rd: writable_gpr(4),
111
rn: gpr(5),
112
rm: gpr(6),
113
},
114
"B9ED6045",
115
"msgrkc %r4, %r5, %r6",
116
));
117
insns.push((
118
Inst::AluRRR {
119
alu_op: ALUOp::And32,
120
rd: writable_gpr(1),
121
rn: gpr(2),
122
rm: gpr(3),
123
},
124
"B9F43012",
125
"nrk %r1, %r2, %r3",
126
));
127
insns.push((
128
Inst::AluRRR {
129
alu_op: ALUOp::And64,
130
rd: writable_gpr(4),
131
rn: gpr(5),
132
rm: gpr(6),
133
},
134
"B9E46045",
135
"ngrk %r4, %r5, %r6",
136
));
137
insns.push((
138
Inst::AluRRR {
139
alu_op: ALUOp::Orr32,
140
rd: writable_gpr(1),
141
rn: gpr(2),
142
rm: gpr(3),
143
},
144
"B9F63012",
145
"ork %r1, %r2, %r3",
146
));
147
insns.push((
148
Inst::AluRRR {
149
alu_op: ALUOp::Orr64,
150
rd: writable_gpr(4),
151
rn: gpr(5),
152
rm: gpr(6),
153
},
154
"B9E66045",
155
"ogrk %r4, %r5, %r6",
156
));
157
insns.push((
158
Inst::AluRRR {
159
alu_op: ALUOp::Xor32,
160
rd: writable_gpr(1),
161
rn: gpr(2),
162
rm: gpr(3),
163
},
164
"B9F73012",
165
"xrk %r1, %r2, %r3",
166
));
167
insns.push((
168
Inst::AluRRR {
169
alu_op: ALUOp::Xor64,
170
rd: writable_gpr(4),
171
rn: gpr(5),
172
rm: gpr(6),
173
},
174
"B9E76045",
175
"xgrk %r4, %r5, %r6",
176
));
177
insns.push((
178
Inst::AluRRR {
179
alu_op: ALUOp::NotAnd32,
180
rd: writable_gpr(1),
181
rn: gpr(2),
182
rm: gpr(3),
183
},
184
"B9743012",
185
"nnrk %r1, %r2, %r3",
186
));
187
insns.push((
188
Inst::AluRRR {
189
alu_op: ALUOp::NotAnd64,
190
rd: writable_gpr(4),
191
rn: gpr(5),
192
rm: gpr(6),
193
},
194
"B9646045",
195
"nngrk %r4, %r5, %r6",
196
));
197
insns.push((
198
Inst::AluRRR {
199
alu_op: ALUOp::NotOrr32,
200
rd: writable_gpr(1),
201
rn: gpr(2),
202
rm: gpr(3),
203
},
204
"B9763012",
205
"nork %r1, %r2, %r3",
206
));
207
insns.push((
208
Inst::AluRRR {
209
alu_op: ALUOp::NotOrr64,
210
rd: writable_gpr(4),
211
rn: gpr(5),
212
rm: gpr(6),
213
},
214
"B9666045",
215
"nogrk %r4, %r5, %r6",
216
));
217
insns.push((
218
Inst::AluRRR {
219
alu_op: ALUOp::NotXor32,
220
rd: writable_gpr(1),
221
rn: gpr(2),
222
rm: gpr(3),
223
},
224
"B9773012",
225
"nxrk %r1, %r2, %r3",
226
));
227
insns.push((
228
Inst::AluRRR {
229
alu_op: ALUOp::NotXor64,
230
rd: writable_gpr(4),
231
rn: gpr(5),
232
rm: gpr(6),
233
},
234
"B9676045",
235
"nxgrk %r4, %r5, %r6",
236
));
237
insns.push((
238
Inst::AluRRR {
239
alu_op: ALUOp::AndNot32,
240
rd: writable_gpr(1),
241
rn: gpr(2),
242
rm: gpr(3),
243
},
244
"B9F53012",
245
"ncrk %r1, %r2, %r3",
246
));
247
insns.push((
248
Inst::AluRRR {
249
alu_op: ALUOp::AndNot64,
250
rd: writable_gpr(4),
251
rn: gpr(5),
252
rm: gpr(6),
253
},
254
"B9E56045",
255
"ncgrk %r4, %r5, %r6",
256
));
257
insns.push((
258
Inst::AluRRR {
259
alu_op: ALUOp::OrrNot32,
260
rd: writable_gpr(1),
261
rn: gpr(2),
262
rm: gpr(3),
263
},
264
"B9753012",
265
"ocrk %r1, %r2, %r3",
266
));
267
insns.push((
268
Inst::AluRRR {
269
alu_op: ALUOp::OrrNot64,
270
rd: writable_gpr(4),
271
rn: gpr(5),
272
rm: gpr(6),
273
},
274
"B9656045",
275
"ocgrk %r4, %r5, %r6",
276
));
277
278
insns.push((
279
Inst::AluRRSImm16 {
280
alu_op: ALUOp::Add32,
281
rd: writable_gpr(4),
282
rn: gpr(5),
283
imm: -32768,
284
},
285
"EC45800000D8",
286
"ahik %r4, %r5, -32768",
287
));
288
insns.push((
289
Inst::AluRRSImm16 {
290
alu_op: ALUOp::Add32,
291
rd: writable_gpr(4),
292
rn: gpr(5),
293
imm: 32767,
294
},
295
"EC457FFF00D8",
296
"ahik %r4, %r5, 32767",
297
));
298
insns.push((
299
Inst::AluRRSImm16 {
300
alu_op: ALUOp::Add64,
301
rd: writable_gpr(4),
302
rn: gpr(5),
303
imm: -32768,
304
},
305
"EC45800000D9",
306
"aghik %r4, %r5, -32768",
307
));
308
insns.push((
309
Inst::AluRRSImm16 {
310
alu_op: ALUOp::Add64,
311
rd: writable_gpr(4),
312
rn: gpr(5),
313
imm: 32767,
314
},
315
"EC457FFF00D9",
316
"aghik %r4, %r5, 32767",
317
));
318
319
insns.push((
320
Inst::AluRR {
321
alu_op: ALUOp::Add32,
322
rd: writable_gpr(1),
323
ri: gpr(1),
324
rm: gpr(2),
325
},
326
"1A12",
327
"ar %r1, %r2",
328
));
329
insns.push((
330
Inst::AluRR {
331
alu_op: ALUOp::Add64,
332
rd: writable_gpr(4),
333
ri: gpr(4),
334
rm: gpr(5),
335
},
336
"B9080045",
337
"agr %r4, %r5",
338
));
339
insns.push((
340
Inst::AluRR {
341
alu_op: ALUOp::Add64Ext32,
342
rd: writable_gpr(4),
343
ri: gpr(4),
344
rm: gpr(5),
345
},
346
"B9180045",
347
"agfr %r4, %r5",
348
));
349
insns.push((
350
Inst::AluRR {
351
alu_op: ALUOp::AddLogical32,
352
rd: writable_gpr(1),
353
ri: gpr(1),
354
rm: gpr(2),
355
},
356
"1E12",
357
"alr %r1, %r2",
358
));
359
insns.push((
360
Inst::AluRR {
361
alu_op: ALUOp::AddLogical64,
362
rd: writable_gpr(4),
363
ri: gpr(4),
364
rm: gpr(5),
365
},
366
"B90A0045",
367
"algr %r4, %r5",
368
));
369
insns.push((
370
Inst::AluRR {
371
alu_op: ALUOp::AddLogical64Ext32,
372
rd: writable_gpr(4),
373
ri: gpr(4),
374
rm: gpr(5),
375
},
376
"B91A0045",
377
"algfr %r4, %r5",
378
));
379
insns.push((
380
Inst::AluRR {
381
alu_op: ALUOp::Sub32,
382
rd: writable_gpr(1),
383
ri: gpr(1),
384
rm: gpr(2),
385
},
386
"1B12",
387
"sr %r1, %r2",
388
));
389
insns.push((
390
Inst::AluRR {
391
alu_op: ALUOp::Sub64,
392
rd: writable_gpr(4),
393
ri: gpr(4),
394
rm: gpr(5),
395
},
396
"B9090045",
397
"sgr %r4, %r5",
398
));
399
insns.push((
400
Inst::AluRR {
401
alu_op: ALUOp::Sub64Ext32,
402
rd: writable_gpr(4),
403
ri: gpr(4),
404
rm: gpr(5),
405
},
406
"B9190045",
407
"sgfr %r4, %r5",
408
));
409
insns.push((
410
Inst::AluRR {
411
alu_op: ALUOp::SubLogical32,
412
rd: writable_gpr(1),
413
ri: gpr(1),
414
rm: gpr(2),
415
},
416
"1F12",
417
"slr %r1, %r2",
418
));
419
insns.push((
420
Inst::AluRR {
421
alu_op: ALUOp::SubLogical64,
422
rd: writable_gpr(4),
423
ri: gpr(4),
424
rm: gpr(5),
425
},
426
"B90B0045",
427
"slgr %r4, %r5",
428
));
429
insns.push((
430
Inst::AluRR {
431
alu_op: ALUOp::SubLogical64Ext32,
432
rd: writable_gpr(4),
433
ri: gpr(4),
434
rm: gpr(5),
435
},
436
"B91B0045",
437
"slgfr %r4, %r5",
438
));
439
insns.push((
440
Inst::AluRR {
441
alu_op: ALUOp::Mul32,
442
rd: writable_gpr(1),
443
ri: gpr(1),
444
rm: gpr(2),
445
},
446
"B2520012",
447
"msr %r1, %r2",
448
));
449
insns.push((
450
Inst::AluRR {
451
alu_op: ALUOp::Mul64,
452
rd: writable_gpr(4),
453
ri: gpr(4),
454
rm: gpr(5),
455
},
456
"B90C0045",
457
"msgr %r4, %r5",
458
));
459
insns.push((
460
Inst::AluRR {
461
alu_op: ALUOp::Mul64Ext32,
462
rd: writable_gpr(4),
463
ri: gpr(4),
464
rm: gpr(5),
465
},
466
"B91C0045",
467
"msgfr %r4, %r5",
468
));
469
insns.push((
470
Inst::AluRR {
471
alu_op: ALUOp::And32,
472
rd: writable_gpr(1),
473
ri: gpr(1),
474
rm: gpr(2),
475
},
476
"1412",
477
"nr %r1, %r2",
478
));
479
insns.push((
480
Inst::AluRR {
481
alu_op: ALUOp::And64,
482
rd: writable_gpr(4),
483
ri: gpr(4),
484
rm: gpr(5),
485
},
486
"B9800045",
487
"ngr %r4, %r5",
488
));
489
insns.push((
490
Inst::AluRR {
491
alu_op: ALUOp::Orr32,
492
rd: writable_gpr(1),
493
ri: gpr(1),
494
rm: gpr(2),
495
},
496
"1612",
497
"or %r1, %r2",
498
));
499
insns.push((
500
Inst::AluRR {
501
alu_op: ALUOp::Orr64,
502
rd: writable_gpr(4),
503
ri: gpr(4),
504
rm: gpr(5),
505
},
506
"B9810045",
507
"ogr %r4, %r5",
508
));
509
insns.push((
510
Inst::AluRR {
511
alu_op: ALUOp::Xor32,
512
rd: writable_gpr(1),
513
ri: gpr(1),
514
rm: gpr(2),
515
},
516
"1712",
517
"xr %r1, %r2",
518
));
519
insns.push((
520
Inst::AluRR {
521
alu_op: ALUOp::Xor64,
522
rd: writable_gpr(4),
523
ri: gpr(4),
524
rm: gpr(5),
525
},
526
"B9820045",
527
"xgr %r4, %r5",
528
));
529
530
insns.push((
531
Inst::AluRX {
532
alu_op: ALUOp::Add32,
533
rd: writable_gpr(1),
534
ri: gpr(1),
535
mem: MemArg::BXD12 {
536
base: gpr(2),
537
index: zero_reg(),
538
disp: UImm12::zero(),
539
flags: MemFlags::trusted(),
540
},
541
},
542
"5A102000",
543
"a %r1, 0(%r2)",
544
));
545
insns.push((
546
Inst::AluRX {
547
alu_op: ALUOp::Add32Ext16,
548
rd: writable_gpr(1),
549
ri: gpr(1),
550
mem: MemArg::BXD12 {
551
base: gpr(2),
552
index: zero_reg(),
553
disp: UImm12::zero(),
554
flags: MemFlags::trusted(),
555
},
556
},
557
"4A102000",
558
"ah %r1, 0(%r2)",
559
));
560
insns.push((
561
Inst::AluRX {
562
alu_op: ALUOp::Add32,
563
rd: writable_gpr(1),
564
ri: gpr(1),
565
mem: MemArg::BXD20 {
566
base: gpr(2),
567
index: zero_reg(),
568
disp: simm20_zero(),
569
flags: MemFlags::trusted(),
570
},
571
},
572
"E3102000005A",
573
"ay %r1, 0(%r2)",
574
));
575
insns.push((
576
Inst::AluRX {
577
alu_op: ALUOp::Add32Ext16,
578
rd: writable_gpr(1),
579
ri: gpr(1),
580
mem: MemArg::BXD20 {
581
base: gpr(2),
582
index: zero_reg(),
583
disp: simm20_zero(),
584
flags: MemFlags::trusted(),
585
},
586
},
587
"E3102000007A",
588
"ahy %r1, 0(%r2)",
589
));
590
insns.push((
591
Inst::AluRX {
592
alu_op: ALUOp::Add64,
593
rd: writable_gpr(1),
594
ri: gpr(1),
595
mem: MemArg::BXD12 {
596
base: gpr(2),
597
index: zero_reg(),
598
disp: UImm12::zero(),
599
flags: MemFlags::trusted(),
600
},
601
},
602
"E31020000008",
603
"ag %r1, 0(%r2)",
604
));
605
insns.push((
606
Inst::AluRX {
607
alu_op: ALUOp::Add64Ext16,
608
rd: writable_gpr(1),
609
ri: gpr(1),
610
mem: MemArg::BXD12 {
611
base: gpr(2),
612
index: zero_reg(),
613
disp: UImm12::zero(),
614
flags: MemFlags::trusted(),
615
},
616
},
617
"E31020000038",
618
"agh %r1, 0(%r2)",
619
));
620
insns.push((
621
Inst::AluRX {
622
alu_op: ALUOp::Add64Ext32,
623
rd: writable_gpr(1),
624
ri: gpr(1),
625
mem: MemArg::BXD12 {
626
base: gpr(2),
627
index: zero_reg(),
628
disp: UImm12::zero(),
629
flags: MemFlags::trusted(),
630
},
631
},
632
"E31020000018",
633
"agf %r1, 0(%r2)",
634
));
635
insns.push((
636
Inst::AluRX {
637
alu_op: ALUOp::AddLogical32,
638
rd: writable_gpr(1),
639
ri: gpr(1),
640
mem: MemArg::BXD12 {
641
base: gpr(2),
642
index: zero_reg(),
643
disp: UImm12::zero(),
644
flags: MemFlags::trusted(),
645
},
646
},
647
"5E102000",
648
"al %r1, 0(%r2)",
649
));
650
insns.push((
651
Inst::AluRX {
652
alu_op: ALUOp::AddLogical32,
653
rd: writable_gpr(1),
654
ri: gpr(1),
655
mem: MemArg::BXD20 {
656
base: gpr(2),
657
index: zero_reg(),
658
disp: simm20_zero(),
659
flags: MemFlags::trusted(),
660
},
661
},
662
"E3102000005E",
663
"aly %r1, 0(%r2)",
664
));
665
insns.push((
666
Inst::AluRX {
667
alu_op: ALUOp::AddLogical64,
668
rd: writable_gpr(1),
669
ri: gpr(1),
670
mem: MemArg::BXD12 {
671
base: gpr(2),
672
index: zero_reg(),
673
disp: UImm12::zero(),
674
flags: MemFlags::trusted(),
675
},
676
},
677
"E3102000000A",
678
"alg %r1, 0(%r2)",
679
));
680
insns.push((
681
Inst::AluRX {
682
alu_op: ALUOp::AddLogical64Ext32,
683
rd: writable_gpr(1),
684
ri: gpr(1),
685
mem: MemArg::BXD12 {
686
base: gpr(2),
687
index: zero_reg(),
688
disp: UImm12::zero(),
689
flags: MemFlags::trusted(),
690
},
691
},
692
"E3102000001A",
693
"algf %r1, 0(%r2)",
694
));
695
insns.push((
696
Inst::AluRX {
697
alu_op: ALUOp::Sub32,
698
rd: writable_gpr(1),
699
ri: gpr(1),
700
mem: MemArg::BXD12 {
701
base: gpr(2),
702
index: zero_reg(),
703
disp: UImm12::zero(),
704
flags: MemFlags::trusted(),
705
},
706
},
707
"5B102000",
708
"s %r1, 0(%r2)",
709
));
710
insns.push((
711
Inst::AluRX {
712
alu_op: ALUOp::Sub32Ext16,
713
rd: writable_gpr(1),
714
ri: gpr(1),
715
mem: MemArg::BXD12 {
716
base: gpr(2),
717
index: zero_reg(),
718
disp: UImm12::zero(),
719
flags: MemFlags::trusted(),
720
},
721
},
722
"4B102000",
723
"sh %r1, 0(%r2)",
724
));
725
insns.push((
726
Inst::AluRX {
727
alu_op: ALUOp::Sub32,
728
rd: writable_gpr(1),
729
ri: gpr(1),
730
mem: MemArg::BXD20 {
731
base: gpr(2),
732
index: zero_reg(),
733
disp: simm20_zero(),
734
flags: MemFlags::trusted(),
735
},
736
},
737
"E3102000005B",
738
"sy %r1, 0(%r2)",
739
));
740
insns.push((
741
Inst::AluRX {
742
alu_op: ALUOp::Sub32Ext16,
743
rd: writable_gpr(1),
744
ri: gpr(1),
745
mem: MemArg::BXD20 {
746
base: gpr(2),
747
index: zero_reg(),
748
disp: simm20_zero(),
749
flags: MemFlags::trusted(),
750
},
751
},
752
"E3102000007B",
753
"shy %r1, 0(%r2)",
754
));
755
insns.push((
756
Inst::AluRX {
757
alu_op: ALUOp::Sub64,
758
rd: writable_gpr(1),
759
ri: gpr(1),
760
mem: MemArg::BXD12 {
761
base: gpr(2),
762
index: zero_reg(),
763
disp: UImm12::zero(),
764
flags: MemFlags::trusted(),
765
},
766
},
767
"E31020000009",
768
"sg %r1, 0(%r2)",
769
));
770
insns.push((
771
Inst::AluRX {
772
alu_op: ALUOp::Sub64Ext16,
773
rd: writable_gpr(1),
774
ri: gpr(1),
775
mem: MemArg::BXD12 {
776
base: gpr(2),
777
index: zero_reg(),
778
disp: UImm12::zero(),
779
flags: MemFlags::trusted(),
780
},
781
},
782
"E31020000039",
783
"sgh %r1, 0(%r2)",
784
));
785
insns.push((
786
Inst::AluRX {
787
alu_op: ALUOp::Sub64Ext32,
788
rd: writable_gpr(1),
789
ri: gpr(1),
790
mem: MemArg::BXD12 {
791
base: gpr(2),
792
index: zero_reg(),
793
disp: UImm12::zero(),
794
flags: MemFlags::trusted(),
795
},
796
},
797
"E31020000019",
798
"sgf %r1, 0(%r2)",
799
));
800
insns.push((
801
Inst::AluRX {
802
alu_op: ALUOp::SubLogical32,
803
rd: writable_gpr(1),
804
ri: gpr(1),
805
mem: MemArg::BXD12 {
806
base: gpr(2),
807
index: zero_reg(),
808
disp: UImm12::zero(),
809
flags: MemFlags::trusted(),
810
},
811
},
812
"5F102000",
813
"sl %r1, 0(%r2)",
814
));
815
insns.push((
816
Inst::AluRX {
817
alu_op: ALUOp::SubLogical32,
818
rd: writable_gpr(1),
819
ri: gpr(1),
820
mem: MemArg::BXD20 {
821
base: gpr(2),
822
index: zero_reg(),
823
disp: simm20_zero(),
824
flags: MemFlags::trusted(),
825
},
826
},
827
"E3102000005F",
828
"sly %r1, 0(%r2)",
829
));
830
insns.push((
831
Inst::AluRX {
832
alu_op: ALUOp::SubLogical64,
833
rd: writable_gpr(1),
834
ri: gpr(1),
835
mem: MemArg::BXD12 {
836
base: gpr(2),
837
index: zero_reg(),
838
disp: UImm12::zero(),
839
flags: MemFlags::trusted(),
840
},
841
},
842
"E3102000000B",
843
"slg %r1, 0(%r2)",
844
));
845
insns.push((
846
Inst::AluRX {
847
alu_op: ALUOp::SubLogical64Ext32,
848
rd: writable_gpr(1),
849
ri: gpr(1),
850
mem: MemArg::BXD12 {
851
base: gpr(2),
852
index: zero_reg(),
853
disp: UImm12::zero(),
854
flags: MemFlags::trusted(),
855
},
856
},
857
"E3102000001B",
858
"slgf %r1, 0(%r2)",
859
));
860
insns.push((
861
Inst::AluRX {
862
alu_op: ALUOp::Mul32,
863
rd: writable_gpr(1),
864
ri: gpr(1),
865
mem: MemArg::BXD12 {
866
base: gpr(2),
867
index: zero_reg(),
868
disp: UImm12::zero(),
869
flags: MemFlags::trusted(),
870
},
871
},
872
"71102000",
873
"ms %r1, 0(%r2)",
874
));
875
insns.push((
876
Inst::AluRX {
877
alu_op: ALUOp::Mul32Ext16,
878
rd: writable_gpr(1),
879
ri: gpr(1),
880
mem: MemArg::BXD12 {
881
base: gpr(2),
882
index: zero_reg(),
883
disp: UImm12::zero(),
884
flags: MemFlags::trusted(),
885
},
886
},
887
"4C102000",
888
"mh %r1, 0(%r2)",
889
));
890
insns.push((
891
Inst::AluRX {
892
alu_op: ALUOp::Mul32,
893
rd: writable_gpr(1),
894
ri: gpr(1),
895
mem: MemArg::BXD20 {
896
base: gpr(2),
897
index: zero_reg(),
898
disp: simm20_zero(),
899
flags: MemFlags::trusted(),
900
},
901
},
902
"E31020000051",
903
"msy %r1, 0(%r2)",
904
));
905
insns.push((
906
Inst::AluRX {
907
alu_op: ALUOp::Mul32Ext16,
908
rd: writable_gpr(1),
909
ri: gpr(1),
910
mem: MemArg::BXD20 {
911
base: gpr(2),
912
index: zero_reg(),
913
disp: simm20_zero(),
914
flags: MemFlags::trusted(),
915
},
916
},
917
"E3102000007C",
918
"mhy %r1, 0(%r2)",
919
));
920
insns.push((
921
Inst::AluRX {
922
alu_op: ALUOp::Mul64,
923
rd: writable_gpr(1),
924
ri: gpr(1),
925
mem: MemArg::BXD12 {
926
base: gpr(2),
927
index: zero_reg(),
928
disp: UImm12::zero(),
929
flags: MemFlags::trusted(),
930
},
931
},
932
"E3102000000C",
933
"msg %r1, 0(%r2)",
934
));
935
insns.push((
936
Inst::AluRX {
937
alu_op: ALUOp::Mul64Ext16,
938
rd: writable_gpr(1),
939
ri: gpr(1),
940
mem: MemArg::BXD12 {
941
base: gpr(2),
942
index: zero_reg(),
943
disp: UImm12::zero(),
944
flags: MemFlags::trusted(),
945
},
946
},
947
"E3102000003C",
948
"mgh %r1, 0(%r2)",
949
));
950
insns.push((
951
Inst::AluRX {
952
alu_op: ALUOp::Mul64Ext32,
953
rd: writable_gpr(1),
954
ri: gpr(1),
955
mem: MemArg::BXD12 {
956
base: gpr(2),
957
index: zero_reg(),
958
disp: UImm12::zero(),
959
flags: MemFlags::trusted(),
960
},
961
},
962
"E3102000001C",
963
"msgf %r1, 0(%r2)",
964
));
965
insns.push((
966
Inst::AluRX {
967
alu_op: ALUOp::And32,
968
rd: writable_gpr(1),
969
ri: gpr(1),
970
mem: MemArg::BXD12 {
971
base: gpr(2),
972
index: zero_reg(),
973
disp: UImm12::zero(),
974
flags: MemFlags::trusted(),
975
},
976
},
977
"54102000",
978
"n %r1, 0(%r2)",
979
));
980
insns.push((
981
Inst::AluRX {
982
alu_op: ALUOp::And32,
983
rd: writable_gpr(1),
984
ri: gpr(1),
985
mem: MemArg::BXD20 {
986
base: gpr(2),
987
index: zero_reg(),
988
disp: simm20_zero(),
989
flags: MemFlags::trusted(),
990
},
991
},
992
"E31020000054",
993
"ny %r1, 0(%r2)",
994
));
995
insns.push((
996
Inst::AluRX {
997
alu_op: ALUOp::And64,
998
rd: writable_gpr(1),
999
ri: gpr(1),
1000
mem: MemArg::BXD12 {
1001
base: gpr(2),
1002
index: zero_reg(),
1003
disp: UImm12::zero(),
1004
flags: MemFlags::trusted(),
1005
},
1006
},
1007
"E31020000080",
1008
"ng %r1, 0(%r2)",
1009
));
1010
insns.push((
1011
Inst::AluRX {
1012
alu_op: ALUOp::Orr32,
1013
rd: writable_gpr(1),
1014
ri: gpr(1),
1015
mem: MemArg::BXD12 {
1016
base: gpr(2),
1017
index: zero_reg(),
1018
disp: UImm12::zero(),
1019
flags: MemFlags::trusted(),
1020
},
1021
},
1022
"56102000",
1023
"o %r1, 0(%r2)",
1024
));
1025
insns.push((
1026
Inst::AluRX {
1027
alu_op: ALUOp::Orr32,
1028
rd: writable_gpr(1),
1029
ri: gpr(1),
1030
mem: MemArg::BXD20 {
1031
base: gpr(2),
1032
index: zero_reg(),
1033
disp: simm20_zero(),
1034
flags: MemFlags::trusted(),
1035
},
1036
},
1037
"E31020000056",
1038
"oy %r1, 0(%r2)",
1039
));
1040
insns.push((
1041
Inst::AluRX {
1042
alu_op: ALUOp::Orr64,
1043
rd: writable_gpr(1),
1044
ri: gpr(1),
1045
mem: MemArg::BXD12 {
1046
base: gpr(2),
1047
index: zero_reg(),
1048
disp: UImm12::zero(),
1049
flags: MemFlags::trusted(),
1050
},
1051
},
1052
"E31020000081",
1053
"og %r1, 0(%r2)",
1054
));
1055
insns.push((
1056
Inst::AluRX {
1057
alu_op: ALUOp::Xor32,
1058
rd: writable_gpr(1),
1059
ri: gpr(1),
1060
mem: MemArg::BXD12 {
1061
base: gpr(2),
1062
index: zero_reg(),
1063
disp: UImm12::zero(),
1064
flags: MemFlags::trusted(),
1065
},
1066
},
1067
"57102000",
1068
"x %r1, 0(%r2)",
1069
));
1070
insns.push((
1071
Inst::AluRX {
1072
alu_op: ALUOp::Xor32,
1073
rd: writable_gpr(1),
1074
ri: gpr(1),
1075
mem: MemArg::BXD20 {
1076
base: gpr(2),
1077
index: zero_reg(),
1078
disp: simm20_zero(),
1079
flags: MemFlags::trusted(),
1080
},
1081
},
1082
"E31020000057",
1083
"xy %r1, 0(%r2)",
1084
));
1085
insns.push((
1086
Inst::AluRX {
1087
alu_op: ALUOp::Xor64,
1088
rd: writable_gpr(1),
1089
ri: gpr(1),
1090
mem: MemArg::BXD12 {
1091
base: gpr(2),
1092
index: zero_reg(),
1093
disp: UImm12::zero(),
1094
flags: MemFlags::trusted(),
1095
},
1096
},
1097
"E31020000082",
1098
"xg %r1, 0(%r2)",
1099
));
1100
1101
insns.push((
1102
Inst::AluRSImm16 {
1103
alu_op: ALUOp::Add32,
1104
rd: writable_gpr(7),
1105
ri: gpr(7),
1106
imm: -32768,
1107
},
1108
"A77A8000",
1109
"ahi %r7, -32768",
1110
));
1111
insns.push((
1112
Inst::AluRSImm16 {
1113
alu_op: ALUOp::Add32,
1114
rd: writable_gpr(7),
1115
ri: gpr(7),
1116
imm: 32767,
1117
},
1118
"A77A7FFF",
1119
"ahi %r7, 32767",
1120
));
1121
insns.push((
1122
Inst::AluRSImm16 {
1123
alu_op: ALUOp::Add64,
1124
rd: writable_gpr(7),
1125
ri: gpr(7),
1126
imm: -32768,
1127
},
1128
"A77B8000",
1129
"aghi %r7, -32768",
1130
));
1131
insns.push((
1132
Inst::AluRSImm16 {
1133
alu_op: ALUOp::Add64,
1134
rd: writable_gpr(7),
1135
ri: gpr(7),
1136
imm: 32767,
1137
},
1138
"A77B7FFF",
1139
"aghi %r7, 32767",
1140
));
1141
insns.push((
1142
Inst::AluRSImm16 {
1143
alu_op: ALUOp::Mul32,
1144
rd: writable_gpr(7),
1145
ri: gpr(7),
1146
imm: -32768,
1147
},
1148
"A77C8000",
1149
"mhi %r7, -32768",
1150
));
1151
insns.push((
1152
Inst::AluRSImm16 {
1153
alu_op: ALUOp::Mul32,
1154
rd: writable_gpr(7),
1155
ri: gpr(7),
1156
imm: 32767,
1157
},
1158
"A77C7FFF",
1159
"mhi %r7, 32767",
1160
));
1161
insns.push((
1162
Inst::AluRSImm16 {
1163
alu_op: ALUOp::Mul64,
1164
rd: writable_gpr(7),
1165
ri: gpr(7),
1166
imm: -32768,
1167
},
1168
"A77D8000",
1169
"mghi %r7, -32768",
1170
));
1171
insns.push((
1172
Inst::AluRSImm16 {
1173
alu_op: ALUOp::Mul64,
1174
rd: writable_gpr(7),
1175
ri: gpr(7),
1176
imm: 32767,
1177
},
1178
"A77D7FFF",
1179
"mghi %r7, 32767",
1180
));
1181
1182
insns.push((
1183
Inst::AluRSImm32 {
1184
alu_op: ALUOp::Add32,
1185
rd: writable_gpr(7),
1186
ri: gpr(7),
1187
imm: -2147483648,
1188
},
1189
"C27980000000",
1190
"afi %r7, -2147483648",
1191
));
1192
insns.push((
1193
Inst::AluRSImm32 {
1194
alu_op: ALUOp::Add32,
1195
rd: writable_gpr(7),
1196
ri: gpr(7),
1197
imm: 2147483647,
1198
},
1199
"C2797FFFFFFF",
1200
"afi %r7, 2147483647",
1201
));
1202
insns.push((
1203
Inst::AluRSImm32 {
1204
alu_op: ALUOp::Mul32,
1205
rd: writable_gpr(7),
1206
ri: gpr(7),
1207
imm: -2147483648,
1208
},
1209
"C27180000000",
1210
"msfi %r7, -2147483648",
1211
));
1212
insns.push((
1213
Inst::AluRSImm32 {
1214
alu_op: ALUOp::Mul32,
1215
rd: writable_gpr(7),
1216
ri: gpr(7),
1217
imm: 2147483647,
1218
},
1219
"C2717FFFFFFF",
1220
"msfi %r7, 2147483647",
1221
));
1222
insns.push((
1223
Inst::AluRSImm32 {
1224
alu_op: ALUOp::Add64,
1225
rd: writable_gpr(7),
1226
ri: gpr(7),
1227
imm: -2147483648,
1228
},
1229
"C27880000000",
1230
"agfi %r7, -2147483648",
1231
));
1232
insns.push((
1233
Inst::AluRSImm32 {
1234
alu_op: ALUOp::Add64,
1235
rd: writable_gpr(7),
1236
ri: gpr(7),
1237
imm: 2147483647,
1238
},
1239
"C2787FFFFFFF",
1240
"agfi %r7, 2147483647",
1241
));
1242
insns.push((
1243
Inst::AluRSImm32 {
1244
alu_op: ALUOp::Mul64,
1245
rd: writable_gpr(7),
1246
ri: gpr(7),
1247
imm: -2147483648,
1248
},
1249
"C27080000000",
1250
"msgfi %r7, -2147483648",
1251
));
1252
insns.push((
1253
Inst::AluRSImm32 {
1254
alu_op: ALUOp::Mul64,
1255
rd: writable_gpr(7),
1256
ri: gpr(7),
1257
imm: 2147483647,
1258
},
1259
"C2707FFFFFFF",
1260
"msgfi %r7, 2147483647",
1261
));
1262
1263
insns.push((
1264
Inst::AluRUImm32 {
1265
alu_op: ALUOp::AddLogical32,
1266
rd: writable_gpr(7),
1267
ri: gpr(7),
1268
imm: 0,
1269
},
1270
"C27B00000000",
1271
"alfi %r7, 0",
1272
));
1273
insns.push((
1274
Inst::AluRUImm32 {
1275
alu_op: ALUOp::AddLogical32,
1276
rd: writable_gpr(7),
1277
ri: gpr(7),
1278
imm: 4294967295,
1279
},
1280
"C27BFFFFFFFF",
1281
"alfi %r7, 4294967295",
1282
));
1283
insns.push((
1284
Inst::AluRUImm32 {
1285
alu_op: ALUOp::SubLogical32,
1286
rd: writable_gpr(7),
1287
ri: gpr(7),
1288
imm: 0,
1289
},
1290
"C27500000000",
1291
"slfi %r7, 0",
1292
));
1293
insns.push((
1294
Inst::AluRUImm32 {
1295
alu_op: ALUOp::SubLogical32,
1296
rd: writable_gpr(7),
1297
ri: gpr(7),
1298
imm: 4294967295,
1299
},
1300
"C275FFFFFFFF",
1301
"slfi %r7, 4294967295",
1302
));
1303
insns.push((
1304
Inst::AluRUImm32 {
1305
alu_op: ALUOp::AddLogical64,
1306
rd: writable_gpr(7),
1307
ri: gpr(7),
1308
imm: 0,
1309
},
1310
"C27A00000000",
1311
"algfi %r7, 0",
1312
));
1313
insns.push((
1314
Inst::AluRUImm32 {
1315
alu_op: ALUOp::AddLogical64,
1316
rd: writable_gpr(7),
1317
ri: gpr(7),
1318
imm: 4294967295,
1319
},
1320
"C27AFFFFFFFF",
1321
"algfi %r7, 4294967295",
1322
));
1323
insns.push((
1324
Inst::AluRUImm32 {
1325
alu_op: ALUOp::SubLogical64,
1326
rd: writable_gpr(7),
1327
ri: gpr(7),
1328
imm: 0,
1329
},
1330
"C27400000000",
1331
"slgfi %r7, 0",
1332
));
1333
insns.push((
1334
Inst::AluRUImm32 {
1335
alu_op: ALUOp::SubLogical64,
1336
rd: writable_gpr(7),
1337
ri: gpr(7),
1338
imm: 4294967295,
1339
},
1340
"C274FFFFFFFF",
1341
"slgfi %r7, 4294967295",
1342
));
1343
1344
insns.push((
1345
Inst::AluRUImm16Shifted {
1346
alu_op: ALUOp::And32,
1347
rd: writable_gpr(8),
1348
ri: gpr(8),
1349
imm: UImm16Shifted::maybe_from_u64(0x0000_ffff).unwrap(),
1350
},
1351
"A587FFFF",
1352
"nill %r8, 65535",
1353
));
1354
insns.push((
1355
Inst::AluRUImm16Shifted {
1356
alu_op: ALUOp::And32,
1357
rd: writable_gpr(8),
1358
ri: gpr(8),
1359
imm: UImm16Shifted::maybe_from_u64(0xffff_0000).unwrap(),
1360
},
1361
"A586FFFF",
1362
"nilh %r8, 65535",
1363
));
1364
insns.push((
1365
Inst::AluRUImm16Shifted {
1366
alu_op: ALUOp::And64,
1367
rd: writable_gpr(8),
1368
ri: gpr(8),
1369
imm: UImm16Shifted::maybe_from_u64(0x0000_0000_0000_ffff).unwrap(),
1370
},
1371
"A587FFFF",
1372
"nill %r8, 65535",
1373
));
1374
insns.push((
1375
Inst::AluRUImm16Shifted {
1376
alu_op: ALUOp::And64,
1377
rd: writable_gpr(8),
1378
ri: gpr(8),
1379
imm: UImm16Shifted::maybe_from_u64(0x0000_0000_ffff_0000).unwrap(),
1380
},
1381
"A586FFFF",
1382
"nilh %r8, 65535",
1383
));
1384
insns.push((
1385
Inst::AluRUImm16Shifted {
1386
alu_op: ALUOp::And64,
1387
rd: writable_gpr(8),
1388
ri: gpr(8),
1389
imm: UImm16Shifted::maybe_from_u64(0x0000_ffff_0000_0000).unwrap(),
1390
},
1391
"A585FFFF",
1392
"nihl %r8, 65535",
1393
));
1394
insns.push((
1395
Inst::AluRUImm16Shifted {
1396
alu_op: ALUOp::And64,
1397
rd: writable_gpr(8),
1398
ri: gpr(8),
1399
imm: UImm16Shifted::maybe_from_u64(0xffff_0000_0000_0000).unwrap(),
1400
},
1401
"A584FFFF",
1402
"nihh %r8, 65535",
1403
));
1404
insns.push((
1405
Inst::AluRUImm16Shifted {
1406
alu_op: ALUOp::Orr32,
1407
rd: writable_gpr(8),
1408
ri: gpr(8),
1409
imm: UImm16Shifted::maybe_from_u64(0x0000_ffff).unwrap(),
1410
},
1411
"A58BFFFF",
1412
"oill %r8, 65535",
1413
));
1414
insns.push((
1415
Inst::AluRUImm16Shifted {
1416
alu_op: ALUOp::Orr32,
1417
rd: writable_gpr(8),
1418
ri: gpr(8),
1419
imm: UImm16Shifted::maybe_from_u64(0xffff_0000).unwrap(),
1420
},
1421
"A58AFFFF",
1422
"oilh %r8, 65535",
1423
));
1424
insns.push((
1425
Inst::AluRUImm16Shifted {
1426
alu_op: ALUOp::Orr64,
1427
rd: writable_gpr(8),
1428
ri: gpr(8),
1429
imm: UImm16Shifted::maybe_from_u64(0x0000_0000_0000_ffff).unwrap(),
1430
},
1431
"A58BFFFF",
1432
"oill %r8, 65535",
1433
));
1434
insns.push((
1435
Inst::AluRUImm16Shifted {
1436
alu_op: ALUOp::Orr64,
1437
rd: writable_gpr(8),
1438
ri: gpr(8),
1439
imm: UImm16Shifted::maybe_from_u64(0x0000_0000_ffff_0000).unwrap(),
1440
},
1441
"A58AFFFF",
1442
"oilh %r8, 65535",
1443
));
1444
insns.push((
1445
Inst::AluRUImm16Shifted {
1446
alu_op: ALUOp::Orr64,
1447
rd: writable_gpr(8),
1448
ri: gpr(8),
1449
imm: UImm16Shifted::maybe_from_u64(0x0000_ffff_0000_0000).unwrap(),
1450
},
1451
"A589FFFF",
1452
"oihl %r8, 65535",
1453
));
1454
insns.push((
1455
Inst::AluRUImm16Shifted {
1456
alu_op: ALUOp::Orr64,
1457
rd: writable_gpr(8),
1458
ri: gpr(8),
1459
imm: UImm16Shifted::maybe_from_u64(0xffff_0000_0000_0000).unwrap(),
1460
},
1461
"A588FFFF",
1462
"oihh %r8, 65535",
1463
));
1464
1465
insns.push((
1466
Inst::AluRUImm32Shifted {
1467
alu_op: ALUOp::And32,
1468
rd: writable_gpr(8),
1469
ri: gpr(8),
1470
imm: UImm32Shifted::maybe_from_u64(0xffff_ffff).unwrap(),
1471
},
1472
"C08BFFFFFFFF",
1473
"nilf %r8, 4294967295",
1474
));
1475
insns.push((
1476
Inst::AluRUImm32Shifted {
1477
alu_op: ALUOp::And64,
1478
rd: writable_gpr(8),
1479
ri: gpr(8),
1480
imm: UImm32Shifted::maybe_from_u64(0x0000_0000_ffff_ffff).unwrap(),
1481
},
1482
"C08BFFFFFFFF",
1483
"nilf %r8, 4294967295",
1484
));
1485
insns.push((
1486
Inst::AluRUImm32Shifted {
1487
alu_op: ALUOp::And64,
1488
rd: writable_gpr(8),
1489
ri: gpr(8),
1490
imm: UImm32Shifted::maybe_from_u64(0xffff_ffff_0000_0000).unwrap(),
1491
},
1492
"C08AFFFFFFFF",
1493
"nihf %r8, 4294967295",
1494
));
1495
insns.push((
1496
Inst::AluRUImm32Shifted {
1497
alu_op: ALUOp::Orr32,
1498
rd: writable_gpr(8),
1499
ri: gpr(8),
1500
imm: UImm32Shifted::maybe_from_u64(0xffff_ffff).unwrap(),
1501
},
1502
"C08DFFFFFFFF",
1503
"oilf %r8, 4294967295",
1504
));
1505
insns.push((
1506
Inst::AluRUImm32Shifted {
1507
alu_op: ALUOp::Orr64,
1508
rd: writable_gpr(8),
1509
ri: gpr(8),
1510
imm: UImm32Shifted::maybe_from_u64(0x0000_0000_ffff_ffff).unwrap(),
1511
},
1512
"C08DFFFFFFFF",
1513
"oilf %r8, 4294967295",
1514
));
1515
insns.push((
1516
Inst::AluRUImm32Shifted {
1517
alu_op: ALUOp::Orr64,
1518
rd: writable_gpr(8),
1519
ri: gpr(8),
1520
imm: UImm32Shifted::maybe_from_u64(0xffff_ffff_0000_0000).unwrap(),
1521
},
1522
"C08CFFFFFFFF",
1523
"oihf %r8, 4294967295",
1524
));
1525
insns.push((
1526
Inst::AluRUImm32Shifted {
1527
alu_op: ALUOp::Xor32,
1528
rd: writable_gpr(8),
1529
ri: gpr(8),
1530
imm: UImm32Shifted::maybe_from_u64(0xffff_ffff).unwrap(),
1531
},
1532
"C087FFFFFFFF",
1533
"xilf %r8, 4294967295",
1534
));
1535
insns.push((
1536
Inst::AluRUImm32Shifted {
1537
alu_op: ALUOp::Xor64,
1538
rd: writable_gpr(8),
1539
ri: gpr(8),
1540
imm: UImm32Shifted::maybe_from_u64(0x0000_0000_ffff_ffff).unwrap(),
1541
},
1542
"C087FFFFFFFF",
1543
"xilf %r8, 4294967295",
1544
));
1545
insns.push((
1546
Inst::AluRUImm32Shifted {
1547
alu_op: ALUOp::Xor64,
1548
rd: writable_gpr(8),
1549
ri: gpr(8),
1550
imm: UImm32Shifted::maybe_from_u64(0xffff_ffff_0000_0000).unwrap(),
1551
},
1552
"C086FFFFFFFF",
1553
"xihf %r8, 4294967295",
1554
));
1555
1556
insns.push((
1557
Inst::UnaryRR {
1558
op: UnaryOp::Abs32,
1559
rd: writable_gpr(1),
1560
rn: gpr(10),
1561
},
1562
"101A",
1563
"lpr %r1, %r10",
1564
));
1565
insns.push((
1566
Inst::UnaryRR {
1567
op: UnaryOp::Abs64,
1568
rd: writable_gpr(1),
1569
rn: gpr(10),
1570
},
1571
"B900001A",
1572
"lpgr %r1, %r10",
1573
));
1574
insns.push((
1575
Inst::UnaryRR {
1576
op: UnaryOp::Abs64Ext32,
1577
rd: writable_gpr(1),
1578
rn: gpr(10),
1579
},
1580
"B910001A",
1581
"lpgfr %r1, %r10",
1582
));
1583
insns.push((
1584
Inst::UnaryRR {
1585
op: UnaryOp::Neg32,
1586
rd: writable_gpr(1),
1587
rn: gpr(10),
1588
},
1589
"131A",
1590
"lcr %r1, %r10",
1591
));
1592
insns.push((
1593
Inst::UnaryRR {
1594
op: UnaryOp::Neg64,
1595
rd: writable_gpr(1),
1596
rn: gpr(10),
1597
},
1598
"B903001A",
1599
"lcgr %r1, %r10",
1600
));
1601
insns.push((
1602
Inst::UnaryRR {
1603
op: UnaryOp::Neg64Ext32,
1604
rd: writable_gpr(1),
1605
rn: gpr(10),
1606
},
1607
"B913001A",
1608
"lcgfr %r1, %r10",
1609
));
1610
insns.push((
1611
Inst::UnaryRR {
1612
op: UnaryOp::PopcntByte,
1613
rd: writable_gpr(1),
1614
rn: gpr(10),
1615
},
1616
"B9E1001A",
1617
"popcnt %r1, %r10",
1618
));
1619
insns.push((
1620
Inst::UnaryRR {
1621
op: UnaryOp::PopcntReg,
1622
rd: writable_gpr(1),
1623
rn: gpr(10),
1624
},
1625
"B9E1801A",
1626
"popcnt %r1, %r10, 8",
1627
));
1628
insns.push((
1629
Inst::UnaryRR {
1630
op: UnaryOp::BSwap32,
1631
rd: writable_gpr(1),
1632
rn: gpr(10),
1633
},
1634
"B91F001A",
1635
"lrvr %r1, %r10",
1636
));
1637
insns.push((
1638
Inst::UnaryRR {
1639
op: UnaryOp::BSwap64,
1640
rd: writable_gpr(1),
1641
rn: gpr(10),
1642
},
1643
"B90F001A",
1644
"lrvgr %r1, %r10",
1645
));
1646
insns.push((
1647
Inst::UnaryRR {
1648
op: UnaryOp::Clz64,
1649
rd: writable_gpr(1),
1650
rn: gpr(10),
1651
},
1652
"B968001A",
1653
"clzg %r1, %r10",
1654
));
1655
insns.push((
1656
Inst::UnaryRR {
1657
op: UnaryOp::Ctz64,
1658
rd: writable_gpr(1),
1659
rn: gpr(10),
1660
},
1661
"B969001A",
1662
"ctzg %r1, %r10",
1663
));
1664
1665
insns.push((
1666
Inst::CmpRR {
1667
op: CmpOp::CmpS32,
1668
rn: gpr(5),
1669
rm: gpr(6),
1670
},
1671
"1956",
1672
"cr %r5, %r6",
1673
));
1674
insns.push((
1675
Inst::CmpRR {
1676
op: CmpOp::CmpS64,
1677
rn: gpr(5),
1678
rm: gpr(6),
1679
},
1680
"B9200056",
1681
"cgr %r5, %r6",
1682
));
1683
insns.push((
1684
Inst::CmpRR {
1685
op: CmpOp::CmpS64Ext32,
1686
rn: gpr(5),
1687
rm: gpr(6),
1688
},
1689
"B9300056",
1690
"cgfr %r5, %r6",
1691
));
1692
insns.push((
1693
Inst::CmpRR {
1694
op: CmpOp::CmpL32,
1695
rn: gpr(5),
1696
rm: gpr(6),
1697
},
1698
"1556",
1699
"clr %r5, %r6",
1700
));
1701
insns.push((
1702
Inst::CmpRR {
1703
op: CmpOp::CmpL64,
1704
rn: gpr(5),
1705
rm: gpr(6),
1706
},
1707
"B9210056",
1708
"clgr %r5, %r6",
1709
));
1710
insns.push((
1711
Inst::CmpRR {
1712
op: CmpOp::CmpL64Ext32,
1713
rn: gpr(5),
1714
rm: gpr(6),
1715
},
1716
"B9310056",
1717
"clgfr %r5, %r6",
1718
));
1719
1720
insns.push((
1721
Inst::CmpRX {
1722
op: CmpOp::CmpS32,
1723
rn: gpr(1),
1724
mem: MemArg::BXD12 {
1725
base: gpr(2),
1726
index: zero_reg(),
1727
disp: UImm12::zero(),
1728
flags: MemFlags::trusted(),
1729
},
1730
},
1731
"59102000",
1732
"c %r1, 0(%r2)",
1733
));
1734
insns.push((
1735
Inst::CmpRX {
1736
op: CmpOp::CmpS32,
1737
rn: gpr(1),
1738
mem: MemArg::BXD20 {
1739
base: gpr(2),
1740
index: zero_reg(),
1741
disp: simm20_zero(),
1742
flags: MemFlags::trusted(),
1743
},
1744
},
1745
"E31020000059",
1746
"cy %r1, 0(%r2)",
1747
));
1748
insns.push((
1749
Inst::CmpRX {
1750
op: CmpOp::CmpS32,
1751
rn: gpr(1),
1752
mem: MemArg::Label {
1753
target: MachLabel::from_block(BlockIndex::new(1)),
1754
},
1755
},
1756
"C61D00000003",
1757
"crl %r1, label1",
1758
));
1759
insns.push((
1760
Inst::CmpRX {
1761
op: CmpOp::CmpS32Ext16,
1762
rn: gpr(1),
1763
mem: MemArg::BXD12 {
1764
base: gpr(2),
1765
index: zero_reg(),
1766
disp: UImm12::zero(),
1767
flags: MemFlags::trusted(),
1768
},
1769
},
1770
"49102000",
1771
"ch %r1, 0(%r2)",
1772
));
1773
insns.push((
1774
Inst::CmpRX {
1775
op: CmpOp::CmpS32Ext16,
1776
rn: gpr(1),
1777
mem: MemArg::BXD20 {
1778
base: gpr(2),
1779
index: zero_reg(),
1780
disp: simm20_zero(),
1781
flags: MemFlags::trusted(),
1782
},
1783
},
1784
"E31020000079",
1785
"chy %r1, 0(%r2)",
1786
));
1787
insns.push((
1788
Inst::CmpRX {
1789
op: CmpOp::CmpS32Ext16,
1790
rn: gpr(1),
1791
mem: MemArg::Label {
1792
target: MachLabel::from_block(BlockIndex::new(1)),
1793
},
1794
},
1795
"C61500000003",
1796
"chrl %r1, label1",
1797
));
1798
insns.push((
1799
Inst::CmpRX {
1800
op: CmpOp::CmpS64,
1801
rn: gpr(1),
1802
mem: MemArg::BXD12 {
1803
base: gpr(2),
1804
index: zero_reg(),
1805
disp: UImm12::zero(),
1806
flags: MemFlags::trusted(),
1807
},
1808
},
1809
"E31020000020",
1810
"cg %r1, 0(%r2)",
1811
));
1812
insns.push((
1813
Inst::CmpRX {
1814
op: CmpOp::CmpS64,
1815
rn: gpr(1),
1816
mem: MemArg::Label {
1817
target: MachLabel::from_block(BlockIndex::new(1)),
1818
},
1819
},
1820
"C61800000003",
1821
"cgrl %r1, label1",
1822
));
1823
insns.push((
1824
Inst::CmpRX {
1825
op: CmpOp::CmpS64Ext16,
1826
rn: gpr(1),
1827
mem: MemArg::BXD12 {
1828
base: gpr(2),
1829
index: zero_reg(),
1830
disp: UImm12::zero(),
1831
flags: MemFlags::trusted(),
1832
},
1833
},
1834
"E31020000034",
1835
"cgh %r1, 0(%r2)",
1836
));
1837
insns.push((
1838
Inst::CmpRX {
1839
op: CmpOp::CmpS64Ext16,
1840
rn: gpr(1),
1841
mem: MemArg::Label {
1842
target: MachLabel::from_block(BlockIndex::new(1)),
1843
},
1844
},
1845
"C61400000003",
1846
"cghrl %r1, label1",
1847
));
1848
insns.push((
1849
Inst::CmpRX {
1850
op: CmpOp::CmpS64Ext32,
1851
rn: gpr(1),
1852
mem: MemArg::BXD12 {
1853
base: gpr(2),
1854
index: zero_reg(),
1855
disp: UImm12::zero(),
1856
flags: MemFlags::trusted(),
1857
},
1858
},
1859
"E31020000030",
1860
"cgf %r1, 0(%r2)",
1861
));
1862
insns.push((
1863
Inst::CmpRX {
1864
op: CmpOp::CmpS64Ext32,
1865
rn: gpr(1),
1866
mem: MemArg::Label {
1867
target: MachLabel::from_block(BlockIndex::new(1)),
1868
},
1869
},
1870
"C61C00000003",
1871
"cgfrl %r1, label1",
1872
));
1873
insns.push((
1874
Inst::CmpRX {
1875
op: CmpOp::CmpL32,
1876
rn: gpr(1),
1877
mem: MemArg::BXD12 {
1878
base: gpr(2),
1879
index: zero_reg(),
1880
disp: UImm12::zero(),
1881
flags: MemFlags::trusted(),
1882
},
1883
},
1884
"55102000",
1885
"cl %r1, 0(%r2)",
1886
));
1887
insns.push((
1888
Inst::CmpRX {
1889
op: CmpOp::CmpL32,
1890
rn: gpr(1),
1891
mem: MemArg::BXD20 {
1892
base: gpr(2),
1893
index: zero_reg(),
1894
disp: simm20_zero(),
1895
flags: MemFlags::trusted(),
1896
},
1897
},
1898
"E31020000055",
1899
"cly %r1, 0(%r2)",
1900
));
1901
insns.push((
1902
Inst::CmpRX {
1903
op: CmpOp::CmpL32,
1904
rn: gpr(1),
1905
mem: MemArg::Label {
1906
target: MachLabel::from_block(BlockIndex::new(1)),
1907
},
1908
},
1909
"C61F00000003",
1910
"clrl %r1, label1",
1911
));
1912
insns.push((
1913
Inst::CmpRX {
1914
op: CmpOp::CmpL32Ext16,
1915
rn: gpr(1),
1916
mem: MemArg::Label {
1917
target: MachLabel::from_block(BlockIndex::new(1)),
1918
},
1919
},
1920
"C61700000003",
1921
"clhrl %r1, label1",
1922
));
1923
insns.push((
1924
Inst::CmpRX {
1925
op: CmpOp::CmpL64,
1926
rn: gpr(1),
1927
mem: MemArg::BXD12 {
1928
base: gpr(2),
1929
index: zero_reg(),
1930
disp: UImm12::zero(),
1931
flags: MemFlags::trusted(),
1932
},
1933
},
1934
"E31020000021",
1935
"clg %r1, 0(%r2)",
1936
));
1937
insns.push((
1938
Inst::CmpRX {
1939
op: CmpOp::CmpL64,
1940
rn: gpr(1),
1941
mem: MemArg::Label {
1942
target: MachLabel::from_block(BlockIndex::new(1)),
1943
},
1944
},
1945
"C61A00000003",
1946
"clgrl %r1, label1",
1947
));
1948
insns.push((
1949
Inst::CmpRX {
1950
op: CmpOp::CmpL64Ext16,
1951
rn: gpr(1),
1952
mem: MemArg::Label {
1953
target: MachLabel::from_block(BlockIndex::new(1)),
1954
},
1955
},
1956
"C61600000003",
1957
"clghrl %r1, label1",
1958
));
1959
insns.push((
1960
Inst::CmpRX {
1961
op: CmpOp::CmpL64Ext32,
1962
rn: gpr(1),
1963
mem: MemArg::BXD12 {
1964
base: gpr(2),
1965
index: zero_reg(),
1966
disp: UImm12::zero(),
1967
flags: MemFlags::trusted(),
1968
},
1969
},
1970
"E31020000031",
1971
"clgf %r1, 0(%r2)",
1972
));
1973
insns.push((
1974
Inst::CmpRX {
1975
op: CmpOp::CmpL64Ext32,
1976
rn: gpr(1),
1977
mem: MemArg::Label {
1978
target: MachLabel::from_block(BlockIndex::new(1)),
1979
},
1980
},
1981
"C61E00000003",
1982
"clgfrl %r1, label1",
1983
));
1984
1985
insns.push((
1986
Inst::CmpRSImm16 {
1987
op: CmpOp::CmpS32,
1988
rn: gpr(7),
1989
imm: -32768,
1990
},
1991
"A77E8000",
1992
"chi %r7, -32768",
1993
));
1994
insns.push((
1995
Inst::CmpRSImm16 {
1996
op: CmpOp::CmpS32,
1997
rn: gpr(7),
1998
imm: 32767,
1999
},
2000
"A77E7FFF",
2001
"chi %r7, 32767",
2002
));
2003
insns.push((
2004
Inst::CmpRSImm16 {
2005
op: CmpOp::CmpS64,
2006
rn: gpr(7),
2007
imm: -32768,
2008
},
2009
"A77F8000",
2010
"cghi %r7, -32768",
2011
));
2012
insns.push((
2013
Inst::CmpRSImm16 {
2014
op: CmpOp::CmpS64,
2015
rn: gpr(7),
2016
imm: 32767,
2017
},
2018
"A77F7FFF",
2019
"cghi %r7, 32767",
2020
));
2021
insns.push((
2022
Inst::CmpRSImm32 {
2023
op: CmpOp::CmpS32,
2024
rn: gpr(7),
2025
imm: -2147483648,
2026
},
2027
"C27D80000000",
2028
"cfi %r7, -2147483648",
2029
));
2030
insns.push((
2031
Inst::CmpRSImm32 {
2032
op: CmpOp::CmpS32,
2033
rn: gpr(7),
2034
imm: 2147483647,
2035
},
2036
"C27D7FFFFFFF",
2037
"cfi %r7, 2147483647",
2038
));
2039
insns.push((
2040
Inst::CmpRSImm32 {
2041
op: CmpOp::CmpS64,
2042
rn: gpr(7),
2043
imm: -2147483648,
2044
},
2045
"C27C80000000",
2046
"cgfi %r7, -2147483648",
2047
));
2048
insns.push((
2049
Inst::CmpRSImm32 {
2050
op: CmpOp::CmpS64,
2051
rn: gpr(7),
2052
imm: 2147483647,
2053
},
2054
"C27C7FFFFFFF",
2055
"cgfi %r7, 2147483647",
2056
));
2057
insns.push((
2058
Inst::CmpRUImm32 {
2059
op: CmpOp::CmpL32,
2060
rn: gpr(7),
2061
imm: 0,
2062
},
2063
"C27F00000000",
2064
"clfi %r7, 0",
2065
));
2066
insns.push((
2067
Inst::CmpRUImm32 {
2068
op: CmpOp::CmpL32,
2069
rn: gpr(7),
2070
imm: 4294967295,
2071
},
2072
"C27FFFFFFFFF",
2073
"clfi %r7, 4294967295",
2074
));
2075
insns.push((
2076
Inst::CmpRUImm32 {
2077
op: CmpOp::CmpL64,
2078
rn: gpr(7),
2079
imm: 0,
2080
},
2081
"C27E00000000",
2082
"clgfi %r7, 0",
2083
));
2084
insns.push((
2085
Inst::CmpRUImm32 {
2086
op: CmpOp::CmpL64,
2087
rn: gpr(7),
2088
imm: 4294967295,
2089
},
2090
"C27EFFFFFFFF",
2091
"clgfi %r7, 4294967295",
2092
));
2093
2094
insns.push((
2095
Inst::CmpTrapRR {
2096
op: CmpOp::CmpS32,
2097
rn: gpr(5),
2098
rm: gpr(6),
2099
cond: Cond::from_mask(8),
2100
trap_code: TrapCode::STACK_OVERFLOW,
2101
},
2102
"B9728056",
2103
"crte %r5, %r6",
2104
));
2105
insns.push((
2106
Inst::CmpTrapRR {
2107
op: CmpOp::CmpS64,
2108
rn: gpr(5),
2109
rm: gpr(6),
2110
cond: Cond::from_mask(8),
2111
trap_code: TrapCode::STACK_OVERFLOW,
2112
},
2113
"B9608056",
2114
"cgrte %r5, %r6",
2115
));
2116
insns.push((
2117
Inst::CmpTrapRR {
2118
op: CmpOp::CmpL32,
2119
rn: gpr(5),
2120
rm: gpr(6),
2121
cond: Cond::from_mask(8),
2122
trap_code: TrapCode::STACK_OVERFLOW,
2123
},
2124
"B9738056",
2125
"clrte %r5, %r6",
2126
));
2127
insns.push((
2128
Inst::CmpTrapRR {
2129
op: CmpOp::CmpL64,
2130
rn: gpr(5),
2131
rm: gpr(6),
2132
cond: Cond::from_mask(8),
2133
trap_code: TrapCode::STACK_OVERFLOW,
2134
},
2135
"B9618056",
2136
"clgrte %r5, %r6",
2137
));
2138
insns.push((
2139
Inst::CmpTrapRSImm16 {
2140
op: CmpOp::CmpS32,
2141
rn: gpr(7),
2142
imm: -32768,
2143
cond: Cond::from_mask(8),
2144
trap_code: TrapCode::STACK_OVERFLOW,
2145
},
2146
"EC7080008072",
2147
"cite %r7, -32768",
2148
));
2149
insns.push((
2150
Inst::CmpTrapRSImm16 {
2151
op: CmpOp::CmpS32,
2152
rn: gpr(7),
2153
imm: 32767,
2154
cond: Cond::from_mask(8),
2155
trap_code: TrapCode::STACK_OVERFLOW,
2156
},
2157
"EC707FFF8072",
2158
"cite %r7, 32767",
2159
));
2160
insns.push((
2161
Inst::CmpTrapRSImm16 {
2162
op: CmpOp::CmpS64,
2163
rn: gpr(7),
2164
imm: -32768,
2165
cond: Cond::from_mask(8),
2166
trap_code: TrapCode::STACK_OVERFLOW,
2167
},
2168
"EC7080008070",
2169
"cgite %r7, -32768",
2170
));
2171
insns.push((
2172
Inst::CmpTrapRSImm16 {
2173
op: CmpOp::CmpS64,
2174
rn: gpr(7),
2175
imm: 32767,
2176
cond: Cond::from_mask(8),
2177
trap_code: TrapCode::STACK_OVERFLOW,
2178
},
2179
"EC707FFF8070",
2180
"cgite %r7, 32767",
2181
));
2182
insns.push((
2183
Inst::CmpTrapRUImm16 {
2184
op: CmpOp::CmpL32,
2185
rn: gpr(7),
2186
imm: 0,
2187
cond: Cond::from_mask(8),
2188
trap_code: TrapCode::STACK_OVERFLOW,
2189
},
2190
"EC7000008073",
2191
"clfite %r7, 0",
2192
));
2193
insns.push((
2194
Inst::CmpTrapRUImm16 {
2195
op: CmpOp::CmpL32,
2196
rn: gpr(7),
2197
imm: 65535,
2198
cond: Cond::from_mask(8),
2199
trap_code: TrapCode::STACK_OVERFLOW,
2200
},
2201
"EC70FFFF8073",
2202
"clfite %r7, 65535",
2203
));
2204
insns.push((
2205
Inst::CmpTrapRUImm16 {
2206
op: CmpOp::CmpL64,
2207
rn: gpr(7),
2208
imm: 0,
2209
cond: Cond::from_mask(8),
2210
trap_code: TrapCode::STACK_OVERFLOW,
2211
},
2212
"EC7000008071",
2213
"clgite %r7, 0",
2214
));
2215
insns.push((
2216
Inst::CmpTrapRUImm16 {
2217
op: CmpOp::CmpL64,
2218
rn: gpr(7),
2219
imm: 65535,
2220
cond: Cond::from_mask(8),
2221
trap_code: TrapCode::STACK_OVERFLOW,
2222
},
2223
"EC70FFFF8071",
2224
"clgite %r7, 65535",
2225
));
2226
2227
let w_regpair = WritableRegPair {
2228
hi: writable_gpr(2),
2229
lo: writable_gpr(3),
2230
};
2231
let regpair = RegPair {
2232
hi: gpr(2),
2233
lo: gpr(3),
2234
};
2235
2236
insns.push((
2237
Inst::SMulWide {
2238
rd: w_regpair,
2239
rn: gpr(5),
2240
rm: gpr(6),
2241
},
2242
"B9EC6025",
2243
"mgrk %r2, %r5, %r6",
2244
));
2245
insns.push((
2246
Inst::UMulWide {
2247
rd: w_regpair,
2248
ri: gpr(3),
2249
rn: gpr(5),
2250
},
2251
"B9860025",
2252
"mlgr %r2, %r5",
2253
));
2254
insns.push((
2255
Inst::SDivMod32 {
2256
rd: w_regpair,
2257
ri: gpr(3),
2258
rn: gpr(5),
2259
},
2260
"B91D0025",
2261
"dsgfr %r2, %r5",
2262
));
2263
insns.push((
2264
Inst::SDivMod64 {
2265
rd: w_regpair,
2266
ri: gpr(3),
2267
rn: gpr(5),
2268
},
2269
"B90D0025",
2270
"dsgr %r2, %r5",
2271
));
2272
insns.push((
2273
Inst::UDivMod32 {
2274
rd: w_regpair,
2275
ri: regpair,
2276
rn: gpr(5),
2277
},
2278
"B9970025",
2279
"dlr %r2, %r5",
2280
));
2281
insns.push((
2282
Inst::UDivMod64 {
2283
rd: w_regpair,
2284
ri: regpair,
2285
rn: gpr(5),
2286
},
2287
"B9870025",
2288
"dlgr %r2, %r5",
2289
));
2290
2291
insns.push((
2292
Inst::Flogr {
2293
rd: w_regpair,
2294
rn: gpr(5),
2295
},
2296
"B9830025",
2297
"flogr %r2, %r5",
2298
));
2299
2300
insns.push((
2301
Inst::ShiftRR {
2302
shift_op: ShiftOp::RotL32,
2303
rd: writable_gpr(4),
2304
rn: gpr(5),
2305
shift_imm: 0,
2306
shift_reg: zero_reg(),
2307
},
2308
"EB450000001D",
2309
"rll %r4, %r5, 0",
2310
));
2311
insns.push((
2312
Inst::ShiftRR {
2313
shift_op: ShiftOp::RotL32,
2314
rd: writable_gpr(4),
2315
rn: gpr(5),
2316
shift_imm: 63,
2317
shift_reg: zero_reg(),
2318
},
2319
"EB45003F001D",
2320
"rll %r4, %r5, 63",
2321
));
2322
insns.push((
2323
Inst::ShiftRR {
2324
shift_op: ShiftOp::RotL32,
2325
rd: writable_gpr(4),
2326
rn: gpr(5),
2327
shift_imm: 0,
2328
shift_reg: gpr(6),
2329
},
2330
"EB456000001D",
2331
"rll %r4, %r5, 0(%r6)",
2332
));
2333
insns.push((
2334
Inst::ShiftRR {
2335
shift_op: ShiftOp::RotL32,
2336
rd: writable_gpr(4),
2337
rn: gpr(5),
2338
shift_imm: 63,
2339
shift_reg: gpr(6),
2340
},
2341
"EB45603F001D",
2342
"rll %r4, %r5, 63(%r6)",
2343
));
2344
insns.push((
2345
Inst::ShiftRR {
2346
shift_op: ShiftOp::RotL64,
2347
rd: writable_gpr(4),
2348
rn: gpr(5),
2349
shift_imm: 0,
2350
shift_reg: zero_reg(),
2351
},
2352
"EB450000001C",
2353
"rllg %r4, %r5, 0",
2354
));
2355
insns.push((
2356
Inst::ShiftRR {
2357
shift_op: ShiftOp::RotL64,
2358
rd: writable_gpr(4),
2359
rn: gpr(5),
2360
shift_imm: 63,
2361
shift_reg: zero_reg(),
2362
},
2363
"EB45003F001C",
2364
"rllg %r4, %r5, 63",
2365
));
2366
insns.push((
2367
Inst::ShiftRR {
2368
shift_op: ShiftOp::RotL64,
2369
rd: writable_gpr(4),
2370
rn: gpr(5),
2371
shift_imm: 0,
2372
shift_reg: gpr(6),
2373
},
2374
"EB456000001C",
2375
"rllg %r4, %r5, 0(%r6)",
2376
));
2377
insns.push((
2378
Inst::ShiftRR {
2379
shift_op: ShiftOp::RotL64,
2380
rd: writable_gpr(4),
2381
rn: gpr(5),
2382
shift_imm: 63,
2383
shift_reg: gpr(6),
2384
},
2385
"EB45603F001C",
2386
"rllg %r4, %r5, 63(%r6)",
2387
));
2388
insns.push((
2389
Inst::ShiftRR {
2390
shift_op: ShiftOp::LShL32,
2391
rd: writable_gpr(4),
2392
rn: gpr(5),
2393
shift_imm: 0,
2394
shift_reg: zero_reg(),
2395
},
2396
"EB45000000DF",
2397
"sllk %r4, %r5, 0",
2398
));
2399
insns.push((
2400
Inst::ShiftRR {
2401
shift_op: ShiftOp::LShL32,
2402
rd: writable_gpr(4),
2403
rn: gpr(5),
2404
shift_imm: 63,
2405
shift_reg: zero_reg(),
2406
},
2407
"EB45003F00DF",
2408
"sllk %r4, %r5, 63",
2409
));
2410
insns.push((
2411
Inst::ShiftRR {
2412
shift_op: ShiftOp::LShL32,
2413
rd: writable_gpr(4),
2414
rn: gpr(5),
2415
shift_imm: 0,
2416
shift_reg: gpr(6),
2417
},
2418
"EB45600000DF",
2419
"sllk %r4, %r5, 0(%r6)",
2420
));
2421
insns.push((
2422
Inst::ShiftRR {
2423
shift_op: ShiftOp::LShL32,
2424
rd: writable_gpr(4),
2425
rn: gpr(5),
2426
shift_imm: 63,
2427
shift_reg: gpr(6),
2428
},
2429
"EB45603F00DF",
2430
"sllk %r4, %r5, 63(%r6)",
2431
));
2432
insns.push((
2433
Inst::ShiftRR {
2434
shift_op: ShiftOp::LShL64,
2435
rd: writable_gpr(4),
2436
rn: gpr(5),
2437
shift_imm: 0,
2438
shift_reg: zero_reg(),
2439
},
2440
"EB450000000D",
2441
"sllg %r4, %r5, 0",
2442
));
2443
insns.push((
2444
Inst::ShiftRR {
2445
shift_op: ShiftOp::LShL64,
2446
rd: writable_gpr(4),
2447
rn: gpr(5),
2448
shift_imm: 63,
2449
shift_reg: zero_reg(),
2450
},
2451
"EB45003F000D",
2452
"sllg %r4, %r5, 63",
2453
));
2454
insns.push((
2455
Inst::ShiftRR {
2456
shift_op: ShiftOp::LShL64,
2457
rd: writable_gpr(4),
2458
rn: gpr(5),
2459
shift_imm: 0,
2460
shift_reg: gpr(6),
2461
},
2462
"EB456000000D",
2463
"sllg %r4, %r5, 0(%r6)",
2464
));
2465
insns.push((
2466
Inst::ShiftRR {
2467
shift_op: ShiftOp::LShL64,
2468
rd: writable_gpr(4),
2469
rn: gpr(5),
2470
shift_imm: 63,
2471
shift_reg: gpr(6),
2472
},
2473
"EB45603F000D",
2474
"sllg %r4, %r5, 63(%r6)",
2475
));
2476
insns.push((
2477
Inst::ShiftRR {
2478
shift_op: ShiftOp::LShR32,
2479
rd: writable_gpr(4),
2480
rn: gpr(5),
2481
shift_imm: 0,
2482
shift_reg: zero_reg(),
2483
},
2484
"EB45000000DE",
2485
"srlk %r4, %r5, 0",
2486
));
2487
insns.push((
2488
Inst::ShiftRR {
2489
shift_op: ShiftOp::LShR32,
2490
rd: writable_gpr(4),
2491
rn: gpr(5),
2492
shift_imm: 63,
2493
shift_reg: zero_reg(),
2494
},
2495
"EB45003F00DE",
2496
"srlk %r4, %r5, 63",
2497
));
2498
insns.push((
2499
Inst::ShiftRR {
2500
shift_op: ShiftOp::LShR32,
2501
rd: writable_gpr(4),
2502
rn: gpr(5),
2503
shift_imm: 0,
2504
shift_reg: gpr(6),
2505
},
2506
"EB45600000DE",
2507
"srlk %r4, %r5, 0(%r6)",
2508
));
2509
insns.push((
2510
Inst::ShiftRR {
2511
shift_op: ShiftOp::LShR32,
2512
rd: writable_gpr(4),
2513
rn: gpr(5),
2514
shift_imm: 63,
2515
shift_reg: gpr(6),
2516
},
2517
"EB45603F00DE",
2518
"srlk %r4, %r5, 63(%r6)",
2519
));
2520
insns.push((
2521
Inst::ShiftRR {
2522
shift_op: ShiftOp::LShR64,
2523
rd: writable_gpr(4),
2524
rn: gpr(5),
2525
shift_imm: 0,
2526
shift_reg: zero_reg(),
2527
},
2528
"EB450000000C",
2529
"srlg %r4, %r5, 0",
2530
));
2531
insns.push((
2532
Inst::ShiftRR {
2533
shift_op: ShiftOp::LShR64,
2534
rd: writable_gpr(4),
2535
rn: gpr(5),
2536
shift_imm: 63,
2537
shift_reg: zero_reg(),
2538
},
2539
"EB45003F000C",
2540
"srlg %r4, %r5, 63",
2541
));
2542
insns.push((
2543
Inst::ShiftRR {
2544
shift_op: ShiftOp::LShR64,
2545
rd: writable_gpr(4),
2546
rn: gpr(5),
2547
shift_imm: 0,
2548
shift_reg: gpr(6),
2549
},
2550
"EB456000000C",
2551
"srlg %r4, %r5, 0(%r6)",
2552
));
2553
insns.push((
2554
Inst::ShiftRR {
2555
shift_op: ShiftOp::LShR64,
2556
rd: writable_gpr(4),
2557
rn: gpr(5),
2558
shift_imm: 63,
2559
shift_reg: gpr(6),
2560
},
2561
"EB45603F000C",
2562
"srlg %r4, %r5, 63(%r6)",
2563
));
2564
insns.push((
2565
Inst::ShiftRR {
2566
shift_op: ShiftOp::AShR32,
2567
rd: writable_gpr(4),
2568
rn: gpr(5),
2569
shift_imm: 0,
2570
shift_reg: zero_reg(),
2571
},
2572
"EB45000000DC",
2573
"srak %r4, %r5, 0",
2574
));
2575
insns.push((
2576
Inst::ShiftRR {
2577
shift_op: ShiftOp::AShR32,
2578
rd: writable_gpr(4),
2579
rn: gpr(5),
2580
shift_imm: 63,
2581
shift_reg: zero_reg(),
2582
},
2583
"EB45003F00DC",
2584
"srak %r4, %r5, 63",
2585
));
2586
insns.push((
2587
Inst::ShiftRR {
2588
shift_op: ShiftOp::AShR32,
2589
rd: writable_gpr(4),
2590
rn: gpr(5),
2591
shift_imm: 0,
2592
shift_reg: gpr(6),
2593
},
2594
"EB45600000DC",
2595
"srak %r4, %r5, 0(%r6)",
2596
));
2597
insns.push((
2598
Inst::ShiftRR {
2599
shift_op: ShiftOp::AShR32,
2600
rd: writable_gpr(4),
2601
rn: gpr(5),
2602
shift_imm: 63,
2603
shift_reg: gpr(6),
2604
},
2605
"EB45603F00DC",
2606
"srak %r4, %r5, 63(%r6)",
2607
));
2608
insns.push((
2609
Inst::ShiftRR {
2610
shift_op: ShiftOp::AShR64,
2611
rd: writable_gpr(4),
2612
rn: gpr(5),
2613
shift_imm: 0,
2614
shift_reg: zero_reg(),
2615
},
2616
"EB450000000A",
2617
"srag %r4, %r5, 0",
2618
));
2619
insns.push((
2620
Inst::ShiftRR {
2621
shift_op: ShiftOp::AShR64,
2622
rd: writable_gpr(4),
2623
rn: gpr(5),
2624
shift_imm: 63,
2625
shift_reg: zero_reg(),
2626
},
2627
"EB45003F000A",
2628
"srag %r4, %r5, 63",
2629
));
2630
insns.push((
2631
Inst::ShiftRR {
2632
shift_op: ShiftOp::AShR64,
2633
rd: writable_gpr(4),
2634
rn: gpr(5),
2635
shift_imm: 0,
2636
shift_reg: gpr(6),
2637
},
2638
"EB456000000A",
2639
"srag %r4, %r5, 0(%r6)",
2640
));
2641
insns.push((
2642
Inst::ShiftRR {
2643
shift_op: ShiftOp::AShR64,
2644
rd: writable_gpr(4),
2645
rn: gpr(5),
2646
shift_imm: 63,
2647
shift_reg: gpr(6),
2648
},
2649
"EB45603F000A",
2650
"srag %r4, %r5, 63(%r6)",
2651
));
2652
2653
insns.push((
2654
Inst::RxSBG {
2655
op: RxSBGOp::Insert,
2656
rd: writable_gpr(4),
2657
ri: gpr(4),
2658
rn: gpr(5),
2659
start_bit: 8,
2660
end_bit: 32,
2661
rotate_amt: -16,
2662
},
2663
"EC4508203059",
2664
"risbgn %r4, %r5, 8, 32, 48",
2665
));
2666
insns.push((
2667
Inst::RxSBG {
2668
op: RxSBGOp::And,
2669
rd: writable_gpr(4),
2670
ri: gpr(4),
2671
rn: gpr(5),
2672
start_bit: 8,
2673
end_bit: 32,
2674
rotate_amt: 63,
2675
},
2676
"EC4508203F54",
2677
"rnsbg %r4, %r5, 8, 32, 63",
2678
));
2679
insns.push((
2680
Inst::RxSBG {
2681
op: RxSBGOp::Or,
2682
rd: writable_gpr(4),
2683
ri: gpr(4),
2684
rn: gpr(5),
2685
start_bit: 8,
2686
end_bit: 32,
2687
rotate_amt: 63,
2688
},
2689
"EC4508203F56",
2690
"rosbg %r4, %r5, 8, 32, 63",
2691
));
2692
insns.push((
2693
Inst::RxSBG {
2694
op: RxSBGOp::Xor,
2695
rd: writable_gpr(4),
2696
ri: gpr(4),
2697
rn: gpr(5),
2698
start_bit: 8,
2699
end_bit: 32,
2700
rotate_amt: 63,
2701
},
2702
"EC4508203F57",
2703
"rxsbg %r4, %r5, 8, 32, 63",
2704
));
2705
insns.push((
2706
Inst::RxSBGTest {
2707
op: RxSBGOp::And,
2708
rd: gpr(4),
2709
rn: gpr(5),
2710
start_bit: 8,
2711
end_bit: 32,
2712
rotate_amt: 63,
2713
},
2714
"EC4588203F54",
2715
"rnsbg %r4, %r5, 136, 32, 63",
2716
));
2717
insns.push((
2718
Inst::RxSBGTest {
2719
op: RxSBGOp::Or,
2720
rd: gpr(4),
2721
rn: gpr(5),
2722
start_bit: 8,
2723
end_bit: 32,
2724
rotate_amt: 63,
2725
},
2726
"EC4588203F56",
2727
"rosbg %r4, %r5, 136, 32, 63",
2728
));
2729
insns.push((
2730
Inst::RxSBGTest {
2731
op: RxSBGOp::Xor,
2732
rd: gpr(4),
2733
rn: gpr(5),
2734
start_bit: 8,
2735
end_bit: 32,
2736
rotate_amt: 63,
2737
},
2738
"EC4588203F57",
2739
"rxsbg %r4, %r5, 136, 32, 63",
2740
));
2741
2742
insns.push((
2743
Inst::AtomicRmw {
2744
alu_op: ALUOp::Add32,
2745
rd: writable_gpr(4),
2746
rn: gpr(5),
2747
mem: MemArg::BXD20 {
2748
base: zero_reg(),
2749
index: zero_reg(),
2750
disp: SImm20::maybe_from_i64(-524288).unwrap(),
2751
flags: MemFlags::trusted(),
2752
},
2753
},
2754
"EB45000080F8",
2755
"laa %r4, %r5, -524288",
2756
));
2757
insns.push((
2758
Inst::AtomicRmw {
2759
alu_op: ALUOp::Add32,
2760
rd: writable_gpr(4),
2761
rn: gpr(5),
2762
mem: MemArg::BXD20 {
2763
base: zero_reg(),
2764
index: zero_reg(),
2765
disp: SImm20::maybe_from_i64(524287).unwrap(),
2766
flags: MemFlags::trusted(),
2767
},
2768
},
2769
"EB450FFF7FF8",
2770
"laa %r4, %r5, 524287",
2771
));
2772
insns.push((
2773
Inst::AtomicRmw {
2774
alu_op: ALUOp::Add32,
2775
rd: writable_gpr(4),
2776
rn: gpr(5),
2777
mem: MemArg::BXD20 {
2778
base: gpr(6),
2779
index: zero_reg(),
2780
disp: SImm20::maybe_from_i64(-524288).unwrap(),
2781
flags: MemFlags::trusted(),
2782
},
2783
},
2784
"EB45600080F8",
2785
"laa %r4, %r5, -524288(%r6)",
2786
));
2787
insns.push((
2788
Inst::AtomicRmw {
2789
alu_op: ALUOp::Add32,
2790
rd: writable_gpr(4),
2791
rn: gpr(5),
2792
mem: MemArg::BXD20 {
2793
base: gpr(6),
2794
index: zero_reg(),
2795
disp: SImm20::maybe_from_i64(524287).unwrap(),
2796
flags: MemFlags::trusted(),
2797
},
2798
},
2799
"EB456FFF7FF8",
2800
"laa %r4, %r5, 524287(%r6)",
2801
));
2802
insns.push((
2803
Inst::AtomicRmw {
2804
alu_op: ALUOp::Add64,
2805
rd: writable_gpr(4),
2806
rn: gpr(5),
2807
mem: MemArg::BXD20 {
2808
base: zero_reg(),
2809
index: zero_reg(),
2810
disp: SImm20::maybe_from_i64(-524288).unwrap(),
2811
flags: MemFlags::trusted(),
2812
},
2813
},
2814
"EB45000080E8",
2815
"laag %r4, %r5, -524288",
2816
));
2817
insns.push((
2818
Inst::AtomicRmw {
2819
alu_op: ALUOp::Add64,
2820
rd: writable_gpr(4),
2821
rn: gpr(5),
2822
mem: MemArg::BXD20 {
2823
base: zero_reg(),
2824
index: zero_reg(),
2825
disp: SImm20::maybe_from_i64(524287).unwrap(),
2826
flags: MemFlags::trusted(),
2827
},
2828
},
2829
"EB450FFF7FE8",
2830
"laag %r4, %r5, 524287",
2831
));
2832
insns.push((
2833
Inst::AtomicRmw {
2834
alu_op: ALUOp::Add64,
2835
rd: writable_gpr(4),
2836
rn: gpr(5),
2837
mem: MemArg::BXD20 {
2838
base: gpr(6),
2839
index: zero_reg(),
2840
disp: SImm20::maybe_from_i64(-524288).unwrap(),
2841
flags: MemFlags::trusted(),
2842
},
2843
},
2844
"EB45600080E8",
2845
"laag %r4, %r5, -524288(%r6)",
2846
));
2847
insns.push((
2848
Inst::AtomicRmw {
2849
alu_op: ALUOp::Add64,
2850
rd: writable_gpr(4),
2851
rn: gpr(5),
2852
mem: MemArg::BXD20 {
2853
base: gpr(6),
2854
index: zero_reg(),
2855
disp: SImm20::maybe_from_i64(524287).unwrap(),
2856
flags: MemFlags::trusted(),
2857
},
2858
},
2859
"EB456FFF7FE8",
2860
"laag %r4, %r5, 524287(%r6)",
2861
));
2862
insns.push((
2863
Inst::AtomicRmw {
2864
alu_op: ALUOp::AddLogical32,
2865
rd: writable_gpr(4),
2866
rn: gpr(5),
2867
mem: MemArg::BXD20 {
2868
base: zero_reg(),
2869
index: zero_reg(),
2870
disp: SImm20::maybe_from_i64(-524288).unwrap(),
2871
flags: MemFlags::trusted(),
2872
},
2873
},
2874
"EB45000080FA",
2875
"laal %r4, %r5, -524288",
2876
));
2877
insns.push((
2878
Inst::AtomicRmw {
2879
alu_op: ALUOp::AddLogical32,
2880
rd: writable_gpr(4),
2881
rn: gpr(5),
2882
mem: MemArg::BXD20 {
2883
base: zero_reg(),
2884
index: zero_reg(),
2885
disp: SImm20::maybe_from_i64(524287).unwrap(),
2886
flags: MemFlags::trusted(),
2887
},
2888
},
2889
"EB450FFF7FFA",
2890
"laal %r4, %r5, 524287",
2891
));
2892
insns.push((
2893
Inst::AtomicRmw {
2894
alu_op: ALUOp::AddLogical32,
2895
rd: writable_gpr(4),
2896
rn: gpr(5),
2897
mem: MemArg::BXD20 {
2898
base: gpr(6),
2899
index: zero_reg(),
2900
disp: SImm20::maybe_from_i64(-524288).unwrap(),
2901
flags: MemFlags::trusted(),
2902
},
2903
},
2904
"EB45600080FA",
2905
"laal %r4, %r5, -524288(%r6)",
2906
));
2907
insns.push((
2908
Inst::AtomicRmw {
2909
alu_op: ALUOp::AddLogical32,
2910
rd: writable_gpr(4),
2911
rn: gpr(5),
2912
mem: MemArg::BXD20 {
2913
base: gpr(6),
2914
index: zero_reg(),
2915
disp: SImm20::maybe_from_i64(524287).unwrap(),
2916
flags: MemFlags::trusted(),
2917
},
2918
},
2919
"EB456FFF7FFA",
2920
"laal %r4, %r5, 524287(%r6)",
2921
));
2922
insns.push((
2923
Inst::AtomicRmw {
2924
alu_op: ALUOp::AddLogical64,
2925
rd: writable_gpr(4),
2926
rn: gpr(5),
2927
mem: MemArg::BXD20 {
2928
base: zero_reg(),
2929
index: zero_reg(),
2930
disp: SImm20::maybe_from_i64(-524288).unwrap(),
2931
flags: MemFlags::trusted(),
2932
},
2933
},
2934
"EB45000080EA",
2935
"laalg %r4, %r5, -524288",
2936
));
2937
insns.push((
2938
Inst::AtomicRmw {
2939
alu_op: ALUOp::AddLogical64,
2940
rd: writable_gpr(4),
2941
rn: gpr(5),
2942
mem: MemArg::BXD20 {
2943
base: zero_reg(),
2944
index: zero_reg(),
2945
disp: SImm20::maybe_from_i64(524287).unwrap(),
2946
flags: MemFlags::trusted(),
2947
},
2948
},
2949
"EB450FFF7FEA",
2950
"laalg %r4, %r5, 524287",
2951
));
2952
insns.push((
2953
Inst::AtomicRmw {
2954
alu_op: ALUOp::AddLogical64,
2955
rd: writable_gpr(4),
2956
rn: gpr(5),
2957
mem: MemArg::BXD20 {
2958
base: gpr(6),
2959
index: zero_reg(),
2960
disp: SImm20::maybe_from_i64(-524288).unwrap(),
2961
flags: MemFlags::trusted(),
2962
},
2963
},
2964
"EB45600080EA",
2965
"laalg %r4, %r5, -524288(%r6)",
2966
));
2967
insns.push((
2968
Inst::AtomicRmw {
2969
alu_op: ALUOp::AddLogical64,
2970
rd: writable_gpr(4),
2971
rn: gpr(5),
2972
mem: MemArg::BXD20 {
2973
base: gpr(6),
2974
index: zero_reg(),
2975
disp: SImm20::maybe_from_i64(524287).unwrap(),
2976
flags: MemFlags::trusted(),
2977
},
2978
},
2979
"EB456FFF7FEA",
2980
"laalg %r4, %r5, 524287(%r6)",
2981
));
2982
insns.push((
2983
Inst::AtomicRmw {
2984
alu_op: ALUOp::And32,
2985
rd: writable_gpr(4),
2986
rn: gpr(5),
2987
mem: MemArg::BXD20 {
2988
base: zero_reg(),
2989
index: zero_reg(),
2990
disp: SImm20::maybe_from_i64(-524288).unwrap(),
2991
flags: MemFlags::trusted(),
2992
},
2993
},
2994
"EB45000080F4",
2995
"lan %r4, %r5, -524288",
2996
));
2997
insns.push((
2998
Inst::AtomicRmw {
2999
alu_op: ALUOp::And32,
3000
rd: writable_gpr(4),
3001
rn: gpr(5),
3002
mem: MemArg::BXD20 {
3003
base: zero_reg(),
3004
index: zero_reg(),
3005
disp: SImm20::maybe_from_i64(524287).unwrap(),
3006
flags: MemFlags::trusted(),
3007
},
3008
},
3009
"EB450FFF7FF4",
3010
"lan %r4, %r5, 524287",
3011
));
3012
insns.push((
3013
Inst::AtomicRmw {
3014
alu_op: ALUOp::And32,
3015
rd: writable_gpr(4),
3016
rn: gpr(5),
3017
mem: MemArg::BXD20 {
3018
base: gpr(6),
3019
index: zero_reg(),
3020
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3021
flags: MemFlags::trusted(),
3022
},
3023
},
3024
"EB45600080F4",
3025
"lan %r4, %r5, -524288(%r6)",
3026
));
3027
insns.push((
3028
Inst::AtomicRmw {
3029
alu_op: ALUOp::And32,
3030
rd: writable_gpr(4),
3031
rn: gpr(5),
3032
mem: MemArg::BXD20 {
3033
base: gpr(6),
3034
index: zero_reg(),
3035
disp: SImm20::maybe_from_i64(524287).unwrap(),
3036
flags: MemFlags::trusted(),
3037
},
3038
},
3039
"EB456FFF7FF4",
3040
"lan %r4, %r5, 524287(%r6)",
3041
));
3042
insns.push((
3043
Inst::AtomicRmw {
3044
alu_op: ALUOp::And64,
3045
rd: writable_gpr(4),
3046
rn: gpr(5),
3047
mem: MemArg::BXD20 {
3048
base: zero_reg(),
3049
index: zero_reg(),
3050
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3051
flags: MemFlags::trusted(),
3052
},
3053
},
3054
"EB45000080E4",
3055
"lang %r4, %r5, -524288",
3056
));
3057
insns.push((
3058
Inst::AtomicRmw {
3059
alu_op: ALUOp::And64,
3060
rd: writable_gpr(4),
3061
rn: gpr(5),
3062
mem: MemArg::BXD20 {
3063
base: zero_reg(),
3064
index: zero_reg(),
3065
disp: SImm20::maybe_from_i64(524287).unwrap(),
3066
flags: MemFlags::trusted(),
3067
},
3068
},
3069
"EB450FFF7FE4",
3070
"lang %r4, %r5, 524287",
3071
));
3072
insns.push((
3073
Inst::AtomicRmw {
3074
alu_op: ALUOp::And64,
3075
rd: writable_gpr(4),
3076
rn: gpr(5),
3077
mem: MemArg::BXD20 {
3078
base: gpr(6),
3079
index: zero_reg(),
3080
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3081
flags: MemFlags::trusted(),
3082
},
3083
},
3084
"EB45600080E4",
3085
"lang %r4, %r5, -524288(%r6)",
3086
));
3087
insns.push((
3088
Inst::AtomicRmw {
3089
alu_op: ALUOp::And64,
3090
rd: writable_gpr(4),
3091
rn: gpr(5),
3092
mem: MemArg::BXD20 {
3093
base: gpr(6),
3094
index: zero_reg(),
3095
disp: SImm20::maybe_from_i64(524287).unwrap(),
3096
flags: MemFlags::trusted(),
3097
},
3098
},
3099
"EB456FFF7FE4",
3100
"lang %r4, %r5, 524287(%r6)",
3101
));
3102
insns.push((
3103
Inst::AtomicRmw {
3104
alu_op: ALUOp::Orr32,
3105
rd: writable_gpr(4),
3106
rn: gpr(5),
3107
mem: MemArg::BXD20 {
3108
base: zero_reg(),
3109
index: zero_reg(),
3110
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3111
flags: MemFlags::trusted(),
3112
},
3113
},
3114
"EB45000080F6",
3115
"lao %r4, %r5, -524288",
3116
));
3117
insns.push((
3118
Inst::AtomicRmw {
3119
alu_op: ALUOp::Orr32,
3120
rd: writable_gpr(4),
3121
rn: gpr(5),
3122
mem: MemArg::BXD20 {
3123
base: zero_reg(),
3124
index: zero_reg(),
3125
disp: SImm20::maybe_from_i64(524287).unwrap(),
3126
flags: MemFlags::trusted(),
3127
},
3128
},
3129
"EB450FFF7FF6",
3130
"lao %r4, %r5, 524287",
3131
));
3132
insns.push((
3133
Inst::AtomicRmw {
3134
alu_op: ALUOp::Orr32,
3135
rd: writable_gpr(4),
3136
rn: gpr(5),
3137
mem: MemArg::BXD20 {
3138
base: gpr(6),
3139
index: zero_reg(),
3140
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3141
flags: MemFlags::trusted(),
3142
},
3143
},
3144
"EB45600080F6",
3145
"lao %r4, %r5, -524288(%r6)",
3146
));
3147
insns.push((
3148
Inst::AtomicRmw {
3149
alu_op: ALUOp::Orr32,
3150
rd: writable_gpr(4),
3151
rn: gpr(5),
3152
mem: MemArg::BXD20 {
3153
base: gpr(6),
3154
index: zero_reg(),
3155
disp: SImm20::maybe_from_i64(524287).unwrap(),
3156
flags: MemFlags::trusted(),
3157
},
3158
},
3159
"EB456FFF7FF6",
3160
"lao %r4, %r5, 524287(%r6)",
3161
));
3162
insns.push((
3163
Inst::AtomicRmw {
3164
alu_op: ALUOp::Orr64,
3165
rd: writable_gpr(4),
3166
rn: gpr(5),
3167
mem: MemArg::BXD20 {
3168
base: zero_reg(),
3169
index: zero_reg(),
3170
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3171
flags: MemFlags::trusted(),
3172
},
3173
},
3174
"EB45000080E6",
3175
"laog %r4, %r5, -524288",
3176
));
3177
insns.push((
3178
Inst::AtomicRmw {
3179
alu_op: ALUOp::Orr64,
3180
rd: writable_gpr(4),
3181
rn: gpr(5),
3182
mem: MemArg::BXD20 {
3183
base: zero_reg(),
3184
index: zero_reg(),
3185
disp: SImm20::maybe_from_i64(524287).unwrap(),
3186
flags: MemFlags::trusted(),
3187
},
3188
},
3189
"EB450FFF7FE6",
3190
"laog %r4, %r5, 524287",
3191
));
3192
insns.push((
3193
Inst::AtomicRmw {
3194
alu_op: ALUOp::Orr64,
3195
rd: writable_gpr(4),
3196
rn: gpr(5),
3197
mem: MemArg::BXD20 {
3198
base: gpr(6),
3199
index: zero_reg(),
3200
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3201
flags: MemFlags::trusted(),
3202
},
3203
},
3204
"EB45600080E6",
3205
"laog %r4, %r5, -524288(%r6)",
3206
));
3207
insns.push((
3208
Inst::AtomicRmw {
3209
alu_op: ALUOp::Orr64,
3210
rd: writable_gpr(4),
3211
rn: gpr(5),
3212
mem: MemArg::BXD20 {
3213
base: gpr(6),
3214
index: zero_reg(),
3215
disp: SImm20::maybe_from_i64(524287).unwrap(),
3216
flags: MemFlags::trusted(),
3217
},
3218
},
3219
"EB456FFF7FE6",
3220
"laog %r4, %r5, 524287(%r6)",
3221
));
3222
insns.push((
3223
Inst::AtomicRmw {
3224
alu_op: ALUOp::Xor32,
3225
rd: writable_gpr(4),
3226
rn: gpr(5),
3227
mem: MemArg::BXD20 {
3228
base: zero_reg(),
3229
index: zero_reg(),
3230
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3231
flags: MemFlags::trusted(),
3232
},
3233
},
3234
"EB45000080F7",
3235
"lax %r4, %r5, -524288",
3236
));
3237
insns.push((
3238
Inst::AtomicRmw {
3239
alu_op: ALUOp::Xor32,
3240
rd: writable_gpr(4),
3241
rn: gpr(5),
3242
mem: MemArg::BXD20 {
3243
base: zero_reg(),
3244
index: zero_reg(),
3245
disp: SImm20::maybe_from_i64(524287).unwrap(),
3246
flags: MemFlags::trusted(),
3247
},
3248
},
3249
"EB450FFF7FF7",
3250
"lax %r4, %r5, 524287",
3251
));
3252
insns.push((
3253
Inst::AtomicRmw {
3254
alu_op: ALUOp::Xor32,
3255
rd: writable_gpr(4),
3256
rn: gpr(5),
3257
mem: MemArg::BXD20 {
3258
base: gpr(6),
3259
index: zero_reg(),
3260
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3261
flags: MemFlags::trusted(),
3262
},
3263
},
3264
"EB45600080F7",
3265
"lax %r4, %r5, -524288(%r6)",
3266
));
3267
insns.push((
3268
Inst::AtomicRmw {
3269
alu_op: ALUOp::Xor32,
3270
rd: writable_gpr(4),
3271
rn: gpr(5),
3272
mem: MemArg::BXD20 {
3273
base: gpr(6),
3274
index: zero_reg(),
3275
disp: SImm20::maybe_from_i64(524287).unwrap(),
3276
flags: MemFlags::trusted(),
3277
},
3278
},
3279
"EB456FFF7FF7",
3280
"lax %r4, %r5, 524287(%r6)",
3281
));
3282
insns.push((
3283
Inst::AtomicRmw {
3284
alu_op: ALUOp::Xor64,
3285
rd: writable_gpr(4),
3286
rn: gpr(5),
3287
mem: MemArg::BXD20 {
3288
base: zero_reg(),
3289
index: zero_reg(),
3290
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3291
flags: MemFlags::trusted(),
3292
},
3293
},
3294
"EB45000080E7",
3295
"laxg %r4, %r5, -524288",
3296
));
3297
insns.push((
3298
Inst::AtomicRmw {
3299
alu_op: ALUOp::Xor64,
3300
rd: writable_gpr(4),
3301
rn: gpr(5),
3302
mem: MemArg::BXD20 {
3303
base: zero_reg(),
3304
index: zero_reg(),
3305
disp: SImm20::maybe_from_i64(524287).unwrap(),
3306
flags: MemFlags::trusted(),
3307
},
3308
},
3309
"EB450FFF7FE7",
3310
"laxg %r4, %r5, 524287",
3311
));
3312
insns.push((
3313
Inst::AtomicRmw {
3314
alu_op: ALUOp::Xor64,
3315
rd: writable_gpr(4),
3316
rn: gpr(5),
3317
mem: MemArg::BXD20 {
3318
base: gpr(6),
3319
index: zero_reg(),
3320
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3321
flags: MemFlags::trusted(),
3322
},
3323
},
3324
"EB45600080E7",
3325
"laxg %r4, %r5, -524288(%r6)",
3326
));
3327
insns.push((
3328
Inst::AtomicRmw {
3329
alu_op: ALUOp::Xor64,
3330
rd: writable_gpr(4),
3331
rn: gpr(5),
3332
mem: MemArg::BXD20 {
3333
base: gpr(6),
3334
index: zero_reg(),
3335
disp: SImm20::maybe_from_i64(524287).unwrap(),
3336
flags: MemFlags::trusted(),
3337
},
3338
},
3339
"EB456FFF7FE7",
3340
"laxg %r4, %r5, 524287(%r6)",
3341
));
3342
insns.push((
3343
Inst::AtomicCas32 {
3344
rd: writable_gpr(4),
3345
ri: gpr(4),
3346
rn: gpr(5),
3347
mem: MemArg::BXD12 {
3348
base: zero_reg(),
3349
index: zero_reg(),
3350
disp: UImm12::maybe_from_u64(0).unwrap(),
3351
flags: MemFlags::trusted(),
3352
},
3353
},
3354
"BA450000",
3355
"cs %r4, %r5, 0",
3356
));
3357
insns.push((
3358
Inst::AtomicCas32 {
3359
rd: writable_gpr(4),
3360
ri: gpr(4),
3361
rn: gpr(5),
3362
mem: MemArg::BXD12 {
3363
base: zero_reg(),
3364
index: zero_reg(),
3365
disp: UImm12::maybe_from_u64(4095).unwrap(),
3366
flags: MemFlags::trusted(),
3367
},
3368
},
3369
"BA450FFF",
3370
"cs %r4, %r5, 4095",
3371
));
3372
insns.push((
3373
Inst::AtomicCas32 {
3374
rd: writable_gpr(4),
3375
ri: gpr(4),
3376
rn: gpr(5),
3377
mem: MemArg::BXD20 {
3378
base: zero_reg(),
3379
index: zero_reg(),
3380
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3381
flags: MemFlags::trusted(),
3382
},
3383
},
3384
"EB4500008014",
3385
"csy %r4, %r5, -524288",
3386
));
3387
insns.push((
3388
Inst::AtomicCas32 {
3389
rd: writable_gpr(4),
3390
ri: gpr(4),
3391
rn: gpr(5),
3392
mem: MemArg::BXD20 {
3393
base: zero_reg(),
3394
index: zero_reg(),
3395
disp: SImm20::maybe_from_i64(524287).unwrap(),
3396
flags: MemFlags::trusted(),
3397
},
3398
},
3399
"EB450FFF7F14",
3400
"csy %r4, %r5, 524287",
3401
));
3402
insns.push((
3403
Inst::AtomicCas32 {
3404
rd: writable_gpr(4),
3405
ri: gpr(4),
3406
rn: gpr(5),
3407
mem: MemArg::BXD12 {
3408
base: gpr(6),
3409
index: zero_reg(),
3410
disp: UImm12::maybe_from_u64(0).unwrap(),
3411
flags: MemFlags::trusted(),
3412
},
3413
},
3414
"BA456000",
3415
"cs %r4, %r5, 0(%r6)",
3416
));
3417
insns.push((
3418
Inst::AtomicCas32 {
3419
rd: writable_gpr(4),
3420
ri: gpr(4),
3421
rn: gpr(5),
3422
mem: MemArg::BXD12 {
3423
base: gpr(6),
3424
index: zero_reg(),
3425
disp: UImm12::maybe_from_u64(4095).unwrap(),
3426
flags: MemFlags::trusted(),
3427
},
3428
},
3429
"BA456FFF",
3430
"cs %r4, %r5, 4095(%r6)",
3431
));
3432
insns.push((
3433
Inst::AtomicCas32 {
3434
rd: writable_gpr(4),
3435
ri: gpr(4),
3436
rn: gpr(5),
3437
mem: MemArg::BXD20 {
3438
base: gpr(6),
3439
index: zero_reg(),
3440
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3441
flags: MemFlags::trusted(),
3442
},
3443
},
3444
"EB4560008014",
3445
"csy %r4, %r5, -524288(%r6)",
3446
));
3447
insns.push((
3448
Inst::AtomicCas32 {
3449
rd: writable_gpr(4),
3450
ri: gpr(4),
3451
rn: gpr(5),
3452
mem: MemArg::BXD20 {
3453
base: gpr(6),
3454
index: zero_reg(),
3455
disp: SImm20::maybe_from_i64(524287).unwrap(),
3456
flags: MemFlags::trusted(),
3457
},
3458
},
3459
"EB456FFF7F14",
3460
"csy %r4, %r5, 524287(%r6)",
3461
));
3462
insns.push((
3463
Inst::AtomicCas64 {
3464
rd: writable_gpr(4),
3465
ri: gpr(4),
3466
rn: gpr(5),
3467
mem: MemArg::BXD20 {
3468
base: zero_reg(),
3469
index: zero_reg(),
3470
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3471
flags: MemFlags::trusted(),
3472
},
3473
},
3474
"EB4500008030",
3475
"csg %r4, %r5, -524288",
3476
));
3477
insns.push((
3478
Inst::AtomicCas64 {
3479
rd: writable_gpr(4),
3480
ri: gpr(4),
3481
rn: gpr(5),
3482
mem: MemArg::BXD20 {
3483
base: zero_reg(),
3484
index: zero_reg(),
3485
disp: SImm20::maybe_from_i64(524287).unwrap(),
3486
flags: MemFlags::trusted(),
3487
},
3488
},
3489
"EB450FFF7F30",
3490
"csg %r4, %r5, 524287",
3491
));
3492
insns.push((
3493
Inst::AtomicCas64 {
3494
rd: writable_gpr(4),
3495
ri: gpr(4),
3496
rn: gpr(5),
3497
mem: MemArg::BXD20 {
3498
base: gpr(6),
3499
index: zero_reg(),
3500
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3501
flags: MemFlags::trusted(),
3502
},
3503
},
3504
"EB4560008030",
3505
"csg %r4, %r5, -524288(%r6)",
3506
));
3507
insns.push((
3508
Inst::AtomicCas64 {
3509
rd: writable_gpr(4),
3510
ri: gpr(4),
3511
rn: gpr(5),
3512
mem: MemArg::BXD20 {
3513
base: gpr(6),
3514
index: zero_reg(),
3515
disp: SImm20::maybe_from_i64(524287).unwrap(),
3516
flags: MemFlags::trusted(),
3517
},
3518
},
3519
"EB456FFF7F30",
3520
"csg %r4, %r5, 524287(%r6)",
3521
));
3522
insns.push((Inst::Fence, "07E0", "bcr 14, 0"));
3523
3524
insns.push((
3525
Inst::Load32 {
3526
rd: writable_gpr(1),
3527
mem: MemArg::BXD12 {
3528
base: gpr(2),
3529
index: zero_reg(),
3530
disp: UImm12::zero(),
3531
flags: MemFlags::trusted(),
3532
},
3533
},
3534
"58102000",
3535
"l %r1, 0(%r2)",
3536
));
3537
insns.push((
3538
Inst::Load32 {
3539
rd: writable_gpr(1),
3540
mem: MemArg::BXD12 {
3541
base: gpr(2),
3542
index: zero_reg(),
3543
disp: UImm12::maybe_from_u64(4095).unwrap(),
3544
flags: MemFlags::trusted(),
3545
},
3546
},
3547
"58102FFF",
3548
"l %r1, 4095(%r2)",
3549
));
3550
insns.push((
3551
Inst::Load32 {
3552
rd: writable_gpr(1),
3553
mem: MemArg::BXD20 {
3554
base: gpr(2),
3555
index: zero_reg(),
3556
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3557
flags: MemFlags::trusted(),
3558
},
3559
},
3560
"E31020008058",
3561
"ly %r1, -524288(%r2)",
3562
));
3563
insns.push((
3564
Inst::Load32 {
3565
rd: writable_gpr(1),
3566
mem: MemArg::BXD20 {
3567
base: gpr(2),
3568
index: zero_reg(),
3569
disp: SImm20::maybe_from_i64(524287).unwrap(),
3570
flags: MemFlags::trusted(),
3571
},
3572
},
3573
"E3102FFF7F58",
3574
"ly %r1, 524287(%r2)",
3575
));
3576
insns.push((
3577
Inst::Load32 {
3578
rd: writable_gpr(1),
3579
mem: MemArg::BXD12 {
3580
base: gpr(3),
3581
index: gpr(2),
3582
disp: UImm12::zero(),
3583
flags: MemFlags::trusted(),
3584
},
3585
},
3586
"58123000",
3587
"l %r1, 0(%r2,%r3)",
3588
));
3589
insns.push((
3590
Inst::Load32 {
3591
rd: writable_gpr(1),
3592
mem: MemArg::BXD12 {
3593
base: gpr(3),
3594
index: gpr(2),
3595
disp: UImm12::maybe_from_u64(4095).unwrap(),
3596
flags: MemFlags::trusted(),
3597
},
3598
},
3599
"58123FFF",
3600
"l %r1, 4095(%r2,%r3)",
3601
));
3602
insns.push((
3603
Inst::Load32 {
3604
rd: writable_gpr(1),
3605
mem: MemArg::BXD20 {
3606
base: gpr(3),
3607
index: gpr(2),
3608
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3609
flags: MemFlags::trusted(),
3610
},
3611
},
3612
"E31230008058",
3613
"ly %r1, -524288(%r2,%r3)",
3614
));
3615
insns.push((
3616
Inst::Load32 {
3617
rd: writable_gpr(1),
3618
mem: MemArg::BXD20 {
3619
base: gpr(3),
3620
index: gpr(2),
3621
disp: SImm20::maybe_from_i64(524287).unwrap(),
3622
flags: MemFlags::trusted(),
3623
},
3624
},
3625
"E3123FFF7F58",
3626
"ly %r1, 524287(%r2,%r3)",
3627
));
3628
insns.push((
3629
Inst::Load32ZExt8 {
3630
rd: writable_gpr(1),
3631
mem: MemArg::BXD12 {
3632
base: gpr(2),
3633
index: zero_reg(),
3634
disp: UImm12::zero(),
3635
flags: MemFlags::trusted(),
3636
},
3637
},
3638
"E31020000094",
3639
"llc %r1, 0(%r2)",
3640
));
3641
insns.push((
3642
Inst::Load32ZExt8 {
3643
rd: writable_gpr(1),
3644
mem: MemArg::BXD12 {
3645
base: gpr(2),
3646
index: zero_reg(),
3647
disp: UImm12::maybe_from_u64(4095).unwrap(),
3648
flags: MemFlags::trusted(),
3649
},
3650
},
3651
"E3102FFF0094",
3652
"llc %r1, 4095(%r2)",
3653
));
3654
insns.push((
3655
Inst::Load32ZExt8 {
3656
rd: writable_gpr(1),
3657
mem: MemArg::BXD20 {
3658
base: gpr(2),
3659
index: zero_reg(),
3660
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3661
flags: MemFlags::trusted(),
3662
},
3663
},
3664
"E31020008094",
3665
"llc %r1, -524288(%r2)",
3666
));
3667
insns.push((
3668
Inst::Load32ZExt8 {
3669
rd: writable_gpr(1),
3670
mem: MemArg::BXD20 {
3671
base: gpr(2),
3672
index: zero_reg(),
3673
disp: SImm20::maybe_from_i64(524287).unwrap(),
3674
flags: MemFlags::trusted(),
3675
},
3676
},
3677
"E3102FFF7F94",
3678
"llc %r1, 524287(%r2)",
3679
));
3680
insns.push((
3681
Inst::Load32ZExt8 {
3682
rd: writable_gpr(1),
3683
mem: MemArg::BXD12 {
3684
base: gpr(3),
3685
index: gpr(2),
3686
disp: UImm12::zero(),
3687
flags: MemFlags::trusted(),
3688
},
3689
},
3690
"E31230000094",
3691
"llc %r1, 0(%r2,%r3)",
3692
));
3693
insns.push((
3694
Inst::Load32ZExt8 {
3695
rd: writable_gpr(1),
3696
mem: MemArg::BXD12 {
3697
base: gpr(3),
3698
index: gpr(2),
3699
disp: UImm12::maybe_from_u64(4095).unwrap(),
3700
flags: MemFlags::trusted(),
3701
},
3702
},
3703
"E3123FFF0094",
3704
"llc %r1, 4095(%r2,%r3)",
3705
));
3706
insns.push((
3707
Inst::Load32ZExt8 {
3708
rd: writable_gpr(1),
3709
mem: MemArg::BXD20 {
3710
base: gpr(3),
3711
index: gpr(2),
3712
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3713
flags: MemFlags::trusted(),
3714
},
3715
},
3716
"E31230008094",
3717
"llc %r1, -524288(%r2,%r3)",
3718
));
3719
insns.push((
3720
Inst::Load32ZExt8 {
3721
rd: writable_gpr(1),
3722
mem: MemArg::BXD20 {
3723
base: gpr(3),
3724
index: gpr(2),
3725
disp: SImm20::maybe_from_i64(524287).unwrap(),
3726
flags: MemFlags::trusted(),
3727
},
3728
},
3729
"E3123FFF7F94",
3730
"llc %r1, 524287(%r2,%r3)",
3731
));
3732
insns.push((
3733
Inst::Load32SExt8 {
3734
rd: writable_gpr(1),
3735
mem: MemArg::BXD12 {
3736
base: gpr(2),
3737
index: zero_reg(),
3738
disp: UImm12::zero(),
3739
flags: MemFlags::trusted(),
3740
},
3741
},
3742
"E31020000076",
3743
"lb %r1, 0(%r2)",
3744
));
3745
insns.push((
3746
Inst::Load32SExt8 {
3747
rd: writable_gpr(1),
3748
mem: MemArg::BXD12 {
3749
base: gpr(2),
3750
index: zero_reg(),
3751
disp: UImm12::maybe_from_u64(4095).unwrap(),
3752
flags: MemFlags::trusted(),
3753
},
3754
},
3755
"E3102FFF0076",
3756
"lb %r1, 4095(%r2)",
3757
));
3758
insns.push((
3759
Inst::Load32SExt8 {
3760
rd: writable_gpr(1),
3761
mem: MemArg::BXD20 {
3762
base: gpr(2),
3763
index: zero_reg(),
3764
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3765
flags: MemFlags::trusted(),
3766
},
3767
},
3768
"E31020008076",
3769
"lb %r1, -524288(%r2)",
3770
));
3771
insns.push((
3772
Inst::Load32SExt8 {
3773
rd: writable_gpr(1),
3774
mem: MemArg::BXD20 {
3775
base: gpr(2),
3776
index: zero_reg(),
3777
disp: SImm20::maybe_from_i64(524287).unwrap(),
3778
flags: MemFlags::trusted(),
3779
},
3780
},
3781
"E3102FFF7F76",
3782
"lb %r1, 524287(%r2)",
3783
));
3784
insns.push((
3785
Inst::Load32SExt8 {
3786
rd: writable_gpr(1),
3787
mem: MemArg::BXD12 {
3788
base: gpr(3),
3789
index: gpr(2),
3790
disp: UImm12::zero(),
3791
flags: MemFlags::trusted(),
3792
},
3793
},
3794
"E31230000076",
3795
"lb %r1, 0(%r2,%r3)",
3796
));
3797
insns.push((
3798
Inst::Load32SExt8 {
3799
rd: writable_gpr(1),
3800
mem: MemArg::BXD12 {
3801
base: gpr(3),
3802
index: gpr(2),
3803
disp: UImm12::maybe_from_u64(4095).unwrap(),
3804
flags: MemFlags::trusted(),
3805
},
3806
},
3807
"E3123FFF0076",
3808
"lb %r1, 4095(%r2,%r3)",
3809
));
3810
insns.push((
3811
Inst::Load32SExt8 {
3812
rd: writable_gpr(1),
3813
mem: MemArg::BXD20 {
3814
base: gpr(3),
3815
index: gpr(2),
3816
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3817
flags: MemFlags::trusted(),
3818
},
3819
},
3820
"E31230008076",
3821
"lb %r1, -524288(%r2,%r3)",
3822
));
3823
insns.push((
3824
Inst::Load32SExt8 {
3825
rd: writable_gpr(1),
3826
mem: MemArg::BXD20 {
3827
base: gpr(3),
3828
index: gpr(2),
3829
disp: SImm20::maybe_from_i64(524287).unwrap(),
3830
flags: MemFlags::trusted(),
3831
},
3832
},
3833
"E3123FFF7F76",
3834
"lb %r1, 524287(%r2,%r3)",
3835
));
3836
insns.push((
3837
Inst::Load32ZExt16 {
3838
rd: writable_gpr(1),
3839
mem: MemArg::BXD12 {
3840
base: gpr(2),
3841
index: zero_reg(),
3842
disp: UImm12::zero(),
3843
flags: MemFlags::trusted(),
3844
},
3845
},
3846
"E31020000095",
3847
"llh %r1, 0(%r2)",
3848
));
3849
insns.push((
3850
Inst::Load32ZExt16 {
3851
rd: writable_gpr(1),
3852
mem: MemArg::BXD12 {
3853
base: gpr(2),
3854
index: zero_reg(),
3855
disp: UImm12::maybe_from_u64(4095).unwrap(),
3856
flags: MemFlags::trusted(),
3857
},
3858
},
3859
"E3102FFF0095",
3860
"llh %r1, 4095(%r2)",
3861
));
3862
insns.push((
3863
Inst::Load32ZExt16 {
3864
rd: writable_gpr(1),
3865
mem: MemArg::BXD20 {
3866
base: gpr(2),
3867
index: zero_reg(),
3868
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3869
flags: MemFlags::trusted(),
3870
},
3871
},
3872
"E31020008095",
3873
"llh %r1, -524288(%r2)",
3874
));
3875
insns.push((
3876
Inst::Load32ZExt16 {
3877
rd: writable_gpr(1),
3878
mem: MemArg::BXD20 {
3879
base: gpr(2),
3880
index: zero_reg(),
3881
disp: SImm20::maybe_from_i64(524287).unwrap(),
3882
flags: MemFlags::trusted(),
3883
},
3884
},
3885
"E3102FFF7F95",
3886
"llh %r1, 524287(%r2)",
3887
));
3888
insns.push((
3889
Inst::Load32ZExt16 {
3890
rd: writable_gpr(1),
3891
mem: MemArg::BXD12 {
3892
base: gpr(3),
3893
index: gpr(2),
3894
disp: UImm12::zero(),
3895
flags: MemFlags::trusted(),
3896
},
3897
},
3898
"E31230000095",
3899
"llh %r1, 0(%r2,%r3)",
3900
));
3901
insns.push((
3902
Inst::Load32ZExt16 {
3903
rd: writable_gpr(1),
3904
mem: MemArg::BXD12 {
3905
base: gpr(3),
3906
index: gpr(2),
3907
disp: UImm12::maybe_from_u64(4095).unwrap(),
3908
flags: MemFlags::trusted(),
3909
},
3910
},
3911
"E3123FFF0095",
3912
"llh %r1, 4095(%r2,%r3)",
3913
));
3914
insns.push((
3915
Inst::Load32ZExt16 {
3916
rd: writable_gpr(1),
3917
mem: MemArg::BXD20 {
3918
base: gpr(3),
3919
index: gpr(2),
3920
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3921
flags: MemFlags::trusted(),
3922
},
3923
},
3924
"E31230008095",
3925
"llh %r1, -524288(%r2,%r3)",
3926
));
3927
insns.push((
3928
Inst::Load32ZExt16 {
3929
rd: writable_gpr(1),
3930
mem: MemArg::BXD20 {
3931
base: gpr(3),
3932
index: gpr(2),
3933
disp: SImm20::maybe_from_i64(524287).unwrap(),
3934
flags: MemFlags::trusted(),
3935
},
3936
},
3937
"E3123FFF7F95",
3938
"llh %r1, 524287(%r2,%r3)",
3939
));
3940
insns.push((
3941
Inst::Load32SExt16 {
3942
rd: writable_gpr(1),
3943
mem: MemArg::BXD12 {
3944
base: gpr(2),
3945
index: zero_reg(),
3946
disp: UImm12::zero(),
3947
flags: MemFlags::trusted(),
3948
},
3949
},
3950
"48102000",
3951
"lh %r1, 0(%r2)",
3952
));
3953
insns.push((
3954
Inst::Load32SExt16 {
3955
rd: writable_gpr(1),
3956
mem: MemArg::BXD12 {
3957
base: gpr(2),
3958
index: zero_reg(),
3959
disp: UImm12::maybe_from_u64(4095).unwrap(),
3960
flags: MemFlags::trusted(),
3961
},
3962
},
3963
"48102FFF",
3964
"lh %r1, 4095(%r2)",
3965
));
3966
insns.push((
3967
Inst::Load32SExt16 {
3968
rd: writable_gpr(1),
3969
mem: MemArg::BXD20 {
3970
base: gpr(2),
3971
index: zero_reg(),
3972
disp: SImm20::maybe_from_i64(-524288).unwrap(),
3973
flags: MemFlags::trusted(),
3974
},
3975
},
3976
"E31020008078",
3977
"lhy %r1, -524288(%r2)",
3978
));
3979
insns.push((
3980
Inst::Load32SExt16 {
3981
rd: writable_gpr(1),
3982
mem: MemArg::BXD20 {
3983
base: gpr(2),
3984
index: zero_reg(),
3985
disp: SImm20::maybe_from_i64(524287).unwrap(),
3986
flags: MemFlags::trusted(),
3987
},
3988
},
3989
"E3102FFF7F78",
3990
"lhy %r1, 524287(%r2)",
3991
));
3992
insns.push((
3993
Inst::Load32SExt16 {
3994
rd: writable_gpr(1),
3995
mem: MemArg::BXD12 {
3996
base: gpr(3),
3997
index: gpr(2),
3998
disp: UImm12::zero(),
3999
flags: MemFlags::trusted(),
4000
},
4001
},
4002
"48123000",
4003
"lh %r1, 0(%r2,%r3)",
4004
));
4005
insns.push((
4006
Inst::Load32SExt16 {
4007
rd: writable_gpr(1),
4008
mem: MemArg::BXD12 {
4009
base: gpr(3),
4010
index: gpr(2),
4011
disp: UImm12::maybe_from_u64(4095).unwrap(),
4012
flags: MemFlags::trusted(),
4013
},
4014
},
4015
"48123FFF",
4016
"lh %r1, 4095(%r2,%r3)",
4017
));
4018
insns.push((
4019
Inst::Load32SExt16 {
4020
rd: writable_gpr(1),
4021
mem: MemArg::BXD20 {
4022
base: gpr(3),
4023
index: gpr(2),
4024
disp: SImm20::maybe_from_i64(-524288).unwrap(),
4025
flags: MemFlags::trusted(),
4026
},
4027
},
4028
"E31230008078",
4029
"lhy %r1, -524288(%r2,%r3)",
4030
));
4031
insns.push((
4032
Inst::Load32SExt16 {
4033
rd: writable_gpr(1),
4034
mem: MemArg::BXD20 {
4035
base: gpr(3),
4036
index: gpr(2),
4037
disp: SImm20::maybe_from_i64(524287).unwrap(),
4038
flags: MemFlags::trusted(),
4039
},
4040
},
4041
"E3123FFF7F78",
4042
"lhy %r1, 524287(%r2,%r3)",
4043
));
4044
insns.push((
4045
Inst::Load64 {
4046
rd: writable_gpr(1),
4047
mem: MemArg::BXD12 {
4048
base: gpr(2),
4049
index: zero_reg(),
4050
disp: UImm12::zero(),
4051
flags: MemFlags::trusted(),
4052
},
4053
},
4054
"E31020000004",
4055
"lg %r1, 0(%r2)",
4056
));
4057
insns.push((
4058
Inst::Load64 {
4059
rd: writable_gpr(1),
4060
mem: MemArg::BXD12 {
4061
base: gpr(2),
4062
index: zero_reg(),
4063
disp: UImm12::maybe_from_u64(4095).unwrap(),
4064
flags: MemFlags::trusted(),
4065
},
4066
},
4067
"E3102FFF0004",
4068
"lg %r1, 4095(%r2)",
4069
));
4070
insns.push((
4071
Inst::Load64 {
4072
rd: writable_gpr(1),
4073
mem: MemArg::BXD20 {
4074
base: gpr(2),
4075
index: zero_reg(),
4076
disp: SImm20::maybe_from_i64(-524288).unwrap(),
4077
flags: MemFlags::trusted(),
4078
},
4079
},
4080
"E31020008004",
4081
"lg %r1, -524288(%r2)",
4082
));
4083
insns.push((
4084
Inst::Load64 {
4085
rd: writable_gpr(1),
4086
mem: MemArg::BXD20 {
4087
base: gpr(2),
4088
index: zero_reg(),
4089
disp: SImm20::maybe_from_i64(524287).unwrap(),
4090
flags: MemFlags::trusted(),
4091
},
4092
},
4093
"E3102FFF7F04",
4094
"lg %r1, 524287(%r2)",
4095
));
4096
insns.push((
4097
Inst::Load64 {
4098
rd: writable_gpr(1),
4099
mem: MemArg::BXD12 {
4100
base: gpr(3),
4101
index: gpr(2),
4102
disp: UImm12::zero(),
4103
flags: MemFlags::trusted(),
4104
},
4105
},
4106
"E31230000004",
4107
"lg %r1, 0(%r2,%r3)",
4108
));
4109
insns.push((
4110
Inst::Load64 {
4111
rd: writable_gpr(1),
4112
mem: MemArg::BXD12 {
4113
base: gpr(3),
4114
index: gpr(2),
4115
disp: UImm12::maybe_from_u64(4095).unwrap(),
4116
flags: MemFlags::trusted(),
4117
},
4118
},
4119
"E3123FFF0004",
4120
"lg %r1, 4095(%r2,%r3)",
4121
));
4122
insns.push((
4123
Inst::Load64 {
4124
rd: writable_gpr(1),
4125
mem: MemArg::BXD20 {
4126
base: gpr(3),
4127
index: gpr(2),
4128
disp: SImm20::maybe_from_i64(-524288).unwrap(),
4129
flags: MemFlags::trusted(),
4130
},
4131
},
4132
"E31230008004",
4133
"lg %r1, -524288(%r2,%r3)",
4134
));
4135
insns.push((
4136
Inst::Load64 {
4137
rd: writable_gpr(1),
4138
mem: MemArg::BXD20 {
4139
base: gpr(3),
4140
index: gpr(2),
4141
disp: SImm20::maybe_from_i64(524287).unwrap(),
4142
flags: MemFlags::trusted(),
4143
},
4144
},
4145
"E3123FFF7F04",
4146
"lg %r1, 524287(%r2,%r3)",
4147
));
4148
insns.push((
4149
Inst::Load64ZExt8 {
4150
rd: writable_gpr(1),
4151
mem: MemArg::BXD12 {
4152
base: gpr(2),
4153
index: zero_reg(),
4154
disp: UImm12::zero(),
4155
flags: MemFlags::trusted(),
4156
},
4157
},
4158
"E31020000090",
4159
"llgc %r1, 0(%r2)",
4160
));
4161
insns.push((
4162
Inst::Load64ZExt8 {
4163
rd: writable_gpr(1),
4164
mem: MemArg::BXD12 {
4165
base: gpr(2),
4166
index: zero_reg(),
4167
disp: UImm12::maybe_from_u64(4095).unwrap(),
4168
flags: MemFlags::trusted(),
4169
},
4170
},
4171
"E3102FFF0090",
4172
"llgc %r1, 4095(%r2)",
4173
));
4174
insns.push((
4175
Inst::Load64ZExt8 {
4176
rd: writable_gpr(1),
4177
mem: MemArg::BXD20 {
4178
base: gpr(2),
4179
index: zero_reg(),
4180
disp: SImm20::maybe_from_i64(-524288).unwrap(),
4181
flags: MemFlags::trusted(),
4182
},
4183
},
4184
"E31020008090",
4185
"llgc %r1, -524288(%r2)",
4186
));
4187
insns.push((
4188
Inst::Load64ZExt8 {
4189
rd: writable_gpr(1),
4190
mem: MemArg::BXD20 {
4191
base: gpr(2),
4192
index: zero_reg(),
4193
disp: SImm20::maybe_from_i64(524287).unwrap(),
4194
flags: MemFlags::trusted(),
4195
},
4196
},
4197
"E3102FFF7F90",
4198
"llgc %r1, 524287(%r2)",
4199
));
4200
insns.push((
4201
Inst::Load64ZExt8 {
4202
rd: writable_gpr(1),
4203
mem: MemArg::BXD12 {
4204
base: gpr(3),
4205
index: gpr(2),
4206
disp: UImm12::zero(),
4207
flags: MemFlags::trusted(),
4208
},
4209
},
4210
"E31230000090",
4211
"llgc %r1, 0(%r2,%r3)",
4212
));
4213
insns.push((
4214
Inst::Load64ZExt8 {
4215
rd: writable_gpr(1),
4216
mem: MemArg::BXD12 {
4217
base: gpr(3),
4218
index: gpr(2),
4219
disp: UImm12::maybe_from_u64(4095).unwrap(),
4220
flags: MemFlags::trusted(),
4221
},
4222
},
4223
"E3123FFF0090",
4224
"llgc %r1, 4095(%r2,%r3)",
4225
));
4226
insns.push((
4227
Inst::Load64ZExt8 {
4228
rd: writable_gpr(1),
4229
mem: MemArg::BXD20 {
4230
base: gpr(3),
4231
index: gpr(2),
4232
disp: SImm20::maybe_from_i64(-524288).unwrap(),
4233
flags: MemFlags::trusted(),
4234
},
4235
},
4236
"E31230008090",
4237
"llgc %r1, -524288(%r2,%r3)",
4238
));
4239
insns.push((
4240
Inst::Load64ZExt8 {
4241
rd: writable_gpr(1),
4242
mem: MemArg::BXD20 {
4243
base: gpr(3),
4244
index: gpr(2),
4245
disp: SImm20::maybe_from_i64(524287).unwrap(),
4246
flags: MemFlags::trusted(),
4247
},
4248
},
4249
"E3123FFF7F90",
4250
"llgc %r1, 524287(%r2,%r3)",
4251
));
4252
insns.push((
4253
Inst::Load64SExt8 {
4254
rd: writable_gpr(1),
4255
mem: MemArg::BXD12 {
4256
base: gpr(2),
4257
index: zero_reg(),
4258
disp: UImm12::zero(),
4259
flags: MemFlags::trusted(),
4260
},
4261
},
4262
"E31020000077",
4263
"lgb %r1, 0(%r2)",
4264
));
4265
insns.push((
4266
Inst::Load64SExt8 {
4267
rd: writable_gpr(1),
4268
mem: MemArg::BXD12 {
4269
base: gpr(2),
4270
index: zero_reg(),
4271
disp: UImm12::maybe_from_u64(4095).unwrap(),
4272
flags: MemFlags::trusted(),
4273
},
4274
},
4275
"E3102FFF0077",
4276
"lgb %r1, 4095(%r2)",
4277
));
4278
insns.push((
4279
Inst::Load64SExt8 {
4280
rd: writable_gpr(1),
4281
mem: MemArg::BXD20 {
4282
base: gpr(2),
4283
index: zero_reg(),
4284
disp: SImm20::maybe_from_i64(-524288).unwrap(),
4285
flags: MemFlags::trusted(),
4286
},
4287
},
4288
"E31020008077",
4289
"lgb %r1, -524288(%r2)",
4290
));
4291
insns.push((
4292
Inst::Load64SExt8 {
4293
rd: writable_gpr(1),
4294
mem: MemArg::BXD20 {
4295
base: gpr(2),
4296
index: zero_reg(),
4297
disp: SImm20::maybe_from_i64(524287).unwrap(),
4298
flags: MemFlags::trusted(),
4299
},
4300
},
4301
"E3102FFF7F77",
4302
"lgb %r1, 524287(%r2)",
4303
));
4304
insns.push((
4305
Inst::Load64SExt8 {
4306
rd: writable_gpr(1),
4307
mem: MemArg::BXD12 {
4308
base: gpr(3),
4309
index: gpr(2),
4310
disp: UImm12::zero(),
4311
flags: MemFlags::trusted(),
4312
},
4313
},
4314
"E31230000077",
4315
"lgb %r1, 0(%r2,%r3)",
4316
));
4317
insns.push((
4318
Inst::Load64SExt8 {
4319
rd: writable_gpr(1),
4320
mem: MemArg::BXD12 {
4321
base: gpr(3),
4322
index: gpr(2),
4323
disp: UImm12::maybe_from_u64(4095).unwrap(),
4324
flags: MemFlags::trusted(),
4325
},
4326
},
4327
"E3123FFF0077",
4328
"lgb %r1, 4095(%r2,%r3)",
4329
));
4330
insns.push((
4331
Inst::Load64SExt8 {
4332
rd: writable_gpr(1),
4333
mem: MemArg::BXD20 {
4334
base: gpr(3),
4335
index: gpr(2),
4336
disp: SImm20::maybe_from_i64(-524288).unwrap(),
4337
flags: MemFlags::trusted(),
4338
},
4339
},
4340
"E31230008077",
4341
"lgb %r1, -524288(%r2,%r3)",
4342
));
4343
insns.push((
4344
Inst::Load64SExt8 {
4345
rd: writable_gpr(1),
4346
mem: MemArg::BXD20 {
4347
base: gpr(3),
4348
index: gpr(2),
4349
disp: SImm20::maybe_from_i64(524287).unwrap(),
4350
flags: MemFlags::trusted(),
4351
},
4352
},
4353
"E3123FFF7F77",
4354
"lgb %r1, 524287(%r2,%r3)",
4355
));
4356
insns.push((
4357
Inst::Load64ZExt16 {
4358
rd: writable_gpr(1),
4359
mem: MemArg::BXD12 {
4360
base: gpr(2),
4361
index: zero_reg(),
4362
disp: UImm12::zero(),
4363
flags: MemFlags::trusted(),
4364
},
4365
},
4366
"E31020000091",
4367
"llgh %r1, 0(%r2)",
4368
));
4369
insns.push((
4370
Inst::Load64ZExt16 {
4371
rd: writable_gpr(1),
4372
mem: MemArg::BXD12 {
4373
base: gpr(2),
4374
index: zero_reg(),
4375
disp: UImm12::maybe_from_u64(4095).unwrap(),
4376
flags: MemFlags::trusted(),
4377
},
4378
},
4379
"E3102FFF0091",
4380
"llgh %r1, 4095(%r2)",
4381
));
4382
insns.push((
4383
Inst::Load64ZExt16 {
4384
rd: writable_gpr(1),
4385
mem: MemArg::BXD20 {
4386
base: gpr(2),
4387
index: zero_reg(),
4388
disp: SImm20::maybe_from_i64(-524288).unwrap(),
4389
flags: MemFlags::trusted(),
4390
},
4391
},
4392
"E31020008091",
4393
"llgh %r1, -524288(%r2)",
4394
));
4395
insns.push((
4396
Inst::Load64ZExt16 {
4397
rd: writable_gpr(1),
4398
mem: MemArg::BXD20 {
4399
base: gpr(2),
4400
index: zero_reg(),
4401
disp: SImm20::maybe_from_i64(524287).unwrap(),
4402
flags: MemFlags::trusted(),
4403
},
4404
},
4405
"E3102FFF7F91",
4406
"llgh %r1, 524287(%r2)",
4407
));
4408
insns.push((
4409
Inst::Load64ZExt16 {
4410
rd: writable_gpr(1),
4411
mem: MemArg::BXD12 {
4412
base: gpr(3),
4413
index: gpr(2),
4414
disp: UImm12::zero(),
4415
flags: MemFlags::trusted(),
4416
},
4417
},
4418
"E31230000091",
4419
"llgh %r1, 0(%r2,%r3)",
4420
));
4421
insns.push((
4422
Inst::Load64ZExt16 {
4423
rd: writable_gpr(1),
4424
mem: MemArg::BXD12 {
4425
base: gpr(3),
4426
index: gpr(2),
4427
disp: UImm12::maybe_from_u64(4095).unwrap(),
4428
flags: MemFlags::trusted(),
4429
},
4430
},
4431
"E3123FFF0091",
4432
"llgh %r1, 4095(%r2,%r3)",
4433
));
4434
insns.push((
4435
Inst::Load64ZExt16 {
4436
rd: writable_gpr(1),
4437
mem: MemArg::BXD20 {
4438
base: gpr(3),
4439
index: gpr(2),
4440
disp: SImm20::maybe_from_i64(-524288).unwrap(),
4441
flags: MemFlags::trusted(),
4442
},
4443
},
4444
"E31230008091",
4445
"llgh %r1, -524288(%r2,%r3)",
4446
));
4447
insns.push((
4448
Inst::Load64ZExt16 {
4449
rd: writable_gpr(1),
4450
mem: MemArg::BXD20 {
4451
base: gpr(3),
4452
index: gpr(2),
4453
disp: SImm20::maybe_from_i64(524287).unwrap(),
4454
flags: MemFlags::trusted(),
4455
},
4456
},
4457
"E3123FFF7F91",
4458
"llgh %r1, 524287(%r2,%r3)",
4459
));
4460
insns.push((
4461
Inst::Load64SExt16 {
4462
rd: writable_gpr(1),
4463
mem: MemArg::BXD12 {
4464
base: gpr(2),
4465
index: zero_reg(),
4466
disp: UImm12::zero(),
4467
flags: MemFlags::trusted(),
4468
},
4469
},
4470
"E31020000015",
4471
"lgh %r1, 0(%r2)",
4472
));
4473
insns.push((
4474
Inst::Load64SExt16 {
4475
rd: writable_gpr(1),
4476
mem: MemArg::BXD12 {
4477
base: gpr(2),
4478
index: zero_reg(),
4479
disp: UImm12::maybe_from_u64(4095).unwrap(),
4480
flags: MemFlags::trusted(),
4481
},
4482
},
4483
"E3102FFF0015",
4484
"lgh %r1, 4095(%r2)",
4485
));
4486
insns.push((
4487
Inst::Load64SExt16 {
4488
rd: writable_gpr(1),
4489
mem: MemArg::BXD20 {
4490
base: gpr(2),
4491
index: zero_reg(),
4492
disp: SImm20::maybe_from_i64(-524288).unwrap(),
4493
flags: MemFlags::trusted(),
4494
},
4495
},
4496
"E31020008015",
4497
"lgh %r1, -524288(%r2)",
4498
));
4499
insns.push((
4500
Inst::Load64SExt16 {
4501
rd: writable_gpr(1),
4502
mem: MemArg::BXD20 {
4503
base: gpr(2),
4504
index: zero_reg(),
4505
disp: SImm20::maybe_from_i64(524287).unwrap(),
4506
flags: MemFlags::trusted(),
4507
},
4508
},
4509
"E3102FFF7F15",
4510
"lgh %r1, 524287(%r2)",
4511
));
4512
insns.push((
4513
Inst::Load64SExt16 {
4514
rd: writable_gpr(1),
4515
mem: MemArg::BXD12 {
4516
base: gpr(3),
4517
index: gpr(2),
4518
disp: UImm12::zero(),
4519
flags: MemFlags::trusted(),
4520
},
4521
},
4522
"E31230000015",
4523
"lgh %r1, 0(%r2,%r3)",
4524
));
4525
insns.push((
4526
Inst::Load64SExt16 {
4527
rd: writable_gpr(1),
4528
mem: MemArg::BXD12 {
4529
base: gpr(3),
4530
index: gpr(2),
4531
disp: UImm12::maybe_from_u64(4095).unwrap(),
4532
flags: MemFlags::trusted(),
4533
},
4534
},
4535
"E3123FFF0015",
4536
"lgh %r1, 4095(%r2,%r3)",
4537
));
4538
insns.push((
4539
Inst::Load64SExt16 {
4540
rd: writable_gpr(1),
4541
mem: MemArg::BXD20 {
4542
base: gpr(3),
4543
index: gpr(2),
4544
disp: SImm20::maybe_from_i64(-524288).unwrap(),
4545
flags: MemFlags::trusted(),
4546
},
4547
},
4548
"E31230008015",
4549
"lgh %r1, -524288(%r2,%r3)",
4550
));
4551
insns.push((
4552
Inst::Load64SExt16 {
4553
rd: writable_gpr(1),
4554
mem: MemArg::BXD20 {
4555
base: gpr(3),
4556
index: gpr(2),
4557
disp: SImm20::maybe_from_i64(524287).unwrap(),
4558
flags: MemFlags::trusted(),
4559
},
4560
},
4561
"E3123FFF7F15",
4562
"lgh %r1, 524287(%r2,%r3)",
4563
));
4564
insns.push((
4565
Inst::Load64ZExt32 {
4566
rd: writable_gpr(1),
4567
mem: MemArg::BXD12 {
4568
base: gpr(2),
4569
index: zero_reg(),
4570
disp: UImm12::zero(),
4571
flags: MemFlags::trusted(),
4572
},
4573
},
4574
"E31020000016",
4575
"llgf %r1, 0(%r2)",
4576
));
4577
insns.push((
4578
Inst::Load64ZExt32 {
4579
rd: writable_gpr(1),
4580
mem: MemArg::BXD12 {
4581
base: gpr(2),
4582
index: zero_reg(),
4583
disp: UImm12::maybe_from_u64(4095).unwrap(),
4584
flags: MemFlags::trusted(),
4585
},
4586
},
4587
"E3102FFF0016",
4588
"llgf %r1, 4095(%r2)",
4589
));
4590
insns.push((
4591
Inst::Load64ZExt32 {
4592
rd: writable_gpr(1),
4593
mem: MemArg::BXD20 {
4594
base: gpr(2),
4595
index: zero_reg(),
4596
disp: SImm20::maybe_from_i64(-524288).unwrap(),
4597
flags: MemFlags::trusted(),
4598
},
4599
},
4600
"E31020008016",
4601
"llgf %r1, -524288(%r2)",
4602
));
4603
insns.push((
4604
Inst::Load64ZExt32 {
4605
rd: writable_gpr(1),
4606
mem: MemArg::BXD20 {
4607
base: gpr(2),
4608
index: zero_reg(),
4609
disp: SImm20::maybe_from_i64(524287).unwrap(),
4610
flags: MemFlags::trusted(),
4611
},
4612
},
4613
"E3102FFF7F16",
4614
"llgf %r1, 524287(%r2)",
4615
));
4616
insns.push((
4617
Inst::Load64ZExt32 {
4618
rd: writable_gpr(1),
4619
mem: MemArg::BXD12 {
4620
base: gpr(3),
4621
index: gpr(2),
4622
disp: UImm12::zero(),
4623
flags: MemFlags::trusted(),
4624
},
4625
},
4626
"E31230000016",
4627
"llgf %r1, 0(%r2,%r3)",
4628
));
4629
insns.push((
4630
Inst::Load64ZExt32 {
4631
rd: writable_gpr(1),
4632
mem: MemArg::BXD12 {
4633
base: gpr(3),
4634
index: gpr(2),
4635
disp: UImm12::maybe_from_u64(4095).unwrap(),
4636
flags: MemFlags::trusted(),
4637
},
4638
},
4639
"E3123FFF0016",
4640
"llgf %r1, 4095(%r2,%r3)",
4641
));
4642
insns.push((
4643
Inst::Load64ZExt32 {
4644
rd: writable_gpr(1),
4645
mem: MemArg::BXD20 {
4646
base: gpr(3),
4647
index: gpr(2),
4648
disp: SImm20::maybe_from_i64(-524288).unwrap(),
4649
flags: MemFlags::trusted(),
4650
},
4651
},
4652
"E31230008016",
4653
"llgf %r1, -524288(%r2,%r3)",
4654
));
4655
insns.push((
4656
Inst::Load64ZExt32 {
4657
rd: writable_gpr(1),
4658
mem: MemArg::BXD20 {
4659
base: gpr(3),
4660
index: gpr(2),
4661
disp: SImm20::maybe_from_i64(524287).unwrap(),
4662
flags: MemFlags::trusted(),
4663
},
4664
},
4665
"E3123FFF7F16",
4666
"llgf %r1, 524287(%r2,%r3)",
4667
));
4668
insns.push((
4669
Inst::Load64SExt32 {
4670
rd: writable_gpr(1),
4671
mem: MemArg::BXD12 {
4672
base: gpr(2),
4673
index: zero_reg(),
4674
disp: UImm12::zero(),
4675
flags: MemFlags::trusted(),
4676
},
4677
},
4678
"E31020000014",
4679
"lgf %r1, 0(%r2)",
4680
));
4681
insns.push((
4682
Inst::Load64SExt32 {
4683
rd: writable_gpr(1),
4684
mem: MemArg::BXD12 {
4685
base: gpr(2),
4686
index: zero_reg(),
4687
disp: UImm12::maybe_from_u64(4095).unwrap(),
4688
flags: MemFlags::trusted(),
4689
},
4690
},
4691
"E3102FFF0014",
4692
"lgf %r1, 4095(%r2)",
4693
));
4694
insns.push((
4695
Inst::Load64SExt32 {
4696
rd: writable_gpr(1),
4697
mem: MemArg::BXD20 {
4698
base: gpr(2),
4699
index: zero_reg(),
4700
disp: SImm20::maybe_from_i64(-524288).unwrap(),
4701
flags: MemFlags::trusted(),
4702
},
4703
},
4704
"E31020008014",
4705
"lgf %r1, -524288(%r2)",
4706
));
4707
insns.push((
4708
Inst::Load64SExt32 {
4709
rd: writable_gpr(1),
4710
mem: MemArg::BXD20 {
4711
base: gpr(2),
4712
index: zero_reg(),
4713
disp: SImm20::maybe_from_i64(524287).unwrap(),
4714
flags: MemFlags::trusted(),
4715
},
4716
},
4717
"E3102FFF7F14",
4718
"lgf %r1, 524287(%r2)",
4719
));
4720
insns.push((
4721
Inst::Load64SExt32 {
4722
rd: writable_gpr(1),
4723
mem: MemArg::BXD12 {
4724
base: gpr(3),
4725
index: gpr(2),
4726
disp: UImm12::zero(),
4727
flags: MemFlags::trusted(),
4728
},
4729
},
4730
"E31230000014",
4731
"lgf %r1, 0(%r2,%r3)",
4732
));
4733
insns.push((
4734
Inst::Load64SExt32 {
4735
rd: writable_gpr(1),
4736
mem: MemArg::BXD12 {
4737
base: gpr(3),
4738
index: gpr(2),
4739
disp: UImm12::maybe_from_u64(4095).unwrap(),
4740
flags: MemFlags::trusted(),
4741
},
4742
},
4743
"E3123FFF0014",
4744
"lgf %r1, 4095(%r2,%r3)",
4745
));
4746
insns.push((
4747
Inst::Load64SExt32 {
4748
rd: writable_gpr(1),
4749
mem: MemArg::BXD20 {
4750
base: gpr(3),
4751
index: gpr(2),
4752
disp: SImm20::maybe_from_i64(-524288).unwrap(),
4753
flags: MemFlags::trusted(),
4754
},
4755
},
4756
"E31230008014",
4757
"lgf %r1, -524288(%r2,%r3)",
4758
));
4759
insns.push((
4760
Inst::Load64SExt32 {
4761
rd: writable_gpr(1),
4762
mem: MemArg::BXD20 {
4763
base: gpr(3),
4764
index: gpr(2),
4765
disp: SImm20::maybe_from_i64(524287).unwrap(),
4766
flags: MemFlags::trusted(),
4767
},
4768
},
4769
"E3123FFF7F14",
4770
"lgf %r1, 524287(%r2,%r3)",
4771
));
4772
4773
insns.push((
4774
Inst::Load32 {
4775
rd: writable_gpr(1),
4776
mem: MemArg::Label {
4777
target: MachLabel::from_block(BlockIndex::new(1)),
4778
},
4779
},
4780
"C41D00000003",
4781
"lrl %r1, label1",
4782
));
4783
insns.push((
4784
Inst::Load32SExt16 {
4785
rd: writable_gpr(1),
4786
mem: MemArg::Label {
4787
target: MachLabel::from_block(BlockIndex::new(1)),
4788
},
4789
},
4790
"C41500000003",
4791
"lhrl %r1, label1",
4792
));
4793
insns.push((
4794
Inst::Load32ZExt16 {
4795
rd: writable_gpr(1),
4796
mem: MemArg::Label {
4797
target: MachLabel::from_block(BlockIndex::new(1)),
4798
},
4799
},
4800
"C41200000003",
4801
"llhrl %r1, label1",
4802
));
4803
insns.push((
4804
Inst::Load64 {
4805
rd: writable_gpr(1),
4806
mem: MemArg::Label {
4807
target: MachLabel::from_block(BlockIndex::new(1)),
4808
},
4809
},
4810
"C41800000003",
4811
"lgrl %r1, label1",
4812
));
4813
insns.push((
4814
Inst::Load64SExt16 {
4815
rd: writable_gpr(1),
4816
mem: MemArg::Label {
4817
target: MachLabel::from_block(BlockIndex::new(1)),
4818
},
4819
},
4820
"C41400000003",
4821
"lghrl %r1, label1",
4822
));
4823
insns.push((
4824
Inst::Load64ZExt16 {
4825
rd: writable_gpr(1),
4826
mem: MemArg::Label {
4827
target: MachLabel::from_block(BlockIndex::new(1)),
4828
},
4829
},
4830
"C41600000003",
4831
"llghrl %r1, label1",
4832
));
4833
insns.push((
4834
Inst::Load64SExt32 {
4835
rd: writable_gpr(1),
4836
mem: MemArg::Label {
4837
target: MachLabel::from_block(BlockIndex::new(1)),
4838
},
4839
},
4840
"C41C00000003",
4841
"lgfrl %r1, label1",
4842
));
4843
insns.push((
4844
Inst::Load64ZExt32 {
4845
rd: writable_gpr(1),
4846
mem: MemArg::Label {
4847
target: MachLabel::from_block(BlockIndex::new(1)),
4848
},
4849
},
4850
"C41E00000003",
4851
"llgfrl %r1, label1",
4852
));
4853
insns.push((
4854
Inst::LoadRev16 {
4855
rd: writable_gpr(1),
4856
mem: MemArg::BXD12 {
4857
base: gpr(2),
4858
index: zero_reg(),
4859
disp: UImm12::zero(),
4860
flags: MemFlags::trusted(),
4861
},
4862
},
4863
"E3102000001F",
4864
"lrvh %r1, 0(%r2)",
4865
));
4866
insns.push((
4867
Inst::LoadRev16 {
4868
rd: writable_gpr(1),
4869
mem: MemArg::BXD12 {
4870
base: gpr(2),
4871
index: zero_reg(),
4872
disp: UImm12::maybe_from_u64(4095).unwrap(),
4873
flags: MemFlags::trusted(),
4874
},
4875
},
4876
"E3102FFF001F",
4877
"lrvh %r1, 4095(%r2)",
4878
));
4879
insns.push((
4880
Inst::LoadRev16 {
4881
rd: writable_gpr(1),
4882
mem: MemArg::BXD20 {
4883
base: gpr(2),
4884
index: zero_reg(),
4885
disp: SImm20::maybe_from_i64(-524288).unwrap(),
4886
flags: MemFlags::trusted(),
4887
},
4888
},
4889
"E3102000801F",
4890
"lrvh %r1, -524288(%r2)",
4891
));
4892
insns.push((
4893
Inst::LoadRev16 {
4894
rd: writable_gpr(1),
4895
mem: MemArg::BXD20 {
4896
base: gpr(2),
4897
index: zero_reg(),
4898
disp: SImm20::maybe_from_i64(524287).unwrap(),
4899
flags: MemFlags::trusted(),
4900
},
4901
},
4902
"E3102FFF7F1F",
4903
"lrvh %r1, 524287(%r2)",
4904
));
4905
insns.push((
4906
Inst::LoadRev16 {
4907
rd: writable_gpr(1),
4908
mem: MemArg::BXD12 {
4909
base: gpr(3),
4910
index: gpr(2),
4911
disp: UImm12::zero(),
4912
flags: MemFlags::trusted(),
4913
},
4914
},
4915
"E3123000001F",
4916
"lrvh %r1, 0(%r2,%r3)",
4917
));
4918
insns.push((
4919
Inst::LoadRev16 {
4920
rd: writable_gpr(1),
4921
mem: MemArg::BXD12 {
4922
base: gpr(3),
4923
index: gpr(2),
4924
disp: UImm12::maybe_from_u64(4095).unwrap(),
4925
flags: MemFlags::trusted(),
4926
},
4927
},
4928
"E3123FFF001F",
4929
"lrvh %r1, 4095(%r2,%r3)",
4930
));
4931
insns.push((
4932
Inst::LoadRev16 {
4933
rd: writable_gpr(1),
4934
mem: MemArg::BXD20 {
4935
base: gpr(3),
4936
index: gpr(2),
4937
disp: SImm20::maybe_from_i64(-524288).unwrap(),
4938
flags: MemFlags::trusted(),
4939
},
4940
},
4941
"E3123000801F",
4942
"lrvh %r1, -524288(%r2,%r3)",
4943
));
4944
insns.push((
4945
Inst::LoadRev16 {
4946
rd: writable_gpr(1),
4947
mem: MemArg::BXD20 {
4948
base: gpr(3),
4949
index: gpr(2),
4950
disp: SImm20::maybe_from_i64(524287).unwrap(),
4951
flags: MemFlags::trusted(),
4952
},
4953
},
4954
"E3123FFF7F1F",
4955
"lrvh %r1, 524287(%r2,%r3)",
4956
));
4957
insns.push((
4958
Inst::LoadRev32 {
4959
rd: writable_gpr(1),
4960
mem: MemArg::BXD12 {
4961
base: gpr(2),
4962
index: zero_reg(),
4963
disp: UImm12::zero(),
4964
flags: MemFlags::trusted(),
4965
},
4966
},
4967
"E3102000001E",
4968
"lrv %r1, 0(%r2)",
4969
));
4970
insns.push((
4971
Inst::LoadRev32 {
4972
rd: writable_gpr(1),
4973
mem: MemArg::BXD12 {
4974
base: gpr(2),
4975
index: zero_reg(),
4976
disp: UImm12::maybe_from_u64(4095).unwrap(),
4977
flags: MemFlags::trusted(),
4978
},
4979
},
4980
"E3102FFF001E",
4981
"lrv %r1, 4095(%r2)",
4982
));
4983
insns.push((
4984
Inst::LoadRev32 {
4985
rd: writable_gpr(1),
4986
mem: MemArg::BXD20 {
4987
base: gpr(2),
4988
index: zero_reg(),
4989
disp: SImm20::maybe_from_i64(-524288).unwrap(),
4990
flags: MemFlags::trusted(),
4991
},
4992
},
4993
"E3102000801E",
4994
"lrv %r1, -524288(%r2)",
4995
));
4996
insns.push((
4997
Inst::LoadRev32 {
4998
rd: writable_gpr(1),
4999
mem: MemArg::BXD20 {
5000
base: gpr(2),
5001
index: zero_reg(),
5002
disp: SImm20::maybe_from_i64(524287).unwrap(),
5003
flags: MemFlags::trusted(),
5004
},
5005
},
5006
"E3102FFF7F1E",
5007
"lrv %r1, 524287(%r2)",
5008
));
5009
insns.push((
5010
Inst::LoadRev32 {
5011
rd: writable_gpr(1),
5012
mem: MemArg::BXD12 {
5013
base: gpr(3),
5014
index: gpr(2),
5015
disp: UImm12::zero(),
5016
flags: MemFlags::trusted(),
5017
},
5018
},
5019
"E3123000001E",
5020
"lrv %r1, 0(%r2,%r3)",
5021
));
5022
insns.push((
5023
Inst::LoadRev32 {
5024
rd: writable_gpr(1),
5025
mem: MemArg::BXD12 {
5026
base: gpr(3),
5027
index: gpr(2),
5028
disp: UImm12::maybe_from_u64(4095).unwrap(),
5029
flags: MemFlags::trusted(),
5030
},
5031
},
5032
"E3123FFF001E",
5033
"lrv %r1, 4095(%r2,%r3)",
5034
));
5035
insns.push((
5036
Inst::LoadRev32 {
5037
rd: writable_gpr(1),
5038
mem: MemArg::BXD20 {
5039
base: gpr(3),
5040
index: gpr(2),
5041
disp: SImm20::maybe_from_i64(-524288).unwrap(),
5042
flags: MemFlags::trusted(),
5043
},
5044
},
5045
"E3123000801E",
5046
"lrv %r1, -524288(%r2,%r3)",
5047
));
5048
insns.push((
5049
Inst::LoadRev32 {
5050
rd: writable_gpr(1),
5051
mem: MemArg::BXD20 {
5052
base: gpr(3),
5053
index: gpr(2),
5054
disp: SImm20::maybe_from_i64(524287).unwrap(),
5055
flags: MemFlags::trusted(),
5056
},
5057
},
5058
"E3123FFF7F1E",
5059
"lrv %r1, 524287(%r2,%r3)",
5060
));
5061
insns.push((
5062
Inst::LoadRev64 {
5063
rd: writable_gpr(1),
5064
mem: MemArg::BXD12 {
5065
base: gpr(2),
5066
index: zero_reg(),
5067
disp: UImm12::zero(),
5068
flags: MemFlags::trusted(),
5069
},
5070
},
5071
"E3102000000F",
5072
"lrvg %r1, 0(%r2)",
5073
));
5074
insns.push((
5075
Inst::LoadRev64 {
5076
rd: writable_gpr(1),
5077
mem: MemArg::BXD12 {
5078
base: gpr(2),
5079
index: zero_reg(),
5080
disp: UImm12::maybe_from_u64(4095).unwrap(),
5081
flags: MemFlags::trusted(),
5082
},
5083
},
5084
"E3102FFF000F",
5085
"lrvg %r1, 4095(%r2)",
5086
));
5087
insns.push((
5088
Inst::LoadRev64 {
5089
rd: writable_gpr(1),
5090
mem: MemArg::BXD20 {
5091
base: gpr(2),
5092
index: zero_reg(),
5093
disp: SImm20::maybe_from_i64(-524288).unwrap(),
5094
flags: MemFlags::trusted(),
5095
},
5096
},
5097
"E3102000800F",
5098
"lrvg %r1, -524288(%r2)",
5099
));
5100
insns.push((
5101
Inst::LoadRev64 {
5102
rd: writable_gpr(1),
5103
mem: MemArg::BXD20 {
5104
base: gpr(2),
5105
index: zero_reg(),
5106
disp: SImm20::maybe_from_i64(524287).unwrap(),
5107
flags: MemFlags::trusted(),
5108
},
5109
},
5110
"E3102FFF7F0F",
5111
"lrvg %r1, 524287(%r2)",
5112
));
5113
insns.push((
5114
Inst::LoadRev64 {
5115
rd: writable_gpr(1),
5116
mem: MemArg::BXD12 {
5117
base: gpr(3),
5118
index: gpr(2),
5119
disp: UImm12::zero(),
5120
flags: MemFlags::trusted(),
5121
},
5122
},
5123
"E3123000000F",
5124
"lrvg %r1, 0(%r2,%r3)",
5125
));
5126
insns.push((
5127
Inst::LoadRev64 {
5128
rd: writable_gpr(1),
5129
mem: MemArg::BXD12 {
5130
base: gpr(3),
5131
index: gpr(2),
5132
disp: UImm12::maybe_from_u64(4095).unwrap(),
5133
flags: MemFlags::trusted(),
5134
},
5135
},
5136
"E3123FFF000F",
5137
"lrvg %r1, 4095(%r2,%r3)",
5138
));
5139
insns.push((
5140
Inst::LoadRev64 {
5141
rd: writable_gpr(1),
5142
mem: MemArg::BXD20 {
5143
base: gpr(3),
5144
index: gpr(2),
5145
disp: SImm20::maybe_from_i64(-524288).unwrap(),
5146
flags: MemFlags::trusted(),
5147
},
5148
},
5149
"E3123000800F",
5150
"lrvg %r1, -524288(%r2,%r3)",
5151
));
5152
insns.push((
5153
Inst::LoadRev64 {
5154
rd: writable_gpr(1),
5155
mem: MemArg::BXD20 {
5156
base: gpr(3),
5157
index: gpr(2),
5158
disp: SImm20::maybe_from_i64(524287).unwrap(),
5159
flags: MemFlags::trusted(),
5160
},
5161
},
5162
"E3123FFF7F0F",
5163
"lrvg %r1, 524287(%r2,%r3)",
5164
));
5165
5166
insns.push((
5167
Inst::Store8 {
5168
rd: gpr(1),
5169
mem: MemArg::BXD12 {
5170
base: gpr(2),
5171
index: zero_reg(),
5172
disp: UImm12::zero(),
5173
flags: MemFlags::trusted(),
5174
},
5175
},
5176
"42102000",
5177
"stc %r1, 0(%r2)",
5178
));
5179
insns.push((
5180
Inst::Store8 {
5181
rd: gpr(1),
5182
mem: MemArg::BXD12 {
5183
base: gpr(2),
5184
index: zero_reg(),
5185
disp: UImm12::maybe_from_u64(4095).unwrap(),
5186
flags: MemFlags::trusted(),
5187
},
5188
},
5189
"42102FFF",
5190
"stc %r1, 4095(%r2)",
5191
));
5192
insns.push((
5193
Inst::Store8 {
5194
rd: gpr(1),
5195
mem: MemArg::BXD20 {
5196
base: gpr(2),
5197
index: zero_reg(),
5198
disp: SImm20::maybe_from_i64(-524288).unwrap(),
5199
flags: MemFlags::trusted(),
5200
},
5201
},
5202
"E31020008072",
5203
"stcy %r1, -524288(%r2)",
5204
));
5205
insns.push((
5206
Inst::Store8 {
5207
rd: gpr(1),
5208
mem: MemArg::BXD20 {
5209
base: gpr(2),
5210
index: zero_reg(),
5211
disp: SImm20::maybe_from_i64(524287).unwrap(),
5212
flags: MemFlags::trusted(),
5213
},
5214
},
5215
"E3102FFF7F72",
5216
"stcy %r1, 524287(%r2)",
5217
));
5218
insns.push((
5219
Inst::Store8 {
5220
rd: gpr(1),
5221
mem: MemArg::BXD12 {
5222
base: gpr(3),
5223
index: gpr(2),
5224
disp: UImm12::zero(),
5225
flags: MemFlags::trusted(),
5226
},
5227
},
5228
"42123000",
5229
"stc %r1, 0(%r2,%r3)",
5230
));
5231
insns.push((
5232
Inst::Store8 {
5233
rd: gpr(1),
5234
mem: MemArg::BXD12 {
5235
base: gpr(3),
5236
index: gpr(2),
5237
disp: UImm12::maybe_from_u64(4095).unwrap(),
5238
flags: MemFlags::trusted(),
5239
},
5240
},
5241
"42123FFF",
5242
"stc %r1, 4095(%r2,%r3)",
5243
));
5244
insns.push((
5245
Inst::Store8 {
5246
rd: gpr(1),
5247
mem: MemArg::BXD20 {
5248
base: gpr(3),
5249
index: gpr(2),
5250
disp: SImm20::maybe_from_i64(-524288).unwrap(),
5251
flags: MemFlags::trusted(),
5252
},
5253
},
5254
"E31230008072",
5255
"stcy %r1, -524288(%r2,%r3)",
5256
));
5257
insns.push((
5258
Inst::Store8 {
5259
rd: gpr(1),
5260
mem: MemArg::BXD20 {
5261
base: gpr(3),
5262
index: gpr(2),
5263
disp: SImm20::maybe_from_i64(524287).unwrap(),
5264
flags: MemFlags::trusted(),
5265
},
5266
},
5267
"E3123FFF7F72",
5268
"stcy %r1, 524287(%r2,%r3)",
5269
));
5270
insns.push((
5271
Inst::Store16 {
5272
rd: gpr(1),
5273
mem: MemArg::BXD12 {
5274
base: gpr(2),
5275
index: zero_reg(),
5276
disp: UImm12::zero(),
5277
flags: MemFlags::trusted(),
5278
},
5279
},
5280
"40102000",
5281
"sth %r1, 0(%r2)",
5282
));
5283
insns.push((
5284
Inst::Store16 {
5285
rd: gpr(1),
5286
mem: MemArg::BXD12 {
5287
base: gpr(2),
5288
index: zero_reg(),
5289
disp: UImm12::maybe_from_u64(4095).unwrap(),
5290
flags: MemFlags::trusted(),
5291
},
5292
},
5293
"40102FFF",
5294
"sth %r1, 4095(%r2)",
5295
));
5296
insns.push((
5297
Inst::Store16 {
5298
rd: gpr(1),
5299
mem: MemArg::BXD20 {
5300
base: gpr(2),
5301
index: zero_reg(),
5302
disp: SImm20::maybe_from_i64(-524288).unwrap(),
5303
flags: MemFlags::trusted(),
5304
},
5305
},
5306
"E31020008070",
5307
"sthy %r1, -524288(%r2)",
5308
));
5309
insns.push((
5310
Inst::Store16 {
5311
rd: gpr(1),
5312
mem: MemArg::BXD20 {
5313
base: gpr(2),
5314
index: zero_reg(),
5315
disp: SImm20::maybe_from_i64(524287).unwrap(),
5316
flags: MemFlags::trusted(),
5317
},
5318
},
5319
"E3102FFF7F70",
5320
"sthy %r1, 524287(%r2)",
5321
));
5322
insns.push((
5323
Inst::Store16 {
5324
rd: gpr(1),
5325
mem: MemArg::BXD12 {
5326
base: gpr(3),
5327
index: gpr(2),
5328
disp: UImm12::zero(),
5329
flags: MemFlags::trusted(),
5330
},
5331
},
5332
"40123000",
5333
"sth %r1, 0(%r2,%r3)",
5334
));
5335
insns.push((
5336
Inst::Store16 {
5337
rd: gpr(1),
5338
mem: MemArg::BXD12 {
5339
base: gpr(3),
5340
index: gpr(2),
5341
disp: UImm12::maybe_from_u64(4095).unwrap(),
5342
flags: MemFlags::trusted(),
5343
},
5344
},
5345
"40123FFF",
5346
"sth %r1, 4095(%r2,%r3)",
5347
));
5348
insns.push((
5349
Inst::Store16 {
5350
rd: gpr(1),
5351
mem: MemArg::BXD20 {
5352
base: gpr(3),
5353
index: gpr(2),
5354
disp: SImm20::maybe_from_i64(-524288).unwrap(),
5355
flags: MemFlags::trusted(),
5356
},
5357
},
5358
"E31230008070",
5359
"sthy %r1, -524288(%r2,%r3)",
5360
));
5361
insns.push((
5362
Inst::Store16 {
5363
rd: gpr(1),
5364
mem: MemArg::BXD20 {
5365
base: gpr(3),
5366
index: gpr(2),
5367
disp: SImm20::maybe_from_i64(524287).unwrap(),
5368
flags: MemFlags::trusted(),
5369
},
5370
},
5371
"E3123FFF7F70",
5372
"sthy %r1, 524287(%r2,%r3)",
5373
));
5374
insns.push((
5375
Inst::Store32 {
5376
rd: gpr(1),
5377
mem: MemArg::BXD12 {
5378
base: gpr(2),
5379
index: zero_reg(),
5380
disp: UImm12::zero(),
5381
flags: MemFlags::trusted(),
5382
},
5383
},
5384
"50102000",
5385
"st %r1, 0(%r2)",
5386
));
5387
insns.push((
5388
Inst::Store32 {
5389
rd: gpr(1),
5390
mem: MemArg::BXD12 {
5391
base: gpr(2),
5392
index: zero_reg(),
5393
disp: UImm12::maybe_from_u64(4095).unwrap(),
5394
flags: MemFlags::trusted(),
5395
},
5396
},
5397
"50102FFF",
5398
"st %r1, 4095(%r2)",
5399
));
5400
insns.push((
5401
Inst::Store32 {
5402
rd: gpr(1),
5403
mem: MemArg::BXD20 {
5404
base: gpr(2),
5405
index: zero_reg(),
5406
disp: SImm20::maybe_from_i64(-524288).unwrap(),
5407
flags: MemFlags::trusted(),
5408
},
5409
},
5410
"E31020008050",
5411
"sty %r1, -524288(%r2)",
5412
));
5413
insns.push((
5414
Inst::Store32 {
5415
rd: gpr(1),
5416
mem: MemArg::BXD20 {
5417
base: gpr(2),
5418
index: zero_reg(),
5419
disp: SImm20::maybe_from_i64(524287).unwrap(),
5420
flags: MemFlags::trusted(),
5421
},
5422
},
5423
"E3102FFF7F50",
5424
"sty %r1, 524287(%r2)",
5425
));
5426
insns.push((
5427
Inst::Store32 {
5428
rd: gpr(1),
5429
mem: MemArg::BXD12 {
5430
base: gpr(3),
5431
index: gpr(2),
5432
disp: UImm12::zero(),
5433
flags: MemFlags::trusted(),
5434
},
5435
},
5436
"50123000",
5437
"st %r1, 0(%r2,%r3)",
5438
));
5439
insns.push((
5440
Inst::Store32 {
5441
rd: gpr(1),
5442
mem: MemArg::BXD12 {
5443
base: gpr(3),
5444
index: gpr(2),
5445
disp: UImm12::maybe_from_u64(4095).unwrap(),
5446
flags: MemFlags::trusted(),
5447
},
5448
},
5449
"50123FFF",
5450
"st %r1, 4095(%r2,%r3)",
5451
));
5452
insns.push((
5453
Inst::Store32 {
5454
rd: gpr(1),
5455
mem: MemArg::BXD20 {
5456
base: gpr(3),
5457
index: gpr(2),
5458
disp: SImm20::maybe_from_i64(-524288).unwrap(),
5459
flags: MemFlags::trusted(),
5460
},
5461
},
5462
"E31230008050",
5463
"sty %r1, -524288(%r2,%r3)",
5464
));
5465
insns.push((
5466
Inst::Store32 {
5467
rd: gpr(1),
5468
mem: MemArg::BXD20 {
5469
base: gpr(3),
5470
index: gpr(2),
5471
disp: SImm20::maybe_from_i64(524287).unwrap(),
5472
flags: MemFlags::trusted(),
5473
},
5474
},
5475
"E3123FFF7F50",
5476
"sty %r1, 524287(%r2,%r3)",
5477
));
5478
insns.push((
5479
Inst::Store64 {
5480
rd: gpr(1),
5481
mem: MemArg::BXD12 {
5482
base: gpr(2),
5483
index: zero_reg(),
5484
disp: UImm12::zero(),
5485
flags: MemFlags::trusted(),
5486
},
5487
},
5488
"E31020000024",
5489
"stg %r1, 0(%r2)",
5490
));
5491
insns.push((
5492
Inst::Store64 {
5493
rd: gpr(1),
5494
mem: MemArg::BXD12 {
5495
base: gpr(2),
5496
index: zero_reg(),
5497
disp: UImm12::maybe_from_u64(4095).unwrap(),
5498
flags: MemFlags::trusted(),
5499
},
5500
},
5501
"E3102FFF0024",
5502
"stg %r1, 4095(%r2)",
5503
));
5504
insns.push((
5505
Inst::Store64 {
5506
rd: gpr(1),
5507
mem: MemArg::BXD20 {
5508
base: gpr(2),
5509
index: zero_reg(),
5510
disp: SImm20::maybe_from_i64(-524288).unwrap(),
5511
flags: MemFlags::trusted(),
5512
},
5513
},
5514
"E31020008024",
5515
"stg %r1, -524288(%r2)",
5516
));
5517
insns.push((
5518
Inst::Store64 {
5519
rd: gpr(1),
5520
mem: MemArg::BXD20 {
5521
base: gpr(2),
5522
index: zero_reg(),
5523
disp: SImm20::maybe_from_i64(524287).unwrap(),
5524
flags: MemFlags::trusted(),
5525
},
5526
},
5527
"E3102FFF7F24",
5528
"stg %r1, 524287(%r2)",
5529
));
5530
insns.push((
5531
Inst::Store64 {
5532
rd: gpr(1),
5533
mem: MemArg::BXD12 {
5534
base: gpr(3),
5535
index: gpr(2),
5536
disp: UImm12::zero(),
5537
flags: MemFlags::trusted(),
5538
},
5539
},
5540
"E31230000024",
5541
"stg %r1, 0(%r2,%r3)",
5542
));
5543
insns.push((
5544
Inst::Store64 {
5545
rd: gpr(1),
5546
mem: MemArg::BXD12 {
5547
base: gpr(3),
5548
index: gpr(2),
5549
disp: UImm12::maybe_from_u64(4095).unwrap(),
5550
flags: MemFlags::trusted(),
5551
},
5552
},
5553
"E3123FFF0024",
5554
"stg %r1, 4095(%r2,%r3)",
5555
));
5556
insns.push((
5557
Inst::Store64 {
5558
rd: gpr(1),
5559
mem: MemArg::BXD20 {
5560
base: gpr(3),
5561
index: gpr(2),
5562
disp: SImm20::maybe_from_i64(-524288).unwrap(),
5563
flags: MemFlags::trusted(),
5564
},
5565
},
5566
"E31230008024",
5567
"stg %r1, -524288(%r2,%r3)",
5568
));
5569
insns.push((
5570
Inst::Store64 {
5571
rd: gpr(1),
5572
mem: MemArg::BXD20 {
5573
base: gpr(3),
5574
index: gpr(2),
5575
disp: SImm20::maybe_from_i64(524287).unwrap(),
5576
flags: MemFlags::trusted(),
5577
},
5578
},
5579
"E3123FFF7F24",
5580
"stg %r1, 524287(%r2,%r3)",
5581
));
5582
5583
insns.push((
5584
Inst::StoreImm8 {
5585
imm: 255,
5586
mem: MemArg::BXD12 {
5587
base: gpr(2),
5588
index: zero_reg(),
5589
disp: UImm12::zero(),
5590
flags: MemFlags::trusted(),
5591
},
5592
},
5593
"92FF2000",
5594
"mvi 0(%r2), 255",
5595
));
5596
insns.push((
5597
Inst::StoreImm8 {
5598
imm: 0,
5599
mem: MemArg::BXD12 {
5600
base: gpr(2),
5601
index: zero_reg(),
5602
disp: UImm12::maybe_from_u64(4095).unwrap(),
5603
flags: MemFlags::trusted(),
5604
},
5605
},
5606
"92002FFF",
5607
"mvi 4095(%r2), 0",
5608
));
5609
insns.push((
5610
Inst::StoreImm8 {
5611
imm: 255,
5612
mem: MemArg::BXD20 {
5613
base: gpr(2),
5614
index: zero_reg(),
5615
disp: SImm20::maybe_from_i64(-524288).unwrap(),
5616
flags: MemFlags::trusted(),
5617
},
5618
},
5619
"EBFF20008052",
5620
"mviy -524288(%r2), 255",
5621
));
5622
insns.push((
5623
Inst::StoreImm8 {
5624
imm: 0,
5625
mem: MemArg::BXD20 {
5626
base: gpr(2),
5627
index: zero_reg(),
5628
disp: SImm20::maybe_from_i64(524287).unwrap(),
5629
flags: MemFlags::trusted(),
5630
},
5631
},
5632
"EB002FFF7F52",
5633
"mviy 524287(%r2), 0",
5634
));
5635
insns.push((
5636
Inst::StoreImm16 {
5637
imm: -32768,
5638
mem: MemArg::BXD12 {
5639
base: gpr(2),
5640
index: zero_reg(),
5641
disp: UImm12::zero(),
5642
flags: MemFlags::trusted(),
5643
},
5644
},
5645
"E54420008000",
5646
"mvhhi 0(%r2), -32768",
5647
));
5648
insns.push((
5649
Inst::StoreImm16 {
5650
imm: 32767,
5651
mem: MemArg::BXD12 {
5652
base: gpr(2),
5653
index: zero_reg(),
5654
disp: UImm12::maybe_from_u64(4095).unwrap(),
5655
flags: MemFlags::trusted(),
5656
},
5657
},
5658
"E5442FFF7FFF",
5659
"mvhhi 4095(%r2), 32767",
5660
));
5661
insns.push((
5662
Inst::StoreImm32SExt16 {
5663
imm: -32768,
5664
mem: MemArg::BXD12 {
5665
base: gpr(2),
5666
index: zero_reg(),
5667
disp: UImm12::zero(),
5668
flags: MemFlags::trusted(),
5669
},
5670
},
5671
"E54C20008000",
5672
"mvhi 0(%r2), -32768",
5673
));
5674
insns.push((
5675
Inst::StoreImm32SExt16 {
5676
imm: 32767,
5677
mem: MemArg::BXD12 {
5678
base: gpr(2),
5679
index: zero_reg(),
5680
disp: UImm12::maybe_from_u64(4095).unwrap(),
5681
flags: MemFlags::trusted(),
5682
},
5683
},
5684
"E54C2FFF7FFF",
5685
"mvhi 4095(%r2), 32767",
5686
));
5687
insns.push((
5688
Inst::StoreImm64SExt16 {
5689
imm: -32768,
5690
mem: MemArg::BXD12 {
5691
base: gpr(2),
5692
index: zero_reg(),
5693
disp: UImm12::zero(),
5694
flags: MemFlags::trusted(),
5695
},
5696
},
5697
"E54820008000",
5698
"mvghi 0(%r2), -32768",
5699
));
5700
insns.push((
5701
Inst::StoreImm64SExt16 {
5702
imm: 32767,
5703
mem: MemArg::BXD12 {
5704
base: gpr(2),
5705
index: zero_reg(),
5706
disp: UImm12::maybe_from_u64(4095).unwrap(),
5707
flags: MemFlags::trusted(),
5708
},
5709
},
5710
"E5482FFF7FFF",
5711
"mvghi 4095(%r2), 32767",
5712
));
5713
5714
insns.push((
5715
Inst::StoreRev16 {
5716
rd: gpr(1),
5717
mem: MemArg::BXD12 {
5718
base: gpr(2),
5719
index: zero_reg(),
5720
disp: UImm12::zero(),
5721
flags: MemFlags::trusted(),
5722
},
5723
},
5724
"E3102000003F",
5725
"strvh %r1, 0(%r2)",
5726
));
5727
insns.push((
5728
Inst::StoreRev16 {
5729
rd: gpr(1),
5730
mem: MemArg::BXD12 {
5731
base: gpr(2),
5732
index: zero_reg(),
5733
disp: UImm12::maybe_from_u64(4095).unwrap(),
5734
flags: MemFlags::trusted(),
5735
},
5736
},
5737
"E3102FFF003F",
5738
"strvh %r1, 4095(%r2)",
5739
));
5740
insns.push((
5741
Inst::StoreRev16 {
5742
rd: gpr(1),
5743
mem: MemArg::BXD20 {
5744
base: gpr(2),
5745
index: zero_reg(),
5746
disp: SImm20::maybe_from_i64(-524288).unwrap(),
5747
flags: MemFlags::trusted(),
5748
},
5749
},
5750
"E3102000803F",
5751
"strvh %r1, -524288(%r2)",
5752
));
5753
insns.push((
5754
Inst::StoreRev16 {
5755
rd: gpr(1),
5756
mem: MemArg::BXD20 {
5757
base: gpr(2),
5758
index: zero_reg(),
5759
disp: SImm20::maybe_from_i64(524287).unwrap(),
5760
flags: MemFlags::trusted(),
5761
},
5762
},
5763
"E3102FFF7F3F",
5764
"strvh %r1, 524287(%r2)",
5765
));
5766
insns.push((
5767
Inst::StoreRev16 {
5768
rd: gpr(1),
5769
mem: MemArg::BXD12 {
5770
base: gpr(3),
5771
index: gpr(2),
5772
disp: UImm12::zero(),
5773
flags: MemFlags::trusted(),
5774
},
5775
},
5776
"E3123000003F",
5777
"strvh %r1, 0(%r2,%r3)",
5778
));
5779
insns.push((
5780
Inst::StoreRev16 {
5781
rd: gpr(1),
5782
mem: MemArg::BXD12 {
5783
base: gpr(3),
5784
index: gpr(2),
5785
disp: UImm12::maybe_from_u64(4095).unwrap(),
5786
flags: MemFlags::trusted(),
5787
},
5788
},
5789
"E3123FFF003F",
5790
"strvh %r1, 4095(%r2,%r3)",
5791
));
5792
insns.push((
5793
Inst::StoreRev16 {
5794
rd: gpr(1),
5795
mem: MemArg::BXD20 {
5796
base: gpr(3),
5797
index: gpr(2),
5798
disp: SImm20::maybe_from_i64(-524288).unwrap(),
5799
flags: MemFlags::trusted(),
5800
},
5801
},
5802
"E3123000803F",
5803
"strvh %r1, -524288(%r2,%r3)",
5804
));
5805
insns.push((
5806
Inst::StoreRev16 {
5807
rd: gpr(1),
5808
mem: MemArg::BXD20 {
5809
base: gpr(3),
5810
index: gpr(2),
5811
disp: SImm20::maybe_from_i64(524287).unwrap(),
5812
flags: MemFlags::trusted(),
5813
},
5814
},
5815
"E3123FFF7F3F",
5816
"strvh %r1, 524287(%r2,%r3)",
5817
));
5818
insns.push((
5819
Inst::StoreRev32 {
5820
rd: gpr(1),
5821
mem: MemArg::BXD12 {
5822
base: gpr(2),
5823
index: zero_reg(),
5824
disp: UImm12::zero(),
5825
flags: MemFlags::trusted(),
5826
},
5827
},
5828
"E3102000003E",
5829
"strv %r1, 0(%r2)",
5830
));
5831
insns.push((
5832
Inst::StoreRev32 {
5833
rd: gpr(1),
5834
mem: MemArg::BXD12 {
5835
base: gpr(2),
5836
index: zero_reg(),
5837
disp: UImm12::maybe_from_u64(4095).unwrap(),
5838
flags: MemFlags::trusted(),
5839
},
5840
},
5841
"E3102FFF003E",
5842
"strv %r1, 4095(%r2)",
5843
));
5844
insns.push((
5845
Inst::StoreRev32 {
5846
rd: gpr(1),
5847
mem: MemArg::BXD20 {
5848
base: gpr(2),
5849
index: zero_reg(),
5850
disp: SImm20::maybe_from_i64(-524288).unwrap(),
5851
flags: MemFlags::trusted(),
5852
},
5853
},
5854
"E3102000803E",
5855
"strv %r1, -524288(%r2)",
5856
));
5857
insns.push((
5858
Inst::StoreRev32 {
5859
rd: gpr(1),
5860
mem: MemArg::BXD20 {
5861
base: gpr(2),
5862
index: zero_reg(),
5863
disp: SImm20::maybe_from_i64(524287).unwrap(),
5864
flags: MemFlags::trusted(),
5865
},
5866
},
5867
"E3102FFF7F3E",
5868
"strv %r1, 524287(%r2)",
5869
));
5870
insns.push((
5871
Inst::StoreRev32 {
5872
rd: gpr(1),
5873
mem: MemArg::BXD12 {
5874
base: gpr(3),
5875
index: gpr(2),
5876
disp: UImm12::zero(),
5877
flags: MemFlags::trusted(),
5878
},
5879
},
5880
"E3123000003E",
5881
"strv %r1, 0(%r2,%r3)",
5882
));
5883
insns.push((
5884
Inst::StoreRev32 {
5885
rd: gpr(1),
5886
mem: MemArg::BXD12 {
5887
base: gpr(3),
5888
index: gpr(2),
5889
disp: UImm12::maybe_from_u64(4095).unwrap(),
5890
flags: MemFlags::trusted(),
5891
},
5892
},
5893
"E3123FFF003E",
5894
"strv %r1, 4095(%r2,%r3)",
5895
));
5896
insns.push((
5897
Inst::StoreRev32 {
5898
rd: gpr(1),
5899
mem: MemArg::BXD20 {
5900
base: gpr(3),
5901
index: gpr(2),
5902
disp: SImm20::maybe_from_i64(-524288).unwrap(),
5903
flags: MemFlags::trusted(),
5904
},
5905
},
5906
"E3123000803E",
5907
"strv %r1, -524288(%r2,%r3)",
5908
));
5909
insns.push((
5910
Inst::StoreRev32 {
5911
rd: gpr(1),
5912
mem: MemArg::BXD20 {
5913
base: gpr(3),
5914
index: gpr(2),
5915
disp: SImm20::maybe_from_i64(524287).unwrap(),
5916
flags: MemFlags::trusted(),
5917
},
5918
},
5919
"E3123FFF7F3E",
5920
"strv %r1, 524287(%r2,%r3)",
5921
));
5922
insns.push((
5923
Inst::StoreRev64 {
5924
rd: gpr(1),
5925
mem: MemArg::BXD12 {
5926
base: gpr(2),
5927
index: zero_reg(),
5928
disp: UImm12::zero(),
5929
flags: MemFlags::trusted(),
5930
},
5931
},
5932
"E3102000002F",
5933
"strvg %r1, 0(%r2)",
5934
));
5935
insns.push((
5936
Inst::StoreRev64 {
5937
rd: gpr(1),
5938
mem: MemArg::BXD12 {
5939
base: gpr(2),
5940
index: zero_reg(),
5941
disp: UImm12::maybe_from_u64(4095).unwrap(),
5942
flags: MemFlags::trusted(),
5943
},
5944
},
5945
"E3102FFF002F",
5946
"strvg %r1, 4095(%r2)",
5947
));
5948
insns.push((
5949
Inst::StoreRev64 {
5950
rd: gpr(1),
5951
mem: MemArg::BXD20 {
5952
base: gpr(2),
5953
index: zero_reg(),
5954
disp: SImm20::maybe_from_i64(-524288).unwrap(),
5955
flags: MemFlags::trusted(),
5956
},
5957
},
5958
"E3102000802F",
5959
"strvg %r1, -524288(%r2)",
5960
));
5961
insns.push((
5962
Inst::StoreRev64 {
5963
rd: gpr(1),
5964
mem: MemArg::BXD20 {
5965
base: gpr(2),
5966
index: zero_reg(),
5967
disp: SImm20::maybe_from_i64(524287).unwrap(),
5968
flags: MemFlags::trusted(),
5969
},
5970
},
5971
"E3102FFF7F2F",
5972
"strvg %r1, 524287(%r2)",
5973
));
5974
insns.push((
5975
Inst::StoreRev64 {
5976
rd: gpr(1),
5977
mem: MemArg::BXD12 {
5978
base: gpr(3),
5979
index: gpr(2),
5980
disp: UImm12::zero(),
5981
flags: MemFlags::trusted(),
5982
},
5983
},
5984
"E3123000002F",
5985
"strvg %r1, 0(%r2,%r3)",
5986
));
5987
insns.push((
5988
Inst::StoreRev64 {
5989
rd: gpr(1),
5990
mem: MemArg::BXD12 {
5991
base: gpr(3),
5992
index: gpr(2),
5993
disp: UImm12::maybe_from_u64(4095).unwrap(),
5994
flags: MemFlags::trusted(),
5995
},
5996
},
5997
"E3123FFF002F",
5998
"strvg %r1, 4095(%r2,%r3)",
5999
));
6000
insns.push((
6001
Inst::StoreRev64 {
6002
rd: gpr(1),
6003
mem: MemArg::BXD20 {
6004
base: gpr(3),
6005
index: gpr(2),
6006
disp: SImm20::maybe_from_i64(-524288).unwrap(),
6007
flags: MemFlags::trusted(),
6008
},
6009
},
6010
"E3123000802F",
6011
"strvg %r1, -524288(%r2,%r3)",
6012
));
6013
insns.push((
6014
Inst::StoreRev64 {
6015
rd: gpr(1),
6016
mem: MemArg::BXD20 {
6017
base: gpr(3),
6018
index: gpr(2),
6019
disp: SImm20::maybe_from_i64(524287).unwrap(),
6020
flags: MemFlags::trusted(),
6021
},
6022
},
6023
"E3123FFF7F2F",
6024
"strvg %r1, 524287(%r2,%r3)",
6025
));
6026
6027
insns.push((
6028
Inst::Store16 {
6029
rd: gpr(1),
6030
mem: MemArg::Label {
6031
target: MachLabel::from_block(BlockIndex::new(1)),
6032
},
6033
},
6034
"C41700000003",
6035
"sthrl %r1, label1",
6036
));
6037
insns.push((
6038
Inst::Store32 {
6039
rd: gpr(1),
6040
mem: MemArg::Label {
6041
target: MachLabel::from_block(BlockIndex::new(1)),
6042
},
6043
},
6044
"C41F00000003",
6045
"strl %r1, label1",
6046
));
6047
insns.push((
6048
Inst::Store64 {
6049
rd: gpr(1),
6050
mem: MemArg::Label {
6051
target: MachLabel::from_block(BlockIndex::new(1)),
6052
},
6053
},
6054
"C41B00000003",
6055
"stgrl %r1, label1",
6056
));
6057
6058
insns.push((
6059
Inst::LoadMultiple64 {
6060
rt: writable_gpr(8),
6061
rt2: writable_gpr(12),
6062
mem: MemArg::BXD20 {
6063
base: gpr(15),
6064
index: zero_reg(),
6065
disp: SImm20::maybe_from_i64(-524288).unwrap(),
6066
flags: MemFlags::trusted(),
6067
},
6068
},
6069
"EB8CF0008004",
6070
"lmg %r8, %r12, -524288(%r15)",
6071
));
6072
insns.push((
6073
Inst::LoadMultiple64 {
6074
rt: writable_gpr(8),
6075
rt2: writable_gpr(12),
6076
mem: MemArg::BXD20 {
6077
base: gpr(15),
6078
index: zero_reg(),
6079
disp: SImm20::maybe_from_i64(524287).unwrap(),
6080
flags: MemFlags::trusted(),
6081
},
6082
},
6083
"EB8CFFFF7F04",
6084
"lmg %r8, %r12, 524287(%r15)",
6085
));
6086
6087
insns.push((
6088
Inst::StoreMultiple64 {
6089
rt: gpr(8),
6090
rt2: gpr(12),
6091
mem: MemArg::BXD20 {
6092
base: gpr(15),
6093
index: zero_reg(),
6094
disp: SImm20::maybe_from_i64(-524288).unwrap(),
6095
flags: MemFlags::trusted(),
6096
},
6097
},
6098
"EB8CF0008024",
6099
"stmg %r8, %r12, -524288(%r15)",
6100
));
6101
insns.push((
6102
Inst::StoreMultiple64 {
6103
rt: gpr(8),
6104
rt2: gpr(12),
6105
mem: MemArg::BXD20 {
6106
base: gpr(15),
6107
index: zero_reg(),
6108
disp: SImm20::maybe_from_i64(524287).unwrap(),
6109
flags: MemFlags::trusted(),
6110
},
6111
},
6112
"EB8CFFFF7F24",
6113
"stmg %r8, %r12, 524287(%r15)",
6114
));
6115
6116
insns.push((
6117
Inst::LoadAddr {
6118
rd: writable_gpr(1),
6119
mem: MemArg::BXD12 {
6120
base: zero_reg(),
6121
index: zero_reg(),
6122
disp: UImm12::zero(),
6123
flags: MemFlags::trusted(),
6124
},
6125
},
6126
"41100000",
6127
"la %r1, 0",
6128
));
6129
insns.push((
6130
Inst::LoadAddr {
6131
rd: writable_gpr(1),
6132
mem: MemArg::BXD12 {
6133
base: zero_reg(),
6134
index: zero_reg(),
6135
disp: UImm12::maybe_from_u64(4095).unwrap(),
6136
flags: MemFlags::trusted(),
6137
},
6138
},
6139
"41100FFF",
6140
"la %r1, 4095",
6141
));
6142
insns.push((
6143
Inst::LoadAddr {
6144
rd: writable_gpr(1),
6145
mem: MemArg::BXD20 {
6146
base: zero_reg(),
6147
index: zero_reg(),
6148
disp: SImm20::maybe_from_i64(-524288).unwrap(),
6149
flags: MemFlags::trusted(),
6150
},
6151
},
6152
"E31000008071",
6153
"lay %r1, -524288",
6154
));
6155
insns.push((
6156
Inst::LoadAddr {
6157
rd: writable_gpr(1),
6158
mem: MemArg::BXD20 {
6159
base: zero_reg(),
6160
index: zero_reg(),
6161
disp: SImm20::maybe_from_i64(524287).unwrap(),
6162
flags: MemFlags::trusted(),
6163
},
6164
},
6165
"E3100FFF7F71",
6166
"lay %r1, 524287",
6167
));
6168
insns.push((
6169
Inst::LoadAddr {
6170
rd: writable_gpr(1),
6171
mem: MemArg::BXD12 {
6172
base: gpr(2),
6173
index: zero_reg(),
6174
disp: UImm12::zero(),
6175
flags: MemFlags::trusted(),
6176
},
6177
},
6178
"41102000",
6179
"la %r1, 0(%r2)",
6180
));
6181
insns.push((
6182
Inst::LoadAddr {
6183
rd: writable_gpr(1),
6184
mem: MemArg::BXD12 {
6185
base: gpr(2),
6186
index: zero_reg(),
6187
disp: UImm12::maybe_from_u64(4095).unwrap(),
6188
flags: MemFlags::trusted(),
6189
},
6190
},
6191
"41102FFF",
6192
"la %r1, 4095(%r2)",
6193
));
6194
insns.push((
6195
Inst::LoadAddr {
6196
rd: writable_gpr(1),
6197
mem: MemArg::BXD20 {
6198
base: gpr(2),
6199
index: zero_reg(),
6200
disp: SImm20::maybe_from_i64(-524288).unwrap(),
6201
flags: MemFlags::trusted(),
6202
},
6203
},
6204
"E31020008071",
6205
"lay %r1, -524288(%r2)",
6206
));
6207
insns.push((
6208
Inst::LoadAddr {
6209
rd: writable_gpr(1),
6210
mem: MemArg::BXD20 {
6211
base: gpr(2),
6212
index: zero_reg(),
6213
disp: SImm20::maybe_from_i64(524287).unwrap(),
6214
flags: MemFlags::trusted(),
6215
},
6216
},
6217
"E3102FFF7F71",
6218
"lay %r1, 524287(%r2)",
6219
));
6220
insns.push((
6221
Inst::LoadAddr {
6222
rd: writable_gpr(1),
6223
mem: MemArg::BXD12 {
6224
base: gpr(3),
6225
index: gpr(2),
6226
disp: UImm12::zero(),
6227
flags: MemFlags::trusted(),
6228
},
6229
},
6230
"41123000",
6231
"la %r1, 0(%r2,%r3)",
6232
));
6233
insns.push((
6234
Inst::LoadAddr {
6235
rd: writable_gpr(1),
6236
mem: MemArg::BXD12 {
6237
base: gpr(3),
6238
index: gpr(2),
6239
disp: UImm12::maybe_from_u64(4095).unwrap(),
6240
flags: MemFlags::trusted(),
6241
},
6242
},
6243
"41123FFF",
6244
"la %r1, 4095(%r2,%r3)",
6245
));
6246
insns.push((
6247
Inst::LoadAddr {
6248
rd: writable_gpr(1),
6249
mem: MemArg::BXD20 {
6250
base: gpr(3),
6251
index: gpr(2),
6252
disp: SImm20::maybe_from_i64(-524288).unwrap(),
6253
flags: MemFlags::trusted(),
6254
},
6255
},
6256
"E31230008071",
6257
"lay %r1, -524288(%r2,%r3)",
6258
));
6259
insns.push((
6260
Inst::LoadAddr {
6261
rd: writable_gpr(1),
6262
mem: MemArg::BXD20 {
6263
base: gpr(3),
6264
index: gpr(2),
6265
disp: SImm20::maybe_from_i64(524287).unwrap(),
6266
flags: MemFlags::trusted(),
6267
},
6268
},
6269
"E3123FFF7F71",
6270
"lay %r1, 524287(%r2,%r3)",
6271
));
6272
insns.push((
6273
Inst::LoadAddr {
6274
rd: writable_gpr(1),
6275
mem: MemArg::Label {
6276
target: MachLabel::from_block(BlockIndex::new(1)),
6277
},
6278
},
6279
"C01000000003",
6280
"larl %r1, label1",
6281
));
6282
insns.push((
6283
Inst::LoadAddr {
6284
rd: writable_gpr(1),
6285
mem: MemArg::Symbol {
6286
name: Box::new(ExternalName::testcase("test0")),
6287
offset: 64,
6288
flags: MemFlags::trusted(),
6289
},
6290
},
6291
"C01000000000",
6292
"larl %r1, %test0 + 64",
6293
));
6294
6295
insns.push((
6296
Inst::LoadAddr {
6297
rd: writable_gpr(1),
6298
mem: MemArg::RegOffset {
6299
reg: gpr(2),
6300
off: 0,
6301
flags: MemFlags::trusted(),
6302
},
6303
},
6304
"41102000",
6305
"la %r1, 0(%r2)",
6306
));
6307
insns.push((
6308
Inst::LoadAddr {
6309
rd: writable_gpr(1),
6310
mem: MemArg::RegOffset {
6311
reg: gpr(2),
6312
off: 4095,
6313
flags: MemFlags::trusted(),
6314
},
6315
},
6316
"41102FFF",
6317
"la %r1, 4095(%r2)",
6318
));
6319
insns.push((
6320
Inst::LoadAddr {
6321
rd: writable_gpr(1),
6322
mem: MemArg::RegOffset {
6323
reg: gpr(2),
6324
off: -524288,
6325
flags: MemFlags::trusted(),
6326
},
6327
},
6328
"E31020008071",
6329
"lay %r1, -524288(%r2)",
6330
));
6331
insns.push((
6332
Inst::LoadAddr {
6333
rd: writable_gpr(1),
6334
mem: MemArg::RegOffset {
6335
reg: gpr(2),
6336
off: 524287,
6337
flags: MemFlags::trusted(),
6338
},
6339
},
6340
"E3102FFF7F71",
6341
"lay %r1, 524287(%r2)",
6342
));
6343
insns.push((
6344
Inst::LoadAddr {
6345
rd: writable_gpr(1),
6346
mem: MemArg::RegOffset {
6347
reg: gpr(2),
6348
off: -2147483648,
6349
flags: MemFlags::trusted(),
6350
},
6351
},
6352
"C0118000000041112000",
6353
"lgfi %r1, -2147483648 ; la %r1, 0(%r1,%r2)",
6354
));
6355
insns.push((
6356
Inst::LoadAddr {
6357
rd: writable_gpr(1),
6358
mem: MemArg::RegOffset {
6359
reg: gpr(2),
6360
off: 2147483647,
6361
flags: MemFlags::trusted(),
6362
},
6363
},
6364
"C0117FFFFFFF41112000",
6365
"lgfi %r1, 2147483647 ; la %r1, 0(%r1,%r2)",
6366
));
6367
6368
insns.push((
6369
Inst::Mov64 {
6370
rd: writable_gpr(8),
6371
rm: gpr(9),
6372
},
6373
"B9040089",
6374
"lgr %r8, %r9",
6375
));
6376
insns.push((
6377
Inst::Mov32 {
6378
rd: writable_gpr(8),
6379
rm: gpr(9),
6380
},
6381
"1889",
6382
"lr %r8, %r9",
6383
));
6384
6385
insns.push((
6386
Inst::Mov32SImm16 {
6387
rd: writable_gpr(8),
6388
imm: -32768,
6389
},
6390
"A7888000",
6391
"lhi %r8, -32768",
6392
));
6393
insns.push((
6394
Inst::Mov32SImm16 {
6395
rd: writable_gpr(8),
6396
imm: 32767,
6397
},
6398
"A7887FFF",
6399
"lhi %r8, 32767",
6400
));
6401
insns.push((
6402
Inst::Mov32Imm {
6403
rd: writable_gpr(8),
6404
imm: 2147483648,
6405
},
6406
"C08980000000",
6407
"iilf %r8, 2147483648",
6408
));
6409
insns.push((
6410
Inst::Mov32Imm {
6411
rd: writable_gpr(8),
6412
imm: 2147483647,
6413
},
6414
"C0897FFFFFFF",
6415
"iilf %r8, 2147483647",
6416
));
6417
insns.push((
6418
Inst::Mov64SImm16 {
6419
rd: writable_gpr(8),
6420
imm: -32768,
6421
},
6422
"A7898000",
6423
"lghi %r8, -32768",
6424
));
6425
insns.push((
6426
Inst::Mov64SImm16 {
6427
rd: writable_gpr(8),
6428
imm: 32767,
6429
},
6430
"A7897FFF",
6431
"lghi %r8, 32767",
6432
));
6433
insns.push((
6434
Inst::Mov64SImm32 {
6435
rd: writable_gpr(8),
6436
imm: -2147483648,
6437
},
6438
"C08180000000",
6439
"lgfi %r8, -2147483648",
6440
));
6441
insns.push((
6442
Inst::Mov64SImm32 {
6443
rd: writable_gpr(8),
6444
imm: 2147483647,
6445
},
6446
"C0817FFFFFFF",
6447
"lgfi %r8, 2147483647",
6448
));
6449
insns.push((
6450
Inst::Mov64UImm16Shifted {
6451
rd: writable_gpr(8),
6452
imm: UImm16Shifted::maybe_from_u64(0x0000_0000_0000_ffff).unwrap(),
6453
},
6454
"A58FFFFF",
6455
"llill %r8, 65535",
6456
));
6457
insns.push((
6458
Inst::Mov64UImm16Shifted {
6459
rd: writable_gpr(8),
6460
imm: UImm16Shifted::maybe_from_u64(0x0000_0000_ffff_0000).unwrap(),
6461
},
6462
"A58EFFFF",
6463
"llilh %r8, 65535",
6464
));
6465
insns.push((
6466
Inst::Mov64UImm16Shifted {
6467
rd: writable_gpr(8),
6468
imm: UImm16Shifted::maybe_from_u64(0x0000_ffff_0000_0000).unwrap(),
6469
},
6470
"A58DFFFF",
6471
"llihl %r8, 65535",
6472
));
6473
insns.push((
6474
Inst::Mov64UImm16Shifted {
6475
rd: writable_gpr(8),
6476
imm: UImm16Shifted::maybe_from_u64(0xffff_0000_0000_0000).unwrap(),
6477
},
6478
"A58CFFFF",
6479
"llihh %r8, 65535",
6480
));
6481
insns.push((
6482
Inst::Mov64UImm32Shifted {
6483
rd: writable_gpr(8),
6484
imm: UImm32Shifted::maybe_from_u64(0x0000_0000_ffff_ffff).unwrap(),
6485
},
6486
"C08FFFFFFFFF",
6487
"llilf %r8, 4294967295",
6488
));
6489
insns.push((
6490
Inst::Mov64UImm32Shifted {
6491
rd: writable_gpr(8),
6492
imm: UImm32Shifted::maybe_from_u64(0xffff_ffff_0000_0000).unwrap(),
6493
},
6494
"C08EFFFFFFFF",
6495
"llihf %r8, 4294967295",
6496
));
6497
6498
insns.push((
6499
Inst::Insert64UImm16Shifted {
6500
rd: writable_gpr(8),
6501
ri: gpr(8),
6502
imm: UImm16Shifted::maybe_from_u64(0x0000_0000_0000_ffff).unwrap(),
6503
},
6504
"A583FFFF",
6505
"iill %r8, 65535",
6506
));
6507
insns.push((
6508
Inst::Insert64UImm16Shifted {
6509
rd: writable_gpr(8),
6510
ri: gpr(8),
6511
imm: UImm16Shifted::maybe_from_u64(0x0000_0000_ffff_0000).unwrap(),
6512
},
6513
"A582FFFF",
6514
"iilh %r8, 65535",
6515
));
6516
insns.push((
6517
Inst::Insert64UImm16Shifted {
6518
rd: writable_gpr(8),
6519
ri: gpr(8),
6520
imm: UImm16Shifted::maybe_from_u64(0x0000_ffff_0000_0000).unwrap(),
6521
},
6522
"A581FFFF",
6523
"iihl %r8, 65535",
6524
));
6525
insns.push((
6526
Inst::Insert64UImm16Shifted {
6527
rd: writable_gpr(8),
6528
ri: gpr(8),
6529
imm: UImm16Shifted::maybe_from_u64(0xffff_0000_0000_0000).unwrap(),
6530
},
6531
"A580FFFF",
6532
"iihh %r8, 65535",
6533
));
6534
insns.push((
6535
Inst::Insert64UImm32Shifted {
6536
rd: writable_gpr(8),
6537
ri: gpr(8),
6538
imm: UImm32Shifted::maybe_from_u64(0x0000_0000_ffff_ffff).unwrap(),
6539
},
6540
"C089FFFFFFFF",
6541
"iilf %r8, 4294967295",
6542
));
6543
insns.push((
6544
Inst::Insert64UImm32Shifted {
6545
rd: writable_gpr(8),
6546
ri: gpr(8),
6547
imm: UImm32Shifted::maybe_from_u64(0xffff_ffff_0000_0000).unwrap(),
6548
},
6549
"C088FFFFFFFF",
6550
"iihf %r8, 4294967295",
6551
));
6552
6553
insns.push((
6554
Inst::CMov32 {
6555
rd: writable_gpr(8),
6556
cond: Cond::from_mask(1),
6557
ri: gpr(8),
6558
rm: gpr(9),
6559
},
6560
"B9F21089",
6561
"locro %r8, %r9",
6562
));
6563
insns.push((
6564
Inst::CMov64 {
6565
rd: writable_gpr(8),
6566
cond: Cond::from_mask(1),
6567
ri: gpr(8),
6568
rm: gpr(9),
6569
},
6570
"B9E21089",
6571
"locgro %r8, %r9",
6572
));
6573
6574
insns.push((
6575
Inst::CMov32SImm16 {
6576
rd: writable_gpr(8),
6577
cond: Cond::from_mask(1),
6578
imm: -32768,
6579
ri: gpr(8),
6580
},
6581
"EC8180000042",
6582
"lochio %r8, -32768",
6583
));
6584
insns.push((
6585
Inst::CMov32SImm16 {
6586
rd: writable_gpr(8),
6587
cond: Cond::from_mask(1),
6588
imm: 32767,
6589
ri: gpr(8),
6590
},
6591
"EC817FFF0042",
6592
"lochio %r8, 32767",
6593
));
6594
insns.push((
6595
Inst::CMov64SImm16 {
6596
rd: writable_gpr(8),
6597
cond: Cond::from_mask(1),
6598
imm: -32768,
6599
ri: gpr(8),
6600
},
6601
"EC8180000046",
6602
"locghio %r8, -32768",
6603
));
6604
insns.push((
6605
Inst::CMov64SImm16 {
6606
rd: writable_gpr(8),
6607
cond: Cond::from_mask(1),
6608
imm: 32767,
6609
ri: gpr(8),
6610
},
6611
"EC817FFF0046",
6612
"locghio %r8, 32767",
6613
));
6614
6615
insns.push((
6616
Inst::Extend {
6617
rd: writable_gpr(1),
6618
rn: gpr(2),
6619
signed: false,
6620
from_bits: 8,
6621
to_bits: 32,
6622
},
6623
"B9940012",
6624
"llcr %r1, %r2",
6625
));
6626
insns.push((
6627
Inst::Extend {
6628
rd: writable_gpr(1),
6629
rn: gpr(2),
6630
signed: true,
6631
from_bits: 8,
6632
to_bits: 32,
6633
},
6634
"B9260012",
6635
"lbr %r1, %r2",
6636
));
6637
insns.push((
6638
Inst::Extend {
6639
rd: writable_gpr(1),
6640
rn: gpr(2),
6641
signed: false,
6642
from_bits: 16,
6643
to_bits: 32,
6644
},
6645
"B9950012",
6646
"llhr %r1, %r2",
6647
));
6648
insns.push((
6649
Inst::Extend {
6650
rd: writable_gpr(1),
6651
rn: gpr(2),
6652
signed: true,
6653
from_bits: 16,
6654
to_bits: 32,
6655
},
6656
"B9270012",
6657
"lhr %r1, %r2",
6658
));
6659
insns.push((
6660
Inst::Extend {
6661
rd: writable_gpr(1),
6662
rn: gpr(2),
6663
signed: false,
6664
from_bits: 8,
6665
to_bits: 64,
6666
},
6667
"B9840012",
6668
"llgcr %r1, %r2",
6669
));
6670
insns.push((
6671
Inst::Extend {
6672
rd: writable_gpr(1),
6673
rn: gpr(2),
6674
signed: true,
6675
from_bits: 8,
6676
to_bits: 64,
6677
},
6678
"B9060012",
6679
"lgbr %r1, %r2",
6680
));
6681
insns.push((
6682
Inst::Extend {
6683
rd: writable_gpr(1),
6684
rn: gpr(2),
6685
signed: false,
6686
from_bits: 16,
6687
to_bits: 64,
6688
},
6689
"B9850012",
6690
"llghr %r1, %r2",
6691
));
6692
insns.push((
6693
Inst::Extend {
6694
rd: writable_gpr(1),
6695
rn: gpr(2),
6696
signed: true,
6697
from_bits: 16,
6698
to_bits: 64,
6699
},
6700
"B9070012",
6701
"lghr %r1, %r2",
6702
));
6703
insns.push((
6704
Inst::Extend {
6705
rd: writable_gpr(1),
6706
rn: gpr(2),
6707
signed: false,
6708
from_bits: 32,
6709
to_bits: 64,
6710
},
6711
"B9160012",
6712
"llgfr %r1, %r2",
6713
));
6714
insns.push((
6715
Inst::Extend {
6716
rd: writable_gpr(1),
6717
rn: gpr(2),
6718
signed: true,
6719
from_bits: 32,
6720
to_bits: 64,
6721
},
6722
"B9140012",
6723
"lgfr %r1, %r2",
6724
));
6725
6726
insns.push((
6727
Inst::Jump {
6728
dest: MachLabel::from_block(BlockIndex::new(0)),
6729
},
6730
"C0F400000000",
6731
"jg label0",
6732
));
6733
6734
insns.push((
6735
Inst::CondBr {
6736
taken: MachLabel::from_block(BlockIndex::new(0)),
6737
not_taken: MachLabel::from_block(BlockIndex::new(0)),
6738
cond: Cond::from_mask(1),
6739
},
6740
"C01400000000C0F4FFFFFFFD",
6741
"jgo label0 ; jg label0",
6742
));
6743
insns.push((
6744
Inst::CondBr {
6745
taken: MachLabel::from_block(BlockIndex::new(0)),
6746
not_taken: MachLabel::from_block(BlockIndex::new(0)),
6747
cond: Cond::from_mask(2),
6748
},
6749
"C02400000000C0F4FFFFFFFD",
6750
"jgh label0 ; jg label0",
6751
));
6752
insns.push((
6753
Inst::CondBr {
6754
taken: MachLabel::from_block(BlockIndex::new(0)),
6755
not_taken: MachLabel::from_block(BlockIndex::new(0)),
6756
cond: Cond::from_mask(3),
6757
},
6758
"C03400000000C0F4FFFFFFFD",
6759
"jgnle label0 ; jg label0",
6760
));
6761
insns.push((
6762
Inst::CondBr {
6763
taken: MachLabel::from_block(BlockIndex::new(0)),
6764
not_taken: MachLabel::from_block(BlockIndex::new(0)),
6765
cond: Cond::from_mask(4),
6766
},
6767
"C04400000000C0F4FFFFFFFD",
6768
"jgl label0 ; jg label0",
6769
));
6770
insns.push((
6771
Inst::CondBr {
6772
taken: MachLabel::from_block(BlockIndex::new(0)),
6773
not_taken: MachLabel::from_block(BlockIndex::new(0)),
6774
cond: Cond::from_mask(5),
6775
},
6776
"C05400000000C0F4FFFFFFFD",
6777
"jgnhe label0 ; jg label0",
6778
));
6779
insns.push((
6780
Inst::CondBr {
6781
taken: MachLabel::from_block(BlockIndex::new(0)),
6782
not_taken: MachLabel::from_block(BlockIndex::new(0)),
6783
cond: Cond::from_mask(6),
6784
},
6785
"C06400000000C0F4FFFFFFFD",
6786
"jglh label0 ; jg label0",
6787
));
6788
insns.push((
6789
Inst::CondBr {
6790
taken: MachLabel::from_block(BlockIndex::new(0)),
6791
not_taken: MachLabel::from_block(BlockIndex::new(0)),
6792
cond: Cond::from_mask(7),
6793
},
6794
"C07400000000C0F4FFFFFFFD",
6795
"jgne label0 ; jg label0",
6796
));
6797
insns.push((
6798
Inst::CondBr {
6799
taken: MachLabel::from_block(BlockIndex::new(0)),
6800
not_taken: MachLabel::from_block(BlockIndex::new(0)),
6801
cond: Cond::from_mask(8),
6802
},
6803
"C08400000000C0F4FFFFFFFD",
6804
"jge label0 ; jg label0",
6805
));
6806
insns.push((
6807
Inst::CondBr {
6808
taken: MachLabel::from_block(BlockIndex::new(0)),
6809
not_taken: MachLabel::from_block(BlockIndex::new(0)),
6810
cond: Cond::from_mask(9),
6811
},
6812
"C09400000000C0F4FFFFFFFD",
6813
"jgnlh label0 ; jg label0",
6814
));
6815
insns.push((
6816
Inst::CondBr {
6817
taken: MachLabel::from_block(BlockIndex::new(0)),
6818
not_taken: MachLabel::from_block(BlockIndex::new(0)),
6819
cond: Cond::from_mask(10),
6820
},
6821
"C0A400000000C0F4FFFFFFFD",
6822
"jghe label0 ; jg label0",
6823
));
6824
insns.push((
6825
Inst::CondBr {
6826
taken: MachLabel::from_block(BlockIndex::new(0)),
6827
not_taken: MachLabel::from_block(BlockIndex::new(0)),
6828
cond: Cond::from_mask(11),
6829
},
6830
"C0B400000000C0F4FFFFFFFD",
6831
"jgnl label0 ; jg label0",
6832
));
6833
insns.push((
6834
Inst::CondBr {
6835
taken: MachLabel::from_block(BlockIndex::new(0)),
6836
not_taken: MachLabel::from_block(BlockIndex::new(0)),
6837
cond: Cond::from_mask(12),
6838
},
6839
"C0C400000000C0F4FFFFFFFD",
6840
"jgle label0 ; jg label0",
6841
));
6842
insns.push((
6843
Inst::CondBr {
6844
taken: MachLabel::from_block(BlockIndex::new(0)),
6845
not_taken: MachLabel::from_block(BlockIndex::new(0)),
6846
cond: Cond::from_mask(13),
6847
},
6848
"C0D400000000C0F4FFFFFFFD",
6849
"jgnh label0 ; jg label0",
6850
));
6851
insns.push((
6852
Inst::CondBr {
6853
taken: MachLabel::from_block(BlockIndex::new(0)),
6854
not_taken: MachLabel::from_block(BlockIndex::new(0)),
6855
cond: Cond::from_mask(14),
6856
},
6857
"C0E400000000C0F4FFFFFFFD",
6858
"jgno label0 ; jg label0",
6859
));
6860
6861
insns.push((
6862
Inst::IndirectBr {
6863
rn: gpr(3),
6864
targets: vec![],
6865
},
6866
"07F3",
6867
"br %r3",
6868
));
6869
6870
insns.push((
6871
Inst::Call {
6872
link: writable_gpr(14),
6873
info: Box::new(CallInfo::empty(
6874
CallInstDest::Direct {
6875
name: ExternalName::testcase("test0"),
6876
},
6877
CallConv::SystemV,
6878
)),
6879
},
6880
"C0E500000000",
6881
"brasl %r14, %test0",
6882
));
6883
6884
insns.push((
6885
Inst::Call {
6886
link: writable_gpr(14),
6887
info: Box::new(CallInfo::empty(
6888
CallInstDest::Indirect { reg: gpr(1) },
6889
CallConv::SystemV,
6890
)),
6891
},
6892
"0DE1",
6893
"basr %r14, %r1",
6894
));
6895
6896
insns.push((Inst::Ret { link: gpr(14) }, "07FE", "br %r14"));
6897
6898
insns.push((Inst::Debugtrap, "0001", ".word 0x0001 # debugtrap"));
6899
6900
insns.push((
6901
Inst::Trap {
6902
trap_code: TrapCode::STACK_OVERFLOW,
6903
},
6904
"0000",
6905
".word 0x0000 # trap=stk_ovf",
6906
));
6907
insns.push((
6908
Inst::TrapIf {
6909
cond: Cond::from_mask(1),
6910
trap_code: TrapCode::STACK_OVERFLOW,
6911
},
6912
"C01400000001",
6913
"jgo .+2 # trap=stk_ovf",
6914
));
6915
6916
insns.push((
6917
Inst::Loop {
6918
body: vec![
6919
Inst::CmpRR {
6920
op: CmpOp::CmpS32,
6921
rn: gpr(2),
6922
rm: gpr(3),
6923
},
6924
Inst::CondBreak {
6925
cond: Cond::from_mask(13),
6926
},
6927
Inst::AtomicCas32 {
6928
rd: writable_gpr(4),
6929
ri: gpr(4),
6930
rn: gpr(5),
6931
mem: MemArg::BXD12 {
6932
base: gpr(6),
6933
index: zero_reg(),
6934
disp: UImm12::maybe_from_u64(0).unwrap(),
6935
flags: MemFlags::trusted(),
6936
},
6937
},
6938
],
6939
cond: Cond::from_mask(6),
6940
},
6941
"1923C0D400000008BA456000C064FFFFFFFA",
6942
"0: cr %r2, %r3 ; jgnh 1f ; cs %r4, %r5, 0(%r6) ; jglh 0b ; 1:",
6943
));
6944
6945
insns.push((
6946
Inst::StackProbeLoop {
6947
probe_count: writable_gpr(1),
6948
guard_size: 4096,
6949
},
6950
"A7FBF0009200F000A716FFFC",
6951
"0: aghi %r15, -4096 ; mvi 0(%r15), 0 ; brct %r1, 0b",
6952
));
6953
6954
insns.push((
6955
Inst::FpuMove32 {
6956
rd: writable_vr(8),
6957
rn: vr(4),
6958
},
6959
"3884",
6960
"ler %f8, %f4",
6961
));
6962
insns.push((
6963
Inst::FpuMove32 {
6964
rd: writable_vr(8),
6965
rn: vr(20),
6966
},
6967
"E78400000456",
6968
"vlr %v8, %v20",
6969
));
6970
insns.push((
6971
Inst::FpuMove64 {
6972
rd: writable_vr(8),
6973
rn: vr(4),
6974
},
6975
"2884",
6976
"ldr %f8, %f4",
6977
));
6978
insns.push((
6979
Inst::FpuMove64 {
6980
rd: writable_vr(8),
6981
rn: vr(20),
6982
},
6983
"E78400000456",
6984
"vlr %v8, %v20",
6985
));
6986
insns.push((
6987
Inst::FpuCMov32 {
6988
rd: writable_vr(8),
6989
ri: vr(8),
6990
rm: vr(4),
6991
cond: Cond::from_mask(1),
6992
},
6993
"A7E400033884",
6994
"jno 6 ; ler %f8, %f4",
6995
));
6996
insns.push((
6997
Inst::FpuCMov32 {
6998
rd: writable_vr(8),
6999
ri: vr(8),
7000
rm: vr(20),
7001
cond: Cond::from_mask(1),
7002
},
7003
"A7E40005E78400000456",
7004
"jno 10 ; vlr %v8, %v20",
7005
));
7006
insns.push((
7007
Inst::FpuCMov64 {
7008
rd: writable_vr(8),
7009
ri: vr(8),
7010
rm: vr(4),
7011
cond: Cond::from_mask(1),
7012
},
7013
"A7E400032884",
7014
"jno 6 ; ldr %f8, %f4",
7015
));
7016
insns.push((
7017
Inst::FpuCMov64 {
7018
rd: writable_vr(8),
7019
ri: vr(8),
7020
rm: vr(20),
7021
cond: Cond::from_mask(1),
7022
},
7023
"A7E40005E78400000456",
7024
"jno 10 ; vlr %v8, %v20",
7025
));
7026
7027
insns.push((
7028
Inst::FpuRR {
7029
fpu_op: FPUOp1::Abs32,
7030
rd: writable_vr(8),
7031
rn: vr(12),
7032
},
7033
"B300008C",
7034
"lpebr %f8, %f12",
7035
));
7036
insns.push((
7037
Inst::FpuRR {
7038
fpu_op: FPUOp1::Abs32,
7039
rd: writable_vr(24),
7040
rn: vr(12),
7041
},
7042
"E78C002828CC",
7043
"wflpsb %v24, %f12",
7044
));
7045
insns.push((
7046
Inst::FpuRR {
7047
fpu_op: FPUOp1::Abs32x4,
7048
rd: writable_vr(24),
7049
rn: vr(12),
7050
},
7051
"E78C002028CC",
7052
"vflpsb %v24, %v12",
7053
));
7054
insns.push((
7055
Inst::FpuRR {
7056
fpu_op: FPUOp1::Abs64,
7057
rd: writable_vr(8),
7058
rn: vr(12),
7059
},
7060
"B310008C",
7061
"lpdbr %f8, %f12",
7062
));
7063
insns.push((
7064
Inst::FpuRR {
7065
fpu_op: FPUOp1::Abs64,
7066
rd: writable_vr(24),
7067
rn: vr(12),
7068
},
7069
"E78C002838CC",
7070
"wflpdb %v24, %f12",
7071
));
7072
insns.push((
7073
Inst::FpuRR {
7074
fpu_op: FPUOp1::Abs64x2,
7075
rd: writable_vr(24),
7076
rn: vr(12),
7077
},
7078
"E78C002038CC",
7079
"vflpdb %v24, %v12",
7080
));
7081
insns.push((
7082
Inst::FpuRR {
7083
fpu_op: FPUOp1::Abs128,
7084
rd: writable_vr(24),
7085
rn: vr(12),
7086
},
7087
"E78C002848CC",
7088
"wflpxb %v24, %f12",
7089
));
7090
insns.push((
7091
Inst::FpuRR {
7092
fpu_op: FPUOp1::Neg32,
7093
rd: writable_vr(8),
7094
rn: vr(12),
7095
},
7096
"B303008C",
7097
"lcebr %f8, %f12",
7098
));
7099
insns.push((
7100
Inst::FpuRR {
7101
fpu_op: FPUOp1::Neg32,
7102
rd: writable_vr(24),
7103
rn: vr(12),
7104
},
7105
"E78C000828CC",
7106
"wflcsb %v24, %f12",
7107
));
7108
insns.push((
7109
Inst::FpuRR {
7110
fpu_op: FPUOp1::Neg32x4,
7111
rd: writable_vr(24),
7112
rn: vr(12),
7113
},
7114
"E78C000028CC",
7115
"vflcsb %v24, %v12",
7116
));
7117
insns.push((
7118
Inst::FpuRR {
7119
fpu_op: FPUOp1::Neg64,
7120
rd: writable_vr(8),
7121
rn: vr(12),
7122
},
7123
"B313008C",
7124
"lcdbr %f8, %f12",
7125
));
7126
insns.push((
7127
Inst::FpuRR {
7128
fpu_op: FPUOp1::Neg64,
7129
rd: writable_vr(24),
7130
rn: vr(12),
7131
},
7132
"E78C000838CC",
7133
"wflcdb %v24, %f12",
7134
));
7135
insns.push((
7136
Inst::FpuRR {
7137
fpu_op: FPUOp1::Neg64x2,
7138
rd: writable_vr(24),
7139
rn: vr(12),
7140
},
7141
"E78C000038CC",
7142
"vflcdb %v24, %v12",
7143
));
7144
insns.push((
7145
Inst::FpuRR {
7146
fpu_op: FPUOp1::Neg128,
7147
rd: writable_vr(24),
7148
rn: vr(12),
7149
},
7150
"E78C000848CC",
7151
"wflcxb %v24, %f12",
7152
));
7153
insns.push((
7154
Inst::FpuRR {
7155
fpu_op: FPUOp1::NegAbs32,
7156
rd: writable_vr(8),
7157
rn: vr(12),
7158
},
7159
"B301008C",
7160
"lnebr %f8, %f12",
7161
));
7162
insns.push((
7163
Inst::FpuRR {
7164
fpu_op: FPUOp1::NegAbs32,
7165
rd: writable_vr(24),
7166
rn: vr(12),
7167
},
7168
"E78C001828CC",
7169
"wflnsb %v24, %f12",
7170
));
7171
insns.push((
7172
Inst::FpuRR {
7173
fpu_op: FPUOp1::NegAbs32x4,
7174
rd: writable_vr(24),
7175
rn: vr(12),
7176
},
7177
"E78C001028CC",
7178
"vflnsb %v24, %v12",
7179
));
7180
insns.push((
7181
Inst::FpuRR {
7182
fpu_op: FPUOp1::NegAbs64,
7183
rd: writable_vr(8),
7184
rn: vr(12),
7185
},
7186
"B311008C",
7187
"lndbr %f8, %f12",
7188
));
7189
insns.push((
7190
Inst::FpuRR {
7191
fpu_op: FPUOp1::NegAbs64,
7192
rd: writable_vr(24),
7193
rn: vr(12),
7194
},
7195
"E78C001838CC",
7196
"wflndb %v24, %f12",
7197
));
7198
insns.push((
7199
Inst::FpuRR {
7200
fpu_op: FPUOp1::NegAbs64x2,
7201
rd: writable_vr(24),
7202
rn: vr(12),
7203
},
7204
"E78C001038CC",
7205
"vflndb %v24, %v12",
7206
));
7207
insns.push((
7208
Inst::FpuRR {
7209
fpu_op: FPUOp1::NegAbs128,
7210
rd: writable_vr(24),
7211
rn: vr(12),
7212
},
7213
"E78C001848CC",
7214
"wflnxb %v24, %f12",
7215
));
7216
insns.push((
7217
Inst::FpuRR {
7218
fpu_op: FPUOp1::Sqrt32,
7219
rd: writable_vr(8),
7220
rn: vr(12),
7221
},
7222
"B314008C",
7223
"sqebr %f8, %f12",
7224
));
7225
insns.push((
7226
Inst::FpuRR {
7227
fpu_op: FPUOp1::Sqrt32,
7228
rd: writable_vr(24),
7229
rn: vr(12),
7230
},
7231
"E78C000828CE",
7232
"wfsqsb %v24, %f12",
7233
));
7234
insns.push((
7235
Inst::FpuRR {
7236
fpu_op: FPUOp1::Sqrt32x4,
7237
rd: writable_vr(24),
7238
rn: vr(12),
7239
},
7240
"E78C000028CE",
7241
"vfsqsb %v24, %v12",
7242
));
7243
insns.push((
7244
Inst::FpuRR {
7245
fpu_op: FPUOp1::Sqrt64,
7246
rd: writable_vr(8),
7247
rn: vr(12),
7248
},
7249
"B315008C",
7250
"sqdbr %f8, %f12",
7251
));
7252
insns.push((
7253
Inst::FpuRR {
7254
fpu_op: FPUOp1::Sqrt64,
7255
rd: writable_vr(24),
7256
rn: vr(12),
7257
},
7258
"E78C000838CE",
7259
"wfsqdb %v24, %f12",
7260
));
7261
insns.push((
7262
Inst::FpuRR {
7263
fpu_op: FPUOp1::Sqrt64x2,
7264
rd: writable_vr(24),
7265
rn: vr(12),
7266
},
7267
"E78C000038CE",
7268
"vfsqdb %v24, %v12",
7269
));
7270
insns.push((
7271
Inst::FpuRR {
7272
fpu_op: FPUOp1::Sqrt128,
7273
rd: writable_vr(24),
7274
rn: vr(12),
7275
},
7276
"E78C000848CE",
7277
"wfsqxb %v24, %f12",
7278
));
7279
insns.push((
7280
Inst::FpuRR {
7281
fpu_op: FPUOp1::Cvt32To64,
7282
rd: writable_vr(8),
7283
rn: vr(12),
7284
},
7285
"B304008C",
7286
"ldebr %f8, %f12",
7287
));
7288
insns.push((
7289
Inst::FpuRR {
7290
fpu_op: FPUOp1::Cvt32To64,
7291
rd: writable_vr(24),
7292
rn: vr(12),
7293
},
7294
"E78C000828C4",
7295
"wldeb %v24, %f12",
7296
));
7297
insns.push((
7298
Inst::FpuRR {
7299
fpu_op: FPUOp1::Cvt32x4To64x2,
7300
rd: writable_vr(24),
7301
rn: vr(12),
7302
},
7303
"E78C000028C4",
7304
"vldeb %v24, %v12",
7305
));
7306
insns.push((
7307
Inst::FpuRR {
7308
fpu_op: FPUOp1::Cvt64To128,
7309
rd: writable_vr(24),
7310
rn: vr(12),
7311
},
7312
"E78C000838C4",
7313
"wflld %v24, %f12",
7314
));
7315
7316
insns.push((
7317
Inst::FpuRRR {
7318
fpu_op: FPUOp2::Add32,
7319
rd: writable_vr(8),
7320
rn: vr(8),
7321
rm: vr(12),
7322
},
7323
"B30A008C",
7324
"aebr %f8, %f12",
7325
));
7326
insns.push((
7327
Inst::FpuRRR {
7328
fpu_op: FPUOp2::Add32,
7329
rd: writable_vr(20),
7330
rn: vr(8),
7331
rm: vr(12),
7332
},
7333
"E748C00828E3",
7334
"wfasb %v20, %f8, %f12",
7335
));
7336
insns.push((
7337
Inst::FpuRRR {
7338
fpu_op: FPUOp2::Add32x4,
7339
rd: writable_vr(20),
7340
rn: vr(8),
7341
rm: vr(12),
7342
},
7343
"E748C00028E3",
7344
"vfasb %v20, %v8, %v12",
7345
));
7346
insns.push((
7347
Inst::FpuRRR {
7348
fpu_op: FPUOp2::Add64,
7349
rd: writable_vr(8),
7350
rn: vr(8),
7351
rm: vr(12),
7352
},
7353
"B31A008C",
7354
"adbr %f8, %f12",
7355
));
7356
insns.push((
7357
Inst::FpuRRR {
7358
fpu_op: FPUOp2::Add64,
7359
rd: writable_vr(20),
7360
rn: vr(8),
7361
rm: vr(12),
7362
},
7363
"E748C00838E3",
7364
"wfadb %v20, %f8, %f12",
7365
));
7366
insns.push((
7367
Inst::FpuRRR {
7368
fpu_op: FPUOp2::Add64x2,
7369
rd: writable_vr(20),
7370
rn: vr(8),
7371
rm: vr(12),
7372
},
7373
"E748C00038E3",
7374
"vfadb %v20, %v8, %v12",
7375
));
7376
insns.push((
7377
Inst::FpuRRR {
7378
fpu_op: FPUOp2::Add128,
7379
rd: writable_vr(20),
7380
rn: vr(8),
7381
rm: vr(12),
7382
},
7383
"E748C00848E3",
7384
"wfaxb %v20, %f8, %f12",
7385
));
7386
insns.push((
7387
Inst::FpuRRR {
7388
fpu_op: FPUOp2::Sub32,
7389
rd: writable_vr(8),
7390
rn: vr(8),
7391
rm: vr(12),
7392
},
7393
"B30B008C",
7394
"sebr %f8, %f12",
7395
));
7396
insns.push((
7397
Inst::FpuRRR {
7398
fpu_op: FPUOp2::Sub32,
7399
rd: writable_vr(20),
7400
rn: vr(8),
7401
rm: vr(12),
7402
},
7403
"E748C00828E2",
7404
"wfssb %v20, %f8, %f12",
7405
));
7406
insns.push((
7407
Inst::FpuRRR {
7408
fpu_op: FPUOp2::Sub32x4,
7409
rd: writable_vr(20),
7410
rn: vr(8),
7411
rm: vr(12),
7412
},
7413
"E748C00028E2",
7414
"vfssb %v20, %v8, %v12",
7415
));
7416
insns.push((
7417
Inst::FpuRRR {
7418
fpu_op: FPUOp2::Sub64,
7419
rd: writable_vr(8),
7420
rn: vr(8),
7421
rm: vr(12),
7422
},
7423
"B31B008C",
7424
"sdbr %f8, %f12",
7425
));
7426
insns.push((
7427
Inst::FpuRRR {
7428
fpu_op: FPUOp2::Sub64,
7429
rd: writable_vr(20),
7430
rn: vr(8),
7431
rm: vr(12),
7432
},
7433
"E748C00838E2",
7434
"wfsdb %v20, %f8, %f12",
7435
));
7436
insns.push((
7437
Inst::FpuRRR {
7438
fpu_op: FPUOp2::Sub64x2,
7439
rd: writable_vr(20),
7440
rn: vr(8),
7441
rm: vr(12),
7442
},
7443
"E748C00038E2",
7444
"vfsdb %v20, %v8, %v12",
7445
));
7446
insns.push((
7447
Inst::FpuRRR {
7448
fpu_op: FPUOp2::Sub128,
7449
rd: writable_vr(20),
7450
rn: vr(8),
7451
rm: vr(12),
7452
},
7453
"E748C00848E2",
7454
"wfsxb %v20, %f8, %f12",
7455
));
7456
insns.push((
7457
Inst::FpuRRR {
7458
fpu_op: FPUOp2::Mul32,
7459
rd: writable_vr(8),
7460
rn: vr(8),
7461
rm: vr(12),
7462
},
7463
"B317008C",
7464
"meebr %f8, %f12",
7465
));
7466
insns.push((
7467
Inst::FpuRRR {
7468
fpu_op: FPUOp2::Mul32,
7469
rd: writable_vr(20),
7470
rn: vr(8),
7471
rm: vr(12),
7472
},
7473
"E748C00828E7",
7474
"wfmsb %v20, %f8, %f12",
7475
));
7476
insns.push((
7477
Inst::FpuRRR {
7478
fpu_op: FPUOp2::Mul32x4,
7479
rd: writable_vr(20),
7480
rn: vr(8),
7481
rm: vr(12),
7482
},
7483
"E748C00028E7",
7484
"vfmsb %v20, %v8, %v12",
7485
));
7486
insns.push((
7487
Inst::FpuRRR {
7488
fpu_op: FPUOp2::Mul64,
7489
rd: writable_vr(8),
7490
rn: vr(8),
7491
rm: vr(12),
7492
},
7493
"B31C008C",
7494
"mdbr %f8, %f12",
7495
));
7496
insns.push((
7497
Inst::FpuRRR {
7498
fpu_op: FPUOp2::Mul64,
7499
rd: writable_vr(20),
7500
rn: vr(8),
7501
rm: vr(12),
7502
},
7503
"E748C00838E7",
7504
"wfmdb %v20, %f8, %f12",
7505
));
7506
insns.push((
7507
Inst::FpuRRR {
7508
fpu_op: FPUOp2::Mul64x2,
7509
rd: writable_vr(20),
7510
rn: vr(8),
7511
rm: vr(12),
7512
},
7513
"E748C00038E7",
7514
"vfmdb %v20, %v8, %v12",
7515
));
7516
insns.push((
7517
Inst::FpuRRR {
7518
fpu_op: FPUOp2::Mul128,
7519
rd: writable_vr(20),
7520
rn: vr(8),
7521
rm: vr(12),
7522
},
7523
"E748C00848E7",
7524
"wfmxb %v20, %f8, %f12",
7525
));
7526
insns.push((
7527
Inst::FpuRRR {
7528
fpu_op: FPUOp2::Div32,
7529
rd: writable_vr(8),
7530
rn: vr(8),
7531
rm: vr(12),
7532
},
7533
"B30D008C",
7534
"debr %f8, %f12",
7535
));
7536
insns.push((
7537
Inst::FpuRRR {
7538
fpu_op: FPUOp2::Div32,
7539
rd: writable_vr(20),
7540
rn: vr(8),
7541
rm: vr(12),
7542
},
7543
"E748C00828E5",
7544
"wfdsb %v20, %f8, %f12",
7545
));
7546
insns.push((
7547
Inst::FpuRRR {
7548
fpu_op: FPUOp2::Div32x4,
7549
rd: writable_vr(20),
7550
rn: vr(8),
7551
rm: vr(12),
7552
},
7553
"E748C00028E5",
7554
"vfdsb %v20, %v8, %v12",
7555
));
7556
insns.push((
7557
Inst::FpuRRR {
7558
fpu_op: FPUOp2::Div64,
7559
rd: writable_vr(8),
7560
rn: vr(8),
7561
rm: vr(12),
7562
},
7563
"B31D008C",
7564
"ddbr %f8, %f12",
7565
));
7566
insns.push((
7567
Inst::FpuRRR {
7568
fpu_op: FPUOp2::Div64,
7569
rd: writable_vr(20),
7570
rn: vr(8),
7571
rm: vr(12),
7572
},
7573
"E748C00838E5",
7574
"wfddb %v20, %f8, %f12",
7575
));
7576
insns.push((
7577
Inst::FpuRRR {
7578
fpu_op: FPUOp2::Div64x2,
7579
rd: writable_vr(20),
7580
rn: vr(8),
7581
rm: vr(12),
7582
},
7583
"E748C00038E5",
7584
"vfddb %v20, %v8, %v12",
7585
));
7586
insns.push((
7587
Inst::FpuRRR {
7588
fpu_op: FPUOp2::Div128,
7589
rd: writable_vr(20),
7590
rn: vr(8),
7591
rm: vr(12),
7592
},
7593
"E748C00848E5",
7594
"wfdxb %v20, %f8, %f12",
7595
));
7596
insns.push((
7597
Inst::FpuRRR {
7598
fpu_op: FPUOp2::Max32,
7599
rd: writable_vr(4),
7600
rn: vr(6),
7601
rm: vr(8),
7602
},
7603
"E746801820EF",
7604
"wfmaxsb %f4, %f6, %f8, 1",
7605
));
7606
insns.push((
7607
Inst::FpuRRR {
7608
fpu_op: FPUOp2::Max32x4,
7609
rd: writable_vr(4),
7610
rn: vr(6),
7611
rm: vr(8),
7612
},
7613
"E746801020EF",
7614
"vfmaxsb %v4, %v6, %v8, 1",
7615
));
7616
insns.push((
7617
Inst::FpuRRR {
7618
fpu_op: FPUOp2::Max64,
7619
rd: writable_vr(4),
7620
rn: vr(6),
7621
rm: vr(24),
7622
},
7623
"E746801832EF",
7624
"wfmaxdb %f4, %f6, %v24, 1",
7625
));
7626
insns.push((
7627
Inst::FpuRRR {
7628
fpu_op: FPUOp2::Max64x2,
7629
rd: writable_vr(4),
7630
rn: vr(6),
7631
rm: vr(24),
7632
},
7633
"E746801032EF",
7634
"vfmaxdb %v4, %v6, %v24, 1",
7635
));
7636
insns.push((
7637
Inst::FpuRRR {
7638
fpu_op: FPUOp2::Max128,
7639
rd: writable_vr(4),
7640
rn: vr(6),
7641
rm: vr(24),
7642
},
7643
"E746801842EF",
7644
"wfmaxxb %f4, %f6, %v24, 1",
7645
));
7646
insns.push((
7647
Inst::FpuRRR {
7648
fpu_op: FPUOp2::Min32,
7649
rd: writable_vr(4),
7650
rn: vr(6),
7651
rm: vr(8),
7652
},
7653
"E746801820EE",
7654
"wfminsb %f4, %f6, %f8, 1",
7655
));
7656
insns.push((
7657
Inst::FpuRRR {
7658
fpu_op: FPUOp2::Min32x4,
7659
rd: writable_vr(4),
7660
rn: vr(6),
7661
rm: vr(8),
7662
},
7663
"E746801020EE",
7664
"vfminsb %v4, %v6, %v8, 1",
7665
));
7666
insns.push((
7667
Inst::FpuRRR {
7668
fpu_op: FPUOp2::Min64,
7669
rd: writable_vr(4),
7670
rn: vr(6),
7671
rm: vr(8),
7672
},
7673
"E746801830EE",
7674
"wfmindb %f4, %f6, %f8, 1",
7675
));
7676
insns.push((
7677
Inst::FpuRRR {
7678
fpu_op: FPUOp2::Min64x2,
7679
rd: writable_vr(4),
7680
rn: vr(6),
7681
rm: vr(8),
7682
},
7683
"E746801030EE",
7684
"vfmindb %v4, %v6, %v8, 1",
7685
));
7686
insns.push((
7687
Inst::FpuRRR {
7688
fpu_op: FPUOp2::Min128,
7689
rd: writable_vr(4),
7690
rn: vr(6),
7691
rm: vr(8),
7692
},
7693
"E746801840EE",
7694
"wfminxb %f4, %f6, %f8, 1",
7695
));
7696
insns.push((
7697
Inst::FpuRRR {
7698
fpu_op: FPUOp2::MaxPseudo32,
7699
rd: writable_vr(4),
7700
rn: vr(6),
7701
rm: vr(8),
7702
},
7703
"E746803820EF",
7704
"wfmaxsb %f4, %f6, %f8, 3",
7705
));
7706
insns.push((
7707
Inst::FpuRRR {
7708
fpu_op: FPUOp2::MaxPseudo32x4,
7709
rd: writable_vr(4),
7710
rn: vr(6),
7711
rm: vr(8),
7712
},
7713
"E746803020EF",
7714
"vfmaxsb %v4, %v6, %v8, 3",
7715
));
7716
insns.push((
7717
Inst::FpuRRR {
7718
fpu_op: FPUOp2::MaxPseudo64,
7719
rd: writable_vr(4),
7720
rn: vr(6),
7721
rm: vr(24),
7722
},
7723
"E746803832EF",
7724
"wfmaxdb %f4, %f6, %v24, 3",
7725
));
7726
insns.push((
7727
Inst::FpuRRR {
7728
fpu_op: FPUOp2::MaxPseudo64x2,
7729
rd: writable_vr(4),
7730
rn: vr(6),
7731
rm: vr(24),
7732
},
7733
"E746803032EF",
7734
"vfmaxdb %v4, %v6, %v24, 3",
7735
));
7736
insns.push((
7737
Inst::FpuRRR {
7738
fpu_op: FPUOp2::MaxPseudo128,
7739
rd: writable_vr(4),
7740
rn: vr(6),
7741
rm: vr(24),
7742
},
7743
"E746803842EF",
7744
"wfmaxxb %f4, %f6, %v24, 3",
7745
));
7746
insns.push((
7747
Inst::FpuRRR {
7748
fpu_op: FPUOp2::MinPseudo32,
7749
rd: writable_vr(4),
7750
rn: vr(6),
7751
rm: vr(8),
7752
},
7753
"E746803820EE",
7754
"wfminsb %f4, %f6, %f8, 3",
7755
));
7756
insns.push((
7757
Inst::FpuRRR {
7758
fpu_op: FPUOp2::MinPseudo32x4,
7759
rd: writable_vr(4),
7760
rn: vr(6),
7761
rm: vr(8),
7762
},
7763
"E746803020EE",
7764
"vfminsb %v4, %v6, %v8, 3",
7765
));
7766
insns.push((
7767
Inst::FpuRRR {
7768
fpu_op: FPUOp2::MinPseudo64,
7769
rd: writable_vr(4),
7770
rn: vr(6),
7771
rm: vr(8),
7772
},
7773
"E746803830EE",
7774
"wfmindb %f4, %f6, %f8, 3",
7775
));
7776
insns.push((
7777
Inst::FpuRRR {
7778
fpu_op: FPUOp2::MinPseudo64x2,
7779
rd: writable_vr(4),
7780
rn: vr(6),
7781
rm: vr(8),
7782
},
7783
"E746803030EE",
7784
"vfmindb %v4, %v6, %v8, 3",
7785
));
7786
insns.push((
7787
Inst::FpuRRR {
7788
fpu_op: FPUOp2::MinPseudo128,
7789
rd: writable_vr(4),
7790
rn: vr(6),
7791
rm: vr(8),
7792
},
7793
"E746803840EE",
7794
"wfminxb %f4, %f6, %f8, 3",
7795
));
7796
7797
insns.push((
7798
Inst::FpuRRRR {
7799
fpu_op: FPUOp3::MAdd32,
7800
rd: writable_vr(8),
7801
rn: vr(12),
7802
rm: vr(13),
7803
ra: vr(8),
7804
},
7805
"B30E80CD",
7806
"maebr %f8, %f12, %f13",
7807
));
7808
insns.push((
7809
Inst::FpuRRRR {
7810
fpu_op: FPUOp3::MAdd32,
7811
rd: writable_vr(8),
7812
rn: vr(12),
7813
rm: vr(13),
7814
ra: vr(20),
7815
},
7816
"E78CD208418F",
7817
"wfmasb %f8, %f12, %f13, %v20",
7818
));
7819
insns.push((
7820
Inst::FpuRRRR {
7821
fpu_op: FPUOp3::MAdd32x4,
7822
rd: writable_vr(8),
7823
rn: vr(12),
7824
rm: vr(13),
7825
ra: vr(20),
7826
},
7827
"E78CD200418F",
7828
"vfmasb %v8, %v12, %v13, %v20",
7829
));
7830
insns.push((
7831
Inst::FpuRRRR {
7832
fpu_op: FPUOp3::MAdd64,
7833
rd: writable_vr(8),
7834
rn: vr(12),
7835
rm: vr(13),
7836
ra: vr(8),
7837
},
7838
"B31E80CD",
7839
"madbr %f8, %f12, %f13",
7840
));
7841
insns.push((
7842
Inst::FpuRRRR {
7843
fpu_op: FPUOp3::MAdd64,
7844
rd: writable_vr(8),
7845
rn: vr(12),
7846
rm: vr(13),
7847
ra: vr(20),
7848
},
7849
"E78CD308418F",
7850
"wfmadb %f8, %f12, %f13, %v20",
7851
));
7852
insns.push((
7853
Inst::FpuRRRR {
7854
fpu_op: FPUOp3::MAdd64x2,
7855
rd: writable_vr(8),
7856
rn: vr(12),
7857
rm: vr(13),
7858
ra: vr(20),
7859
},
7860
"E78CD300418F",
7861
"vfmadb %v8, %v12, %v13, %v20",
7862
));
7863
insns.push((
7864
Inst::FpuRRRR {
7865
fpu_op: FPUOp3::MAdd128,
7866
rd: writable_vr(8),
7867
rn: vr(12),
7868
rm: vr(13),
7869
ra: vr(20),
7870
},
7871
"E78CD408418F",
7872
"wfmaxb %f8, %f12, %f13, %v20",
7873
));
7874
insns.push((
7875
Inst::FpuRRRR {
7876
fpu_op: FPUOp3::MSub32,
7877
rd: writable_vr(8),
7878
rn: vr(12),
7879
rm: vr(13),
7880
ra: vr(8),
7881
},
7882
"B30F80CD",
7883
"msebr %f8, %f12, %f13",
7884
));
7885
insns.push((
7886
Inst::FpuRRRR {
7887
fpu_op: FPUOp3::MSub32,
7888
rd: writable_vr(8),
7889
rn: vr(12),
7890
rm: vr(13),
7891
ra: vr(20),
7892
},
7893
"E78CD208418E",
7894
"wfmssb %f8, %f12, %f13, %v20",
7895
));
7896
insns.push((
7897
Inst::FpuRRRR {
7898
fpu_op: FPUOp3::MSub32x4,
7899
rd: writable_vr(8),
7900
rn: vr(12),
7901
rm: vr(13),
7902
ra: vr(20),
7903
},
7904
"E78CD200418E",
7905
"vfmssb %v8, %v12, %v13, %v20",
7906
));
7907
insns.push((
7908
Inst::FpuRRRR {
7909
fpu_op: FPUOp3::MSub64,
7910
rd: writable_vr(8),
7911
rn: vr(12),
7912
rm: vr(13),
7913
ra: vr(8),
7914
},
7915
"B31F80CD",
7916
"msdbr %f8, %f12, %f13",
7917
));
7918
insns.push((
7919
Inst::FpuRRRR {
7920
fpu_op: FPUOp3::MSub64,
7921
rd: writable_vr(8),
7922
rn: vr(12),
7923
rm: vr(13),
7924
ra: vr(20),
7925
},
7926
"E78CD308418E",
7927
"wfmsdb %f8, %f12, %f13, %v20",
7928
));
7929
insns.push((
7930
Inst::FpuRRRR {
7931
fpu_op: FPUOp3::MSub64x2,
7932
rd: writable_vr(8),
7933
rn: vr(12),
7934
rm: vr(13),
7935
ra: vr(20),
7936
},
7937
"E78CD300418E",
7938
"vfmsdb %v8, %v12, %v13, %v20",
7939
));
7940
insns.push((
7941
Inst::FpuRRRR {
7942
fpu_op: FPUOp3::MSub128,
7943
rd: writable_vr(8),
7944
rn: vr(12),
7945
rm: vr(13),
7946
ra: vr(20),
7947
},
7948
"E78CD408418E",
7949
"wfmsxb %f8, %f12, %f13, %v20",
7950
));
7951
7952
insns.push((
7953
Inst::FpuCmp32 {
7954
rn: vr(8),
7955
rm: vr(12),
7956
},
7957
"B309008C",
7958
"cebr %f8, %f12",
7959
));
7960
insns.push((
7961
Inst::FpuCmp32 {
7962
rn: vr(24),
7963
rm: vr(12),
7964
},
7965
"E78C000028CB",
7966
"wfcsb %v24, %f12",
7967
));
7968
insns.push((
7969
Inst::FpuCmp64 {
7970
rn: vr(8),
7971
rm: vr(12),
7972
},
7973
"B319008C",
7974
"cdbr %f8, %f12",
7975
));
7976
insns.push((
7977
Inst::FpuCmp64 {
7978
rn: vr(24),
7979
rm: vr(12),
7980
},
7981
"E78C000038CB",
7982
"wfcdb %v24, %f12",
7983
));
7984
insns.push((
7985
Inst::FpuCmp128 {
7986
rn: vr(24),
7987
rm: vr(12),
7988
},
7989
"E78C000048CB",
7990
"wfcxb %v24, %f12",
7991
));
7992
7993
insns.push((
7994
Inst::FpuRound {
7995
op: FpuRoundOp::Cvt64To32,
7996
mode: FpuRoundMode::Current,
7997
rd: writable_vr(8),
7998
rn: vr(12),
7999
},
8000
"B344008C",
8001
"ledbra %f8, 0, %f12, 0",
8002
));
8003
insns.push((
8004
Inst::FpuRound {
8005
op: FpuRoundOp::Cvt64To32,
8006
mode: FpuRoundMode::ToNearest,
8007
rd: writable_vr(24),
8008
rn: vr(12),
8009
},
8010
"E78C001838C5",
8011
"wledb %v24, %f12, 0, 1",
8012
));
8013
insns.push((
8014
Inst::FpuRound {
8015
op: FpuRoundOp::Cvt64x2To32x4,
8016
mode: FpuRoundMode::ToNearest,
8017
rd: writable_vr(24),
8018
rn: vr(12),
8019
},
8020
"E78C001038C5",
8021
"vledb %v24, %v12, 0, 1",
8022
));
8023
insns.push((
8024
Inst::FpuRound {
8025
op: FpuRoundOp::Cvt128To64,
8026
mode: FpuRoundMode::ToNearest,
8027
rd: writable_vr(24),
8028
rn: vr(12),
8029
},
8030
"E78C001848C5",
8031
"wflrx %v24, %f12, 0, 1",
8032
));
8033
insns.push((
8034
Inst::FpuRound {
8035
op: FpuRoundOp::Round32,
8036
mode: FpuRoundMode::ToNegInfinity,
8037
rd: writable_vr(8),
8038
rn: vr(12),
8039
},
8040
"B357708C",
8041
"fiebr %f8, 7, %f12",
8042
));
8043
insns.push((
8044
Inst::FpuRound {
8045
op: FpuRoundOp::Round64,
8046
mode: FpuRoundMode::ToNegInfinity,
8047
rd: writable_vr(8),
8048
rn: vr(12),
8049
},
8050
"B35F708C",
8051
"fidbr %f8, 7, %f12",
8052
));
8053
insns.push((
8054
Inst::FpuRound {
8055
op: FpuRoundOp::Round32,
8056
mode: FpuRoundMode::ToPosInfinity,
8057
rd: writable_vr(8),
8058
rn: vr(12),
8059
},
8060
"B357608C",
8061
"fiebr %f8, 6, %f12",
8062
));
8063
insns.push((
8064
Inst::FpuRound {
8065
op: FpuRoundOp::Round64,
8066
mode: FpuRoundMode::ToPosInfinity,
8067
rd: writable_vr(8),
8068
rn: vr(12),
8069
},
8070
"B35F608C",
8071
"fidbr %f8, 6, %f12",
8072
));
8073
insns.push((
8074
Inst::FpuRound {
8075
op: FpuRoundOp::Round32,
8076
mode: FpuRoundMode::ToZero,
8077
rd: writable_vr(8),
8078
rn: vr(12),
8079
},
8080
"B357508C",
8081
"fiebr %f8, 5, %f12",
8082
));
8083
insns.push((
8084
Inst::FpuRound {
8085
op: FpuRoundOp::Round64,
8086
mode: FpuRoundMode::ToZero,
8087
rd: writable_vr(8),
8088
rn: vr(12),
8089
},
8090
"B35F508C",
8091
"fidbr %f8, 5, %f12",
8092
));
8093
insns.push((
8094
Inst::FpuRound {
8095
op: FpuRoundOp::Round32,
8096
mode: FpuRoundMode::ToNearestTiesToEven,
8097
rd: writable_vr(8),
8098
rn: vr(12),
8099
},
8100
"B357408C",
8101
"fiebr %f8, 4, %f12",
8102
));
8103
insns.push((
8104
Inst::FpuRound {
8105
op: FpuRoundOp::Round64,
8106
mode: FpuRoundMode::ToNearestTiesToEven,
8107
rd: writable_vr(8),
8108
rn: vr(12),
8109
},
8110
"B35F408C",
8111
"fidbr %f8, 4, %f12",
8112
));
8113
insns.push((
8114
Inst::FpuRound {
8115
op: FpuRoundOp::Round32,
8116
mode: FpuRoundMode::ToNearest,
8117
rd: writable_vr(24),
8118
rn: vr(12),
8119
},
8120
"E78C001828C7",
8121
"wfisb %v24, %f12, 0, 1",
8122
));
8123
insns.push((
8124
Inst::FpuRound {
8125
op: FpuRoundOp::Round32x4,
8126
mode: FpuRoundMode::ToNearest,
8127
rd: writable_vr(24),
8128
rn: vr(12),
8129
},
8130
"E78C001028C7",
8131
"vfisb %v24, %v12, 0, 1",
8132
));
8133
insns.push((
8134
Inst::FpuRound {
8135
op: FpuRoundOp::Round64,
8136
mode: FpuRoundMode::ToNearest,
8137
rd: writable_vr(24),
8138
rn: vr(12),
8139
},
8140
"E78C001838C7",
8141
"wfidb %v24, %f12, 0, 1",
8142
));
8143
insns.push((
8144
Inst::FpuRound {
8145
op: FpuRoundOp::Round64x2,
8146
mode: FpuRoundMode::ToNearest,
8147
rd: writable_vr(24),
8148
rn: vr(12),
8149
},
8150
"E78C001038C7",
8151
"vfidb %v24, %v12, 0, 1",
8152
));
8153
insns.push((
8154
Inst::FpuRound {
8155
op: FpuRoundOp::Round128,
8156
mode: FpuRoundMode::ToNearest,
8157
rd: writable_vr(24),
8158
rn: vr(12),
8159
},
8160
"E78C001848C7",
8161
"wfixb %v24, %f12, 0, 1",
8162
));
8163
insns.push((
8164
Inst::FpuRound {
8165
op: FpuRoundOp::ToSInt32,
8166
mode: FpuRoundMode::ToNearest,
8167
rd: writable_vr(24),
8168
rn: vr(12),
8169
},
8170
"E78C001828C2",
8171
"wcfeb %v24, %f12, 0, 1",
8172
));
8173
insns.push((
8174
Inst::FpuRound {
8175
op: FpuRoundOp::ToSInt32x4,
8176
mode: FpuRoundMode::ToNearest,
8177
rd: writable_vr(24),
8178
rn: vr(12),
8179
},
8180
"E78C001028C2",
8181
"vcfeb %v24, %v12, 0, 1",
8182
));
8183
insns.push((
8184
Inst::FpuRound {
8185
op: FpuRoundOp::ToSInt64,
8186
mode: FpuRoundMode::ToNearest,
8187
rd: writable_vr(24),
8188
rn: vr(12),
8189
},
8190
"E78C001838C2",
8191
"wcgdb %v24, %f12, 0, 1",
8192
));
8193
insns.push((
8194
Inst::FpuRound {
8195
op: FpuRoundOp::ToSInt64x2,
8196
mode: FpuRoundMode::ToNearest,
8197
rd: writable_vr(24),
8198
rn: vr(12),
8199
},
8200
"E78C001038C2",
8201
"vcgdb %v24, %v12, 0, 1",
8202
));
8203
insns.push((
8204
Inst::FpuRound {
8205
op: FpuRoundOp::ToUInt32,
8206
mode: FpuRoundMode::ToNearest,
8207
rd: writable_vr(24),
8208
rn: vr(12),
8209
},
8210
"E78C001828C0",
8211
"wclfeb %v24, %f12, 0, 1",
8212
));
8213
insns.push((
8214
Inst::FpuRound {
8215
op: FpuRoundOp::ToUInt32x4,
8216
mode: FpuRoundMode::ToNearest,
8217
rd: writable_vr(24),
8218
rn: vr(12),
8219
},
8220
"E78C001028C0",
8221
"vclfeb %v24, %v12, 0, 1",
8222
));
8223
insns.push((
8224
Inst::FpuRound {
8225
op: FpuRoundOp::ToUInt64,
8226
mode: FpuRoundMode::ToNearest,
8227
rd: writable_vr(24),
8228
rn: vr(12),
8229
},
8230
"E78C001838C0",
8231
"wclgdb %v24, %f12, 0, 1",
8232
));
8233
insns.push((
8234
Inst::FpuRound {
8235
op: FpuRoundOp::ToUInt64x2,
8236
mode: FpuRoundMode::ToNearest,
8237
rd: writable_vr(24),
8238
rn: vr(12),
8239
},
8240
"E78C001038C0",
8241
"vclgdb %v24, %v12, 0, 1",
8242
));
8243
insns.push((
8244
Inst::FpuRound {
8245
op: FpuRoundOp::FromSInt32,
8246
mode: FpuRoundMode::ToNearest,
8247
rd: writable_vr(24),
8248
rn: vr(12),
8249
},
8250
"E78C001828C3",
8251
"wcefb %v24, %f12, 0, 1",
8252
));
8253
insns.push((
8254
Inst::FpuRound {
8255
op: FpuRoundOp::FromSInt32x4,
8256
mode: FpuRoundMode::ToNearest,
8257
rd: writable_vr(24),
8258
rn: vr(12),
8259
},
8260
"E78C001028C3",
8261
"vcefb %v24, %v12, 0, 1",
8262
));
8263
insns.push((
8264
Inst::FpuRound {
8265
op: FpuRoundOp::FromSInt64,
8266
mode: FpuRoundMode::ToNearest,
8267
rd: writable_vr(24),
8268
rn: vr(12),
8269
},
8270
"E78C001838C3",
8271
"wcdgb %v24, %f12, 0, 1",
8272
));
8273
insns.push((
8274
Inst::FpuRound {
8275
op: FpuRoundOp::FromSInt64x2,
8276
mode: FpuRoundMode::ToNearest,
8277
rd: writable_vr(24),
8278
rn: vr(12),
8279
},
8280
"E78C001038C3",
8281
"vcdgb %v24, %v12, 0, 1",
8282
));
8283
insns.push((
8284
Inst::FpuRound {
8285
op: FpuRoundOp::FromUInt32,
8286
mode: FpuRoundMode::ToNearest,
8287
rd: writable_vr(24),
8288
rn: vr(12),
8289
},
8290
"E78C001828C1",
8291
"wcelfb %v24, %f12, 0, 1",
8292
));
8293
insns.push((
8294
Inst::FpuRound {
8295
op: FpuRoundOp::FromUInt32x4,
8296
mode: FpuRoundMode::ToNearest,
8297
rd: writable_vr(24),
8298
rn: vr(12),
8299
},
8300
"E78C001028C1",
8301
"vcelfb %v24, %v12, 0, 1",
8302
));
8303
insns.push((
8304
Inst::FpuRound {
8305
op: FpuRoundOp::FromUInt64,
8306
mode: FpuRoundMode::ToNearest,
8307
rd: writable_vr(24),
8308
rn: vr(12),
8309
},
8310
"E78C001838C1",
8311
"wcdlgb %v24, %f12, 0, 1",
8312
));
8313
insns.push((
8314
Inst::FpuRound {
8315
op: FpuRoundOp::FromUInt64x2,
8316
mode: FpuRoundMode::ToNearest,
8317
rd: writable_vr(24),
8318
rn: vr(12),
8319
},
8320
"E78C001038C1",
8321
"vcdlgb %v24, %v12, 0, 1",
8322
));
8323
8324
let w_fp_regpair = WritableRegPair {
8325
hi: writable_vr(1),
8326
lo: writable_vr(3),
8327
};
8328
let fp_regpair = RegPair {
8329
hi: vr(1),
8330
lo: vr(3),
8331
};
8332
insns.push((
8333
Inst::FpuConv128FromInt {
8334
op: FpuConv128Op::SInt32,
8335
mode: FpuRoundMode::ToZero,
8336
rd: w_fp_regpair,
8337
rn: gpr(8),
8338
},
8339
"B3965018",
8340
"cxfbra %f1, 5, %r8, 0",
8341
));
8342
insns.push((
8343
Inst::FpuConv128FromInt {
8344
op: FpuConv128Op::SInt64,
8345
mode: FpuRoundMode::ToZero,
8346
rd: w_fp_regpair,
8347
rn: gpr(8),
8348
},
8349
"B3A65018",
8350
"cxgbra %f1, 5, %r8, 0",
8351
));
8352
insns.push((
8353
Inst::FpuConv128FromInt {
8354
op: FpuConv128Op::UInt32,
8355
mode: FpuRoundMode::ToZero,
8356
rd: w_fp_regpair,
8357
rn: gpr(8),
8358
},
8359
"B3925018",
8360
"cxlfbr %f1, 5, %r8, 0",
8361
));
8362
insns.push((
8363
Inst::FpuConv128FromInt {
8364
op: FpuConv128Op::UInt64,
8365
mode: FpuRoundMode::ToZero,
8366
rd: w_fp_regpair,
8367
rn: gpr(8),
8368
},
8369
"B3A25018",
8370
"cxlgbr %f1, 5, %r8, 0",
8371
));
8372
insns.push((
8373
Inst::FpuConv128ToInt {
8374
op: FpuConv128Op::SInt32,
8375
mode: FpuRoundMode::ToZero,
8376
rd: writable_gpr(8),
8377
rn: fp_regpair,
8378
},
8379
"B39A5081",
8380
"cfxbra %r8, 5, %f1, 0",
8381
));
8382
insns.push((
8383
Inst::FpuConv128ToInt {
8384
op: FpuConv128Op::SInt64,
8385
mode: FpuRoundMode::ToZero,
8386
rd: writable_gpr(8),
8387
rn: fp_regpair,
8388
},
8389
"B3AA5081",
8390
"cgxbra %r8, 5, %f1, 0",
8391
));
8392
insns.push((
8393
Inst::FpuConv128ToInt {
8394
op: FpuConv128Op::UInt32,
8395
mode: FpuRoundMode::ToZero,
8396
rd: writable_gpr(8),
8397
rn: fp_regpair,
8398
},
8399
"B39E5081",
8400
"clfxbr %r8, 5, %f1, 0",
8401
));
8402
insns.push((
8403
Inst::FpuConv128ToInt {
8404
op: FpuConv128Op::UInt64,
8405
mode: FpuRoundMode::ToZero,
8406
rd: writable_gpr(8),
8407
rn: fp_regpair,
8408
},
8409
"B3AE5081",
8410
"clgxbr %r8, 5, %f1, 0",
8411
));
8412
8413
insns.push((
8414
Inst::VecRRR {
8415
op: VecBinaryOp::Add8x16,
8416
rd: writable_vr(20),
8417
rn: vr(8),
8418
rm: vr(12),
8419
},
8420
"E748C00008F3",
8421
"vab %v20, %v8, %v12",
8422
));
8423
insns.push((
8424
Inst::VecRRR {
8425
op: VecBinaryOp::Add16x8,
8426
rd: writable_vr(20),
8427
rn: vr(8),
8428
rm: vr(12),
8429
},
8430
"E748C00018F3",
8431
"vah %v20, %v8, %v12",
8432
));
8433
insns.push((
8434
Inst::VecRRR {
8435
op: VecBinaryOp::Add32x4,
8436
rd: writable_vr(20),
8437
rn: vr(8),
8438
rm: vr(12),
8439
},
8440
"E748C00028F3",
8441
"vaf %v20, %v8, %v12",
8442
));
8443
insns.push((
8444
Inst::VecRRR {
8445
op: VecBinaryOp::Add64x2,
8446
rd: writable_vr(20),
8447
rn: vr(8),
8448
rm: vr(12),
8449
},
8450
"E748C00038F3",
8451
"vag %v20, %v8, %v12",
8452
));
8453
insns.push((
8454
Inst::VecRRR {
8455
op: VecBinaryOp::Add128,
8456
rd: writable_vr(20),
8457
rn: vr(8),
8458
rm: vr(12),
8459
},
8460
"E748C00048F3",
8461
"vaq %v20, %v8, %v12",
8462
));
8463
insns.push((
8464
Inst::VecRRR {
8465
op: VecBinaryOp::Sub8x16,
8466
rd: writable_vr(20),
8467
rn: vr(8),
8468
rm: vr(12),
8469
},
8470
"E748C00008F7",
8471
"vsb %v20, %v8, %v12",
8472
));
8473
insns.push((
8474
Inst::VecRRR {
8475
op: VecBinaryOp::Sub16x8,
8476
rd: writable_vr(20),
8477
rn: vr(8),
8478
rm: vr(12),
8479
},
8480
"E748C00018F7",
8481
"vsh %v20, %v8, %v12",
8482
));
8483
insns.push((
8484
Inst::VecRRR {
8485
op: VecBinaryOp::Sub32x4,
8486
rd: writable_vr(20),
8487
rn: vr(8),
8488
rm: vr(12),
8489
},
8490
"E748C00028F7",
8491
"vsf %v20, %v8, %v12",
8492
));
8493
insns.push((
8494
Inst::VecRRR {
8495
op: VecBinaryOp::Sub64x2,
8496
rd: writable_vr(20),
8497
rn: vr(8),
8498
rm: vr(12),
8499
},
8500
"E748C00038F7",
8501
"vsg %v20, %v8, %v12",
8502
));
8503
insns.push((
8504
Inst::VecRRR {
8505
op: VecBinaryOp::Sub128,
8506
rd: writable_vr(20),
8507
rn: vr(8),
8508
rm: vr(12),
8509
},
8510
"E748C00048F7",
8511
"vsq %v20, %v8, %v12",
8512
));
8513
insns.push((
8514
Inst::VecRRR {
8515
op: VecBinaryOp::Mul8x16,
8516
rd: writable_vr(20),
8517
rn: vr(8),
8518
rm: vr(12),
8519
},
8520
"E748C00008A2",
8521
"vmlb %v20, %v8, %v12",
8522
));
8523
insns.push((
8524
Inst::VecRRR {
8525
op: VecBinaryOp::Mul16x8,
8526
rd: writable_vr(20),
8527
rn: vr(8),
8528
rm: vr(12),
8529
},
8530
"E748C00018A2",
8531
"vmlhw %v20, %v8, %v12",
8532
));
8533
insns.push((
8534
Inst::VecRRR {
8535
op: VecBinaryOp::Mul32x4,
8536
rd: writable_vr(20),
8537
rn: vr(8),
8538
rm: vr(12),
8539
},
8540
"E748C00028A2",
8541
"vmlf %v20, %v8, %v12",
8542
));
8543
insns.push((
8544
Inst::VecRRR {
8545
op: VecBinaryOp::Mul64x2,
8546
rd: writable_vr(20),
8547
rn: vr(8),
8548
rm: vr(12),
8549
},
8550
"E748C00038A2",
8551
"vmlg %v20, %v8, %v12",
8552
));
8553
insns.push((
8554
Inst::VecRRR {
8555
op: VecBinaryOp::Mul128,
8556
rd: writable_vr(20),
8557
rn: vr(8),
8558
rm: vr(12),
8559
},
8560
"E748C00048A2",
8561
"vmlq %v20, %v8, %v12",
8562
));
8563
insns.push((
8564
Inst::VecRRR {
8565
op: VecBinaryOp::UMulHi8x16,
8566
rd: writable_vr(20),
8567
rn: vr(8),
8568
rm: vr(12),
8569
},
8570
"E748C00008A1",
8571
"vmlhb %v20, %v8, %v12",
8572
));
8573
insns.push((
8574
Inst::VecRRR {
8575
op: VecBinaryOp::UMulHi16x8,
8576
rd: writable_vr(20),
8577
rn: vr(8),
8578
rm: vr(12),
8579
},
8580
"E748C00018A1",
8581
"vmlhh %v20, %v8, %v12",
8582
));
8583
insns.push((
8584
Inst::VecRRR {
8585
op: VecBinaryOp::UMulHi32x4,
8586
rd: writable_vr(20),
8587
rn: vr(8),
8588
rm: vr(12),
8589
},
8590
"E748C00028A1",
8591
"vmlhf %v20, %v8, %v12",
8592
));
8593
insns.push((
8594
Inst::VecRRR {
8595
op: VecBinaryOp::UMulHi64x2,
8596
rd: writable_vr(20),
8597
rn: vr(8),
8598
rm: vr(12),
8599
},
8600
"E748C00038A1",
8601
"vmlhg %v20, %v8, %v12",
8602
));
8603
insns.push((
8604
Inst::VecRRR {
8605
op: VecBinaryOp::UMulHi128,
8606
rd: writable_vr(20),
8607
rn: vr(8),
8608
rm: vr(12),
8609
},
8610
"E748C00048A1",
8611
"vmlhq %v20, %v8, %v12",
8612
));
8613
insns.push((
8614
Inst::VecRRR {
8615
op: VecBinaryOp::SMulHi8x16,
8616
rd: writable_vr(20),
8617
rn: vr(8),
8618
rm: vr(12),
8619
},
8620
"E748C00008A3",
8621
"vmhb %v20, %v8, %v12",
8622
));
8623
insns.push((
8624
Inst::VecRRR {
8625
op: VecBinaryOp::SMulHi16x8,
8626
rd: writable_vr(20),
8627
rn: vr(8),
8628
rm: vr(12),
8629
},
8630
"E748C00018A3",
8631
"vmhh %v20, %v8, %v12",
8632
));
8633
insns.push((
8634
Inst::VecRRR {
8635
op: VecBinaryOp::SMulHi32x4,
8636
rd: writable_vr(20),
8637
rn: vr(8),
8638
rm: vr(12),
8639
},
8640
"E748C00028A3",
8641
"vmhf %v20, %v8, %v12",
8642
));
8643
insns.push((
8644
Inst::VecRRR {
8645
op: VecBinaryOp::SMulHi64x2,
8646
rd: writable_vr(20),
8647
rn: vr(8),
8648
rm: vr(12),
8649
},
8650
"E748C00038A3",
8651
"vmhg %v20, %v8, %v12",
8652
));
8653
insns.push((
8654
Inst::VecRRR {
8655
op: VecBinaryOp::SMulHi128,
8656
rd: writable_vr(20),
8657
rn: vr(8),
8658
rm: vr(12),
8659
},
8660
"E748C00048A3",
8661
"vmhq %v20, %v8, %v12",
8662
));
8663
insns.push((
8664
Inst::VecRRR {
8665
op: VecBinaryOp::UMulEven8x16,
8666
rd: writable_vr(20),
8667
rn: vr(8),
8668
rm: vr(12),
8669
},
8670
"E748C00008A4",
8671
"vmleb %v20, %v8, %v12",
8672
));
8673
insns.push((
8674
Inst::VecRRR {
8675
op: VecBinaryOp::UMulEven16x8,
8676
rd: writable_vr(20),
8677
rn: vr(8),
8678
rm: vr(12),
8679
},
8680
"E748C00018A4",
8681
"vmleh %v20, %v8, %v12",
8682
));
8683
insns.push((
8684
Inst::VecRRR {
8685
op: VecBinaryOp::UMulEven32x4,
8686
rd: writable_vr(20),
8687
rn: vr(8),
8688
rm: vr(12),
8689
},
8690
"E748C00028A4",
8691
"vmlef %v20, %v8, %v12",
8692
));
8693
insns.push((
8694
Inst::VecRRR {
8695
op: VecBinaryOp::UMulEven64x2,
8696
rd: writable_vr(20),
8697
rn: vr(8),
8698
rm: vr(12),
8699
},
8700
"E748C00038A4",
8701
"vmleg %v20, %v8, %v12",
8702
));
8703
insns.push((
8704
Inst::VecRRR {
8705
op: VecBinaryOp::SMulEven8x16,
8706
rd: writable_vr(20),
8707
rn: vr(8),
8708
rm: vr(12),
8709
},
8710
"E748C00008A6",
8711
"vmeb %v20, %v8, %v12",
8712
));
8713
insns.push((
8714
Inst::VecRRR {
8715
op: VecBinaryOp::SMulEven16x8,
8716
rd: writable_vr(20),
8717
rn: vr(8),
8718
rm: vr(12),
8719
},
8720
"E748C00018A6",
8721
"vmeh %v20, %v8, %v12",
8722
));
8723
insns.push((
8724
Inst::VecRRR {
8725
op: VecBinaryOp::SMulEven32x4,
8726
rd: writable_vr(20),
8727
rn: vr(8),
8728
rm: vr(12),
8729
},
8730
"E748C00028A6",
8731
"vmef %v20, %v8, %v12",
8732
));
8733
insns.push((
8734
Inst::VecRRR {
8735
op: VecBinaryOp::SMulEven64x2,
8736
rd: writable_vr(20),
8737
rn: vr(8),
8738
rm: vr(12),
8739
},
8740
"E748C00038A6",
8741
"vmeg %v20, %v8, %v12",
8742
));
8743
insns.push((
8744
Inst::VecRRR {
8745
op: VecBinaryOp::UMulOdd8x16,
8746
rd: writable_vr(20),
8747
rn: vr(8),
8748
rm: vr(12),
8749
},
8750
"E748C00008A5",
8751
"vmlob %v20, %v8, %v12",
8752
));
8753
insns.push((
8754
Inst::VecRRR {
8755
op: VecBinaryOp::UMulOdd16x8,
8756
rd: writable_vr(20),
8757
rn: vr(8),
8758
rm: vr(12),
8759
},
8760
"E748C00018A5",
8761
"vmloh %v20, %v8, %v12",
8762
));
8763
insns.push((
8764
Inst::VecRRR {
8765
op: VecBinaryOp::UMulOdd32x4,
8766
rd: writable_vr(20),
8767
rn: vr(8),
8768
rm: vr(12),
8769
},
8770
"E748C00028A5",
8771
"vmlof %v20, %v8, %v12",
8772
));
8773
insns.push((
8774
Inst::VecRRR {
8775
op: VecBinaryOp::UMulOdd64x2,
8776
rd: writable_vr(20),
8777
rn: vr(8),
8778
rm: vr(12),
8779
},
8780
"E748C00038A5",
8781
"vmlog %v20, %v8, %v12",
8782
));
8783
insns.push((
8784
Inst::VecRRR {
8785
op: VecBinaryOp::SMulOdd8x16,
8786
rd: writable_vr(20),
8787
rn: vr(8),
8788
rm: vr(12),
8789
},
8790
"E748C00008A7",
8791
"vmob %v20, %v8, %v12",
8792
));
8793
insns.push((
8794
Inst::VecRRR {
8795
op: VecBinaryOp::SMulOdd16x8,
8796
rd: writable_vr(20),
8797
rn: vr(8),
8798
rm: vr(12),
8799
},
8800
"E748C00018A7",
8801
"vmoh %v20, %v8, %v12",
8802
));
8803
insns.push((
8804
Inst::VecRRR {
8805
op: VecBinaryOp::SMulOdd32x4,
8806
rd: writable_vr(20),
8807
rn: vr(8),
8808
rm: vr(12),
8809
},
8810
"E748C00028A7",
8811
"vmof %v20, %v8, %v12",
8812
));
8813
insns.push((
8814
Inst::VecRRR {
8815
op: VecBinaryOp::SMulOdd64x2,
8816
rd: writable_vr(20),
8817
rn: vr(8),
8818
rm: vr(12),
8819
},
8820
"E748C00038A7",
8821
"vmog %v20, %v8, %v12",
8822
));
8823
insns.push((
8824
Inst::VecRRR {
8825
op: VecBinaryOp::UDiv32x4,
8826
rd: writable_vr(20),
8827
rn: vr(8),
8828
rm: vr(12),
8829
},
8830
"E748C00028B0",
8831
"vdlf %v20, %v8, %v12, 0",
8832
));
8833
insns.push((
8834
Inst::VecRRR {
8835
op: VecBinaryOp::UDiv64x2,
8836
rd: writable_vr(20),
8837
rn: vr(8),
8838
rm: vr(12),
8839
},
8840
"E748C00038B0",
8841
"vdlg %v20, %v8, %v12, 0",
8842
));
8843
insns.push((
8844
Inst::VecRRR {
8845
op: VecBinaryOp::UDiv128,
8846
rd: writable_vr(20),
8847
rn: vr(8),
8848
rm: vr(12),
8849
},
8850
"E748C00048B0",
8851
"vdlq %v20, %v8, %v12, 0",
8852
));
8853
insns.push((
8854
Inst::VecRRR {
8855
op: VecBinaryOp::SDiv32x4,
8856
rd: writable_vr(20),
8857
rn: vr(8),
8858
rm: vr(12),
8859
},
8860
"E748C00028B2",
8861
"vdf %v20, %v8, %v12, 0",
8862
));
8863
insns.push((
8864
Inst::VecRRR {
8865
op: VecBinaryOp::SDiv64x2,
8866
rd: writable_vr(20),
8867
rn: vr(8),
8868
rm: vr(12),
8869
},
8870
"E748C00038B2",
8871
"vdg %v20, %v8, %v12, 0",
8872
));
8873
insns.push((
8874
Inst::VecRRR {
8875
op: VecBinaryOp::SDiv128,
8876
rd: writable_vr(20),
8877
rn: vr(8),
8878
rm: vr(12),
8879
},
8880
"E748C00048B2",
8881
"vdq %v20, %v8, %v12, 0",
8882
));
8883
insns.push((
8884
Inst::VecRRR {
8885
op: VecBinaryOp::URem32x4,
8886
rd: writable_vr(20),
8887
rn: vr(8),
8888
rm: vr(12),
8889
},
8890
"E748C00028B1",
8891
"vrlf %v20, %v8, %v12, 0",
8892
));
8893
insns.push((
8894
Inst::VecRRR {
8895
op: VecBinaryOp::URem64x2,
8896
rd: writable_vr(20),
8897
rn: vr(8),
8898
rm: vr(12),
8899
},
8900
"E748C00038B1",
8901
"vrlg %v20, %v8, %v12, 0",
8902
));
8903
insns.push((
8904
Inst::VecRRR {
8905
op: VecBinaryOp::URem128,
8906
rd: writable_vr(20),
8907
rn: vr(8),
8908
rm: vr(12),
8909
},
8910
"E748C00048B1",
8911
"vrlq %v20, %v8, %v12, 0",
8912
));
8913
insns.push((
8914
Inst::VecRRR {
8915
op: VecBinaryOp::SRem32x4,
8916
rd: writable_vr(20),
8917
rn: vr(8),
8918
rm: vr(12),
8919
},
8920
"E748C00028B3",
8921
"vrf %v20, %v8, %v12, 0",
8922
));
8923
insns.push((
8924
Inst::VecRRR {
8925
op: VecBinaryOp::SRem64x2,
8926
rd: writable_vr(20),
8927
rn: vr(8),
8928
rm: vr(12),
8929
},
8930
"E748C00038B3",
8931
"vrg %v20, %v8, %v12, 0",
8932
));
8933
insns.push((
8934
Inst::VecRRR {
8935
op: VecBinaryOp::SRem128,
8936
rd: writable_vr(20),
8937
rn: vr(8),
8938
rm: vr(12),
8939
},
8940
"E748C00048B3",
8941
"vrq %v20, %v8, %v12, 0",
8942
));
8943
insns.push((
8944
Inst::VecRRR {
8945
op: VecBinaryOp::UMax8x16,
8946
rd: writable_vr(20),
8947
rn: vr(8),
8948
rm: vr(12),
8949
},
8950
"E748C00008FD",
8951
"vmxlb %v20, %v8, %v12",
8952
));
8953
insns.push((
8954
Inst::VecRRR {
8955
op: VecBinaryOp::UMax16x8,
8956
rd: writable_vr(20),
8957
rn: vr(8),
8958
rm: vr(12),
8959
},
8960
"E748C00018FD",
8961
"vmxlh %v20, %v8, %v12",
8962
));
8963
insns.push((
8964
Inst::VecRRR {
8965
op: VecBinaryOp::UMax32x4,
8966
rd: writable_vr(20),
8967
rn: vr(8),
8968
rm: vr(12),
8969
},
8970
"E748C00028FD",
8971
"vmxlf %v20, %v8, %v12",
8972
));
8973
insns.push((
8974
Inst::VecRRR {
8975
op: VecBinaryOp::UMax64x2,
8976
rd: writable_vr(20),
8977
rn: vr(8),
8978
rm: vr(12),
8979
},
8980
"E748C00038FD",
8981
"vmxlg %v20, %v8, %v12",
8982
));
8983
insns.push((
8984
Inst::VecRRR {
8985
op: VecBinaryOp::UMax128,
8986
rd: writable_vr(20),
8987
rn: vr(8),
8988
rm: vr(12),
8989
},
8990
"E748C00048FD",
8991
"vmxlq %v20, %v8, %v12",
8992
));
8993
insns.push((
8994
Inst::VecRRR {
8995
op: VecBinaryOp::SMax8x16,
8996
rd: writable_vr(20),
8997
rn: vr(8),
8998
rm: vr(12),
8999
},
9000
"E748C00008FF",
9001
"vmxb %v20, %v8, %v12",
9002
));
9003
insns.push((
9004
Inst::VecRRR {
9005
op: VecBinaryOp::SMax16x8,
9006
rd: writable_vr(20),
9007
rn: vr(8),
9008
rm: vr(12),
9009
},
9010
"E748C00018FF",
9011
"vmxh %v20, %v8, %v12",
9012
));
9013
insns.push((
9014
Inst::VecRRR {
9015
op: VecBinaryOp::SMax32x4,
9016
rd: writable_vr(20),
9017
rn: vr(8),
9018
rm: vr(12),
9019
},
9020
"E748C00028FF",
9021
"vmxf %v20, %v8, %v12",
9022
));
9023
insns.push((
9024
Inst::VecRRR {
9025
op: VecBinaryOp::SMax64x2,
9026
rd: writable_vr(20),
9027
rn: vr(8),
9028
rm: vr(12),
9029
},
9030
"E748C00038FF",
9031
"vmxg %v20, %v8, %v12",
9032
));
9033
insns.push((
9034
Inst::VecRRR {
9035
op: VecBinaryOp::SMax128,
9036
rd: writable_vr(20),
9037
rn: vr(8),
9038
rm: vr(12),
9039
},
9040
"E748C00048FF",
9041
"vmxq %v20, %v8, %v12",
9042
));
9043
insns.push((
9044
Inst::VecRRR {
9045
op: VecBinaryOp::UMin8x16,
9046
rd: writable_vr(20),
9047
rn: vr(8),
9048
rm: vr(12),
9049
},
9050
"E748C00008FC",
9051
"vmnlb %v20, %v8, %v12",
9052
));
9053
insns.push((
9054
Inst::VecRRR {
9055
op: VecBinaryOp::UMin16x8,
9056
rd: writable_vr(20),
9057
rn: vr(8),
9058
rm: vr(12),
9059
},
9060
"E748C00018FC",
9061
"vmnlh %v20, %v8, %v12",
9062
));
9063
insns.push((
9064
Inst::VecRRR {
9065
op: VecBinaryOp::UMin32x4,
9066
rd: writable_vr(20),
9067
rn: vr(8),
9068
rm: vr(12),
9069
},
9070
"E748C00028FC",
9071
"vmnlf %v20, %v8, %v12",
9072
));
9073
insns.push((
9074
Inst::VecRRR {
9075
op: VecBinaryOp::UMin64x2,
9076
rd: writable_vr(20),
9077
rn: vr(8),
9078
rm: vr(12),
9079
},
9080
"E748C00038FC",
9081
"vmnlg %v20, %v8, %v12",
9082
));
9083
insns.push((
9084
Inst::VecRRR {
9085
op: VecBinaryOp::UMin128,
9086
rd: writable_vr(20),
9087
rn: vr(8),
9088
rm: vr(12),
9089
},
9090
"E748C00048FC",
9091
"vmnlq %v20, %v8, %v12",
9092
));
9093
insns.push((
9094
Inst::VecRRR {
9095
op: VecBinaryOp::SMin8x16,
9096
rd: writable_vr(20),
9097
rn: vr(8),
9098
rm: vr(12),
9099
},
9100
"E748C00008FE",
9101
"vmnb %v20, %v8, %v12",
9102
));
9103
insns.push((
9104
Inst::VecRRR {
9105
op: VecBinaryOp::SMin16x8,
9106
rd: writable_vr(20),
9107
rn: vr(8),
9108
rm: vr(12),
9109
},
9110
"E748C00018FE",
9111
"vmnh %v20, %v8, %v12",
9112
));
9113
insns.push((
9114
Inst::VecRRR {
9115
op: VecBinaryOp::SMin32x4,
9116
rd: writable_vr(20),
9117
rn: vr(8),
9118
rm: vr(12),
9119
},
9120
"E748C00028FE",
9121
"vmnf %v20, %v8, %v12",
9122
));
9123
insns.push((
9124
Inst::VecRRR {
9125
op: VecBinaryOp::SMin64x2,
9126
rd: writable_vr(20),
9127
rn: vr(8),
9128
rm: vr(12),
9129
},
9130
"E748C00038FE",
9131
"vmng %v20, %v8, %v12",
9132
));
9133
insns.push((
9134
Inst::VecRRR {
9135
op: VecBinaryOp::SMin128,
9136
rd: writable_vr(20),
9137
rn: vr(8),
9138
rm: vr(12),
9139
},
9140
"E748C00048FE",
9141
"vmnq %v20, %v8, %v12",
9142
));
9143
insns.push((
9144
Inst::VecRRR {
9145
op: VecBinaryOp::UAvg8x16,
9146
rd: writable_vr(20),
9147
rn: vr(8),
9148
rm: vr(12),
9149
},
9150
"E748C00008F0",
9151
"vavglb %v20, %v8, %v12",
9152
));
9153
insns.push((
9154
Inst::VecRRR {
9155
op: VecBinaryOp::UAvg16x8,
9156
rd: writable_vr(20),
9157
rn: vr(8),
9158
rm: vr(12),
9159
},
9160
"E748C00018F0",
9161
"vavglh %v20, %v8, %v12",
9162
));
9163
insns.push((
9164
Inst::VecRRR {
9165
op: VecBinaryOp::UAvg32x4,
9166
rd: writable_vr(20),
9167
rn: vr(8),
9168
rm: vr(12),
9169
},
9170
"E748C00028F0",
9171
"vavglf %v20, %v8, %v12",
9172
));
9173
insns.push((
9174
Inst::VecRRR {
9175
op: VecBinaryOp::UAvg64x2,
9176
rd: writable_vr(20),
9177
rn: vr(8),
9178
rm: vr(12),
9179
},
9180
"E748C00038F0",
9181
"vavglg %v20, %v8, %v12",
9182
));
9183
insns.push((
9184
Inst::VecRRR {
9185
op: VecBinaryOp::UAvg128,
9186
rd: writable_vr(20),
9187
rn: vr(8),
9188
rm: vr(12),
9189
},
9190
"E748C00048F0",
9191
"vavglq %v20, %v8, %v12",
9192
));
9193
insns.push((
9194
Inst::VecRRR {
9195
op: VecBinaryOp::SAvg8x16,
9196
rd: writable_vr(20),
9197
rn: vr(8),
9198
rm: vr(12),
9199
},
9200
"E748C00008F2",
9201
"vavgb %v20, %v8, %v12",
9202
));
9203
insns.push((
9204
Inst::VecRRR {
9205
op: VecBinaryOp::SAvg16x8,
9206
rd: writable_vr(20),
9207
rn: vr(8),
9208
rm: vr(12),
9209
},
9210
"E748C00018F2",
9211
"vavgh %v20, %v8, %v12",
9212
));
9213
insns.push((
9214
Inst::VecRRR {
9215
op: VecBinaryOp::SAvg32x4,
9216
rd: writable_vr(20),
9217
rn: vr(8),
9218
rm: vr(12),
9219
},
9220
"E748C00028F2",
9221
"vavgf %v20, %v8, %v12",
9222
));
9223
insns.push((
9224
Inst::VecRRR {
9225
op: VecBinaryOp::SAvg64x2,
9226
rd: writable_vr(20),
9227
rn: vr(8),
9228
rm: vr(12),
9229
},
9230
"E748C00038F2",
9231
"vavgg %v20, %v8, %v12",
9232
));
9233
insns.push((
9234
Inst::VecRRR {
9235
op: VecBinaryOp::SAvg128,
9236
rd: writable_vr(20),
9237
rn: vr(8),
9238
rm: vr(12),
9239
},
9240
"E748C00048F2",
9241
"vavgq %v20, %v8, %v12",
9242
));
9243
insns.push((
9244
Inst::VecRRR {
9245
op: VecBinaryOp::And128,
9246
rd: writable_vr(20),
9247
rn: vr(8),
9248
rm: vr(12),
9249
},
9250
"E748C0000868",
9251
"vn %v20, %v8, %v12",
9252
));
9253
insns.push((
9254
Inst::VecRRR {
9255
op: VecBinaryOp::Orr128,
9256
rd: writable_vr(20),
9257
rn: vr(8),
9258
rm: vr(12),
9259
},
9260
"E748C000086A",
9261
"vo %v20, %v8, %v12",
9262
));
9263
insns.push((
9264
Inst::VecRRR {
9265
op: VecBinaryOp::Xor128,
9266
rd: writable_vr(20),
9267
rn: vr(8),
9268
rm: vr(12),
9269
},
9270
"E748C000086D",
9271
"vx %v20, %v8, %v12",
9272
));
9273
insns.push((
9274
Inst::VecRRR {
9275
op: VecBinaryOp::NotAnd128,
9276
rd: writable_vr(20),
9277
rn: vr(8),
9278
rm: vr(12),
9279
},
9280
"E748C000086E",
9281
"vnn %v20, %v8, %v12",
9282
));
9283
insns.push((
9284
Inst::VecRRR {
9285
op: VecBinaryOp::NotOrr128,
9286
rd: writable_vr(20),
9287
rn: vr(8),
9288
rm: vr(12),
9289
},
9290
"E748C000086B",
9291
"vno %v20, %v8, %v12",
9292
));
9293
insns.push((
9294
Inst::VecRRR {
9295
op: VecBinaryOp::NotXor128,
9296
rd: writable_vr(20),
9297
rn: vr(8),
9298
rm: vr(12),
9299
},
9300
"E748C000086C",
9301
"vnx %v20, %v8, %v12",
9302
));
9303
insns.push((
9304
Inst::VecRRR {
9305
op: VecBinaryOp::AndNot128,
9306
rd: writable_vr(20),
9307
rn: vr(8),
9308
rm: vr(12),
9309
},
9310
"E748C0000869",
9311
"vnc %v20, %v8, %v12",
9312
));
9313
insns.push((
9314
Inst::VecRRR {
9315
op: VecBinaryOp::OrrNot128,
9316
rd: writable_vr(20),
9317
rn: vr(8),
9318
rm: vr(12),
9319
},
9320
"E748C000086F",
9321
"voc %v20, %v8, %v12",
9322
));
9323
insns.push((
9324
Inst::VecRRR {
9325
op: VecBinaryOp::BitPermute128,
9326
rd: writable_vr(20),
9327
rn: vr(8),
9328
rm: vr(12),
9329
},
9330
"E748C0000885",
9331
"vbperm %v20, %v8, %v12",
9332
));
9333
insns.push((
9334
Inst::VecRRR {
9335
op: VecBinaryOp::LShLByByte128,
9336
rd: writable_vr(20),
9337
rn: vr(8),
9338
rm: vr(12),
9339
},
9340
"E748C0000875",
9341
"vslb %v20, %v8, %v12",
9342
));
9343
insns.push((
9344
Inst::VecRRR {
9345
op: VecBinaryOp::LShRByByte128,
9346
rd: writable_vr(20),
9347
rn: vr(8),
9348
rm: vr(12),
9349
},
9350
"E748C000087D",
9351
"vsrlb %v20, %v8, %v12",
9352
));
9353
insns.push((
9354
Inst::VecRRR {
9355
op: VecBinaryOp::AShRByByte128,
9356
rd: writable_vr(20),
9357
rn: vr(8),
9358
rm: vr(12),
9359
},
9360
"E748C000087F",
9361
"vsrab %v20, %v8, %v12",
9362
));
9363
insns.push((
9364
Inst::VecRRR {
9365
op: VecBinaryOp::LShLByBit128,
9366
rd: writable_vr(20),
9367
rn: vr(8),
9368
rm: vr(12),
9369
},
9370
"E748C0000874",
9371
"vsl %v20, %v8, %v12",
9372
));
9373
insns.push((
9374
Inst::VecRRR {
9375
op: VecBinaryOp::LShRByBit128,
9376
rd: writable_vr(20),
9377
rn: vr(8),
9378
rm: vr(12),
9379
},
9380
"E748C000087C",
9381
"vsrl %v20, %v8, %v12",
9382
));
9383
insns.push((
9384
Inst::VecRRR {
9385
op: VecBinaryOp::AShRByBit128,
9386
rd: writable_vr(20),
9387
rn: vr(8),
9388
rm: vr(12),
9389
},
9390
"E748C000087E",
9391
"vsra %v20, %v8, %v12",
9392
));
9393
insns.push((
9394
Inst::VecRRR {
9395
op: VecBinaryOp::Pack16x8,
9396
rd: writable_vr(20),
9397
rn: vr(8),
9398
rm: vr(12),
9399
},
9400
"E748C0001894",
9401
"vpkh %v20, %v8, %v12",
9402
));
9403
insns.push((
9404
Inst::VecRRR {
9405
op: VecBinaryOp::Pack32x4,
9406
rd: writable_vr(20),
9407
rn: vr(8),
9408
rm: vr(12),
9409
},
9410
"E748C0002894",
9411
"vpkf %v20, %v8, %v12",
9412
));
9413
insns.push((
9414
Inst::VecRRR {
9415
op: VecBinaryOp::Pack64x2,
9416
rd: writable_vr(20),
9417
rn: vr(8),
9418
rm: vr(12),
9419
},
9420
"E748C0003894",
9421
"vpkg %v20, %v8, %v12",
9422
));
9423
insns.push((
9424
Inst::VecRRR {
9425
op: VecBinaryOp::PackUSat16x8,
9426
rd: writable_vr(20),
9427
rn: vr(8),
9428
rm: vr(12),
9429
},
9430
"E748C0001895",
9431
"vpklsh %v20, %v8, %v12",
9432
));
9433
insns.push((
9434
Inst::VecRRR {
9435
op: VecBinaryOp::PackUSat32x4,
9436
rd: writable_vr(20),
9437
rn: vr(8),
9438
rm: vr(12),
9439
},
9440
"E748C0002895",
9441
"vpklsf %v20, %v8, %v12",
9442
));
9443
insns.push((
9444
Inst::VecRRR {
9445
op: VecBinaryOp::PackUSat64x2,
9446
rd: writable_vr(20),
9447
rn: vr(8),
9448
rm: vr(12),
9449
},
9450
"E748C0003895",
9451
"vpklsg %v20, %v8, %v12",
9452
));
9453
insns.push((
9454
Inst::VecRRR {
9455
op: VecBinaryOp::PackSSat16x8,
9456
rd: writable_vr(20),
9457
rn: vr(8),
9458
rm: vr(12),
9459
},
9460
"E748C0001897",
9461
"vpksh %v20, %v8, %v12",
9462
));
9463
insns.push((
9464
Inst::VecRRR {
9465
op: VecBinaryOp::PackSSat32x4,
9466
rd: writable_vr(20),
9467
rn: vr(8),
9468
rm: vr(12),
9469
},
9470
"E748C0002897",
9471
"vpksf %v20, %v8, %v12",
9472
));
9473
insns.push((
9474
Inst::VecRRR {
9475
op: VecBinaryOp::PackSSat64x2,
9476
rd: writable_vr(20),
9477
rn: vr(8),
9478
rm: vr(12),
9479
},
9480
"E748C0003897",
9481
"vpksg %v20, %v8, %v12",
9482
));
9483
insns.push((
9484
Inst::VecRRR {
9485
op: VecBinaryOp::MergeLow8x16,
9486
rd: writable_vr(20),
9487
rn: vr(8),
9488
rm: vr(12),
9489
},
9490
"E748C0000860",
9491
"vmrlb %v20, %v8, %v12",
9492
));
9493
insns.push((
9494
Inst::VecRRR {
9495
op: VecBinaryOp::MergeLow16x8,
9496
rd: writable_vr(20),
9497
rn: vr(8),
9498
rm: vr(12),
9499
},
9500
"E748C0001860",
9501
"vmrlh %v20, %v8, %v12",
9502
));
9503
insns.push((
9504
Inst::VecRRR {
9505
op: VecBinaryOp::MergeLow32x4,
9506
rd: writable_vr(20),
9507
rn: vr(8),
9508
rm: vr(12),
9509
},
9510
"E748C0002860",
9511
"vmrlf %v20, %v8, %v12",
9512
));
9513
insns.push((
9514
Inst::VecRRR {
9515
op: VecBinaryOp::MergeLow64x2,
9516
rd: writable_vr(20),
9517
rn: vr(8),
9518
rm: vr(12),
9519
},
9520
"E748C0003860",
9521
"vmrlg %v20, %v8, %v12",
9522
));
9523
insns.push((
9524
Inst::VecRRR {
9525
op: VecBinaryOp::MergeHigh8x16,
9526
rd: writable_vr(20),
9527
rn: vr(8),
9528
rm: vr(12),
9529
},
9530
"E748C0000861",
9531
"vmrhb %v20, %v8, %v12",
9532
));
9533
insns.push((
9534
Inst::VecRRR {
9535
op: VecBinaryOp::MergeHigh16x8,
9536
rd: writable_vr(20),
9537
rn: vr(8),
9538
rm: vr(12),
9539
},
9540
"E748C0001861",
9541
"vmrhh %v20, %v8, %v12",
9542
));
9543
insns.push((
9544
Inst::VecRRR {
9545
op: VecBinaryOp::MergeHigh32x4,
9546
rd: writable_vr(20),
9547
rn: vr(8),
9548
rm: vr(12),
9549
},
9550
"E748C0002861",
9551
"vmrhf %v20, %v8, %v12",
9552
));
9553
insns.push((
9554
Inst::VecRRR {
9555
op: VecBinaryOp::MergeHigh64x2,
9556
rd: writable_vr(20),
9557
rn: vr(8),
9558
rm: vr(12),
9559
},
9560
"E748C0003861",
9561
"vmrhg %v20, %v8, %v12",
9562
));
9563
9564
insns.push((
9565
Inst::VecRR {
9566
op: VecUnaryOp::Abs8x16,
9567
rd: writable_vr(20),
9568
rn: vr(8),
9569
},
9570
"E748000008DF",
9571
"vlpb %v20, %v8",
9572
));
9573
insns.push((
9574
Inst::VecRR {
9575
op: VecUnaryOp::Abs16x8,
9576
rd: writable_vr(20),
9577
rn: vr(8),
9578
},
9579
"E748000018DF",
9580
"vlph %v20, %v8",
9581
));
9582
insns.push((
9583
Inst::VecRR {
9584
op: VecUnaryOp::Abs32x4,
9585
rd: writable_vr(20),
9586
rn: vr(8),
9587
},
9588
"E748000028DF",
9589
"vlpf %v20, %v8",
9590
));
9591
insns.push((
9592
Inst::VecRR {
9593
op: VecUnaryOp::Abs64x2,
9594
rd: writable_vr(20),
9595
rn: vr(8),
9596
},
9597
"E748000038DF",
9598
"vlpg %v20, %v8",
9599
));
9600
insns.push((
9601
Inst::VecRR {
9602
op: VecUnaryOp::Abs128,
9603
rd: writable_vr(20),
9604
rn: vr(8),
9605
},
9606
"E748000048DF",
9607
"vlpq %v20, %v8",
9608
));
9609
insns.push((
9610
Inst::VecRR {
9611
op: VecUnaryOp::Neg8x16,
9612
rd: writable_vr(20),
9613
rn: vr(8),
9614
},
9615
"E748000008DE",
9616
"vlcb %v20, %v8",
9617
));
9618
insns.push((
9619
Inst::VecRR {
9620
op: VecUnaryOp::Neg16x8,
9621
rd: writable_vr(20),
9622
rn: vr(8),
9623
},
9624
"E748000018DE",
9625
"vlch %v20, %v8",
9626
));
9627
insns.push((
9628
Inst::VecRR {
9629
op: VecUnaryOp::Neg32x4,
9630
rd: writable_vr(20),
9631
rn: vr(8),
9632
},
9633
"E748000028DE",
9634
"vlcf %v20, %v8",
9635
));
9636
insns.push((
9637
Inst::VecRR {
9638
op: VecUnaryOp::Neg64x2,
9639
rd: writable_vr(20),
9640
rn: vr(8),
9641
},
9642
"E748000038DE",
9643
"vlcg %v20, %v8",
9644
));
9645
insns.push((
9646
Inst::VecRR {
9647
op: VecUnaryOp::Neg128,
9648
rd: writable_vr(20),
9649
rn: vr(8),
9650
},
9651
"E748000048DE",
9652
"vlcq %v20, %v8",
9653
));
9654
insns.push((
9655
Inst::VecRR {
9656
op: VecUnaryOp::Popcnt8x16,
9657
rd: writable_vr(20),
9658
rn: vr(8),
9659
},
9660
"E74800000850",
9661
"vpopctb %v20, %v8",
9662
));
9663
insns.push((
9664
Inst::VecRR {
9665
op: VecUnaryOp::Popcnt16x8,
9666
rd: writable_vr(20),
9667
rn: vr(8),
9668
},
9669
"E74800001850",
9670
"vpopcth %v20, %v8",
9671
));
9672
insns.push((
9673
Inst::VecRR {
9674
op: VecUnaryOp::Popcnt32x4,
9675
rd: writable_vr(20),
9676
rn: vr(8),
9677
},
9678
"E74800002850",
9679
"vpopctf %v20, %v8",
9680
));
9681
insns.push((
9682
Inst::VecRR {
9683
op: VecUnaryOp::Popcnt64x2,
9684
rd: writable_vr(20),
9685
rn: vr(8),
9686
},
9687
"E74800003850",
9688
"vpopctg %v20, %v8",
9689
));
9690
insns.push((
9691
Inst::VecRR {
9692
op: VecUnaryOp::Clz8x16,
9693
rd: writable_vr(20),
9694
rn: vr(8),
9695
},
9696
"E74800000853",
9697
"vclzb %v20, %v8",
9698
));
9699
insns.push((
9700
Inst::VecRR {
9701
op: VecUnaryOp::Clz16x8,
9702
rd: writable_vr(20),
9703
rn: vr(8),
9704
},
9705
"E74800001853",
9706
"vclzh %v20, %v8",
9707
));
9708
insns.push((
9709
Inst::VecRR {
9710
op: VecUnaryOp::Clz32x4,
9711
rd: writable_vr(20),
9712
rn: vr(8),
9713
},
9714
"E74800002853",
9715
"vclzf %v20, %v8",
9716
));
9717
insns.push((
9718
Inst::VecRR {
9719
op: VecUnaryOp::Clz64x2,
9720
rd: writable_vr(20),
9721
rn: vr(8),
9722
},
9723
"E74800003853",
9724
"vclzg %v20, %v8",
9725
));
9726
insns.push((
9727
Inst::VecRR {
9728
op: VecUnaryOp::Clz128,
9729
rd: writable_vr(20),
9730
rn: vr(8),
9731
},
9732
"E74800004853",
9733
"vclzq %v20, %v8",
9734
));
9735
insns.push((
9736
Inst::VecRR {
9737
op: VecUnaryOp::Ctz8x16,
9738
rd: writable_vr(20),
9739
rn: vr(8),
9740
},
9741
"E74800000852",
9742
"vctzb %v20, %v8",
9743
));
9744
insns.push((
9745
Inst::VecRR {
9746
op: VecUnaryOp::Ctz16x8,
9747
rd: writable_vr(20),
9748
rn: vr(8),
9749
},
9750
"E74800001852",
9751
"vctzh %v20, %v8",
9752
));
9753
insns.push((
9754
Inst::VecRR {
9755
op: VecUnaryOp::Ctz32x4,
9756
rd: writable_vr(20),
9757
rn: vr(8),
9758
},
9759
"E74800002852",
9760
"vctzf %v20, %v8",
9761
));
9762
insns.push((
9763
Inst::VecRR {
9764
op: VecUnaryOp::Ctz64x2,
9765
rd: writable_vr(20),
9766
rn: vr(8),
9767
},
9768
"E74800003852",
9769
"vctzg %v20, %v8",
9770
));
9771
insns.push((
9772
Inst::VecRR {
9773
op: VecUnaryOp::Ctz128,
9774
rd: writable_vr(20),
9775
rn: vr(8),
9776
},
9777
"E74800004852",
9778
"vctzq %v20, %v8",
9779
));
9780
insns.push((
9781
Inst::VecRR {
9782
op: VecUnaryOp::UnpackULow8x16,
9783
rd: writable_vr(20),
9784
rn: vr(8),
9785
},
9786
"E748000008D4",
9787
"vupllb %v20, %v8",
9788
));
9789
insns.push((
9790
Inst::VecRR {
9791
op: VecUnaryOp::UnpackULow16x8,
9792
rd: writable_vr(20),
9793
rn: vr(8),
9794
},
9795
"E748000018D4",
9796
"vupllh %v20, %v8",
9797
));
9798
insns.push((
9799
Inst::VecRR {
9800
op: VecUnaryOp::UnpackULow32x4,
9801
rd: writable_vr(20),
9802
rn: vr(8),
9803
},
9804
"E748000028D4",
9805
"vupllf %v20, %v8",
9806
));
9807
insns.push((
9808
Inst::VecRR {
9809
op: VecUnaryOp::UnpackULow64x2,
9810
rd: writable_vr(20),
9811
rn: vr(8),
9812
},
9813
"E748000038D4",
9814
"vupllg %v20, %v8",
9815
));
9816
insns.push((
9817
Inst::VecRR {
9818
op: VecUnaryOp::UnpackUHigh8x16,
9819
rd: writable_vr(20),
9820
rn: vr(8),
9821
},
9822
"E748000008D5",
9823
"vuplhb %v20, %v8",
9824
));
9825
insns.push((
9826
Inst::VecRR {
9827
op: VecUnaryOp::UnpackUHigh16x8,
9828
rd: writable_vr(20),
9829
rn: vr(8),
9830
},
9831
"E748000018D5",
9832
"vuplhh %v20, %v8",
9833
));
9834
insns.push((
9835
Inst::VecRR {
9836
op: VecUnaryOp::UnpackUHigh32x4,
9837
rd: writable_vr(20),
9838
rn: vr(8),
9839
},
9840
"E748000028D5",
9841
"vuplhf %v20, %v8",
9842
));
9843
insns.push((
9844
Inst::VecRR {
9845
op: VecUnaryOp::UnpackUHigh64x2,
9846
rd: writable_vr(20),
9847
rn: vr(8),
9848
},
9849
"E748000038D5",
9850
"vuplhg %v20, %v8",
9851
));
9852
insns.push((
9853
Inst::VecRR {
9854
op: VecUnaryOp::UnpackSLow8x16,
9855
rd: writable_vr(20),
9856
rn: vr(8),
9857
},
9858
"E748000008D6",
9859
"vuplb %v20, %v8",
9860
));
9861
insns.push((
9862
Inst::VecRR {
9863
op: VecUnaryOp::UnpackSLow16x8,
9864
rd: writable_vr(20),
9865
rn: vr(8),
9866
},
9867
"E748000018D6",
9868
"vuplh %v20, %v8",
9869
));
9870
insns.push((
9871
Inst::VecRR {
9872
op: VecUnaryOp::UnpackSLow32x4,
9873
rd: writable_vr(20),
9874
rn: vr(8),
9875
},
9876
"E748000028D6",
9877
"vuplf %v20, %v8",
9878
));
9879
insns.push((
9880
Inst::VecRR {
9881
op: VecUnaryOp::UnpackSLow64x2,
9882
rd: writable_vr(20),
9883
rn: vr(8),
9884
},
9885
"E748000038D6",
9886
"vuplg %v20, %v8",
9887
));
9888
insns.push((
9889
Inst::VecRR {
9890
op: VecUnaryOp::UnpackSHigh8x16,
9891
rd: writable_vr(20),
9892
rn: vr(8),
9893
},
9894
"E748000008D7",
9895
"vuphb %v20, %v8",
9896
));
9897
insns.push((
9898
Inst::VecRR {
9899
op: VecUnaryOp::UnpackSHigh16x8,
9900
rd: writable_vr(20),
9901
rn: vr(8),
9902
},
9903
"E748000018D7",
9904
"vuphh %v20, %v8",
9905
));
9906
insns.push((
9907
Inst::VecRR {
9908
op: VecUnaryOp::UnpackSHigh32x4,
9909
rd: writable_vr(20),
9910
rn: vr(8),
9911
},
9912
"E748000028D7",
9913
"vuphf %v20, %v8",
9914
));
9915
insns.push((
9916
Inst::VecRR {
9917
op: VecUnaryOp::UnpackSHigh64x2,
9918
rd: writable_vr(20),
9919
rn: vr(8),
9920
},
9921
"E748000038D7",
9922
"vuphg %v20, %v8",
9923
));
9924
9925
insns.push((
9926
Inst::VecShiftRR {
9927
shift_op: VecShiftOp::RotL8x16,
9928
rd: writable_vr(20),
9929
rn: vr(5),
9930
shift_imm: 3,
9931
shift_reg: gpr(6),
9932
},
9933
"E74560030833",
9934
"verllb %v20, %v5, 3(%r6)",
9935
));
9936
insns.push((
9937
Inst::VecShiftRR {
9938
shift_op: VecShiftOp::RotL16x8,
9939
rd: writable_vr(20),
9940
rn: vr(5),
9941
shift_imm: 3,
9942
shift_reg: gpr(6),
9943
},
9944
"E74560031833",
9945
"verllh %v20, %v5, 3(%r6)",
9946
));
9947
insns.push((
9948
Inst::VecShiftRR {
9949
shift_op: VecShiftOp::RotL32x4,
9950
rd: writable_vr(20),
9951
rn: vr(5),
9952
shift_imm: 3,
9953
shift_reg: gpr(6),
9954
},
9955
"E74560032833",
9956
"verllf %v20, %v5, 3(%r6)",
9957
));
9958
insns.push((
9959
Inst::VecShiftRR {
9960
shift_op: VecShiftOp::RotL64x2,
9961
rd: writable_vr(20),
9962
rn: vr(5),
9963
shift_imm: 3,
9964
shift_reg: gpr(6),
9965
},
9966
"E74560033833",
9967
"verllg %v20, %v5, 3(%r6)",
9968
));
9969
insns.push((
9970
Inst::VecShiftRR {
9971
shift_op: VecShiftOp::LShL8x16,
9972
rd: writable_vr(20),
9973
rn: vr(5),
9974
shift_imm: 3,
9975
shift_reg: gpr(6),
9976
},
9977
"E74560030830",
9978
"veslb %v20, %v5, 3(%r6)",
9979
));
9980
insns.push((
9981
Inst::VecShiftRR {
9982
shift_op: VecShiftOp::LShL16x8,
9983
rd: writable_vr(20),
9984
rn: vr(5),
9985
shift_imm: 3,
9986
shift_reg: gpr(6),
9987
},
9988
"E74560031830",
9989
"veslh %v20, %v5, 3(%r6)",
9990
));
9991
insns.push((
9992
Inst::VecShiftRR {
9993
shift_op: VecShiftOp::LShL32x4,
9994
rd: writable_vr(20),
9995
rn: vr(5),
9996
shift_imm: 3,
9997
shift_reg: gpr(6),
9998
},
9999
"E74560032830",
10000
"veslf %v20, %v5, 3(%r6)",
10001
));
10002
insns.push((
10003
Inst::VecShiftRR {
10004
shift_op: VecShiftOp::LShL64x2,
10005
rd: writable_vr(20),
10006
rn: vr(5),
10007
shift_imm: 3,
10008
shift_reg: gpr(6),
10009
},
10010
"E74560033830",
10011
"veslg %v20, %v5, 3(%r6)",
10012
));
10013
insns.push((
10014
Inst::VecShiftRR {
10015
shift_op: VecShiftOp::LShR8x16,
10016
rd: writable_vr(20),
10017
rn: vr(5),
10018
shift_imm: 3,
10019
shift_reg: gpr(6),
10020
},
10021
"E74560030838",
10022
"vesrlb %v20, %v5, 3(%r6)",
10023
));
10024
insns.push((
10025
Inst::VecShiftRR {
10026
shift_op: VecShiftOp::LShR16x8,
10027
rd: writable_vr(20),
10028
rn: vr(5),
10029
shift_imm: 3,
10030
shift_reg: gpr(6),
10031
},
10032
"E74560031838",
10033
"vesrlh %v20, %v5, 3(%r6)",
10034
));
10035
insns.push((
10036
Inst::VecShiftRR {
10037
shift_op: VecShiftOp::LShR32x4,
10038
rd: writable_vr(20),
10039
rn: vr(5),
10040
shift_imm: 3,
10041
shift_reg: gpr(6),
10042
},
10043
"E74560032838",
10044
"vesrlf %v20, %v5, 3(%r6)",
10045
));
10046
insns.push((
10047
Inst::VecShiftRR {
10048
shift_op: VecShiftOp::LShR64x2,
10049
rd: writable_vr(20),
10050
rn: vr(5),
10051
shift_imm: 3,
10052
shift_reg: gpr(6),
10053
},
10054
"E74560033838",
10055
"vesrlg %v20, %v5, 3(%r6)",
10056
));
10057
insns.push((
10058
Inst::VecShiftRR {
10059
shift_op: VecShiftOp::AShR8x16,
10060
rd: writable_vr(20),
10061
rn: vr(5),
10062
shift_imm: 3,
10063
shift_reg: gpr(6),
10064
},
10065
"E7456003083A",
10066
"vesrab %v20, %v5, 3(%r6)",
10067
));
10068
insns.push((
10069
Inst::VecShiftRR {
10070
shift_op: VecShiftOp::AShR16x8,
10071
rd: writable_vr(20),
10072
rn: vr(5),
10073
shift_imm: 3,
10074
shift_reg: gpr(6),
10075
},
10076
"E7456003183A",
10077
"vesrah %v20, %v5, 3(%r6)",
10078
));
10079
insns.push((
10080
Inst::VecShiftRR {
10081
shift_op: VecShiftOp::AShR32x4,
10082
rd: writable_vr(20),
10083
rn: vr(5),
10084
shift_imm: 3,
10085
shift_reg: gpr(6),
10086
},
10087
"E7456003283A",
10088
"vesraf %v20, %v5, 3(%r6)",
10089
));
10090
insns.push((
10091
Inst::VecShiftRR {
10092
shift_op: VecShiftOp::AShR64x2,
10093
rd: writable_vr(20),
10094
rn: vr(5),
10095
shift_imm: 3,
10096
shift_reg: gpr(6),
10097
},
10098
"E7456003383A",
10099
"vesrag %v20, %v5, 3(%r6)",
10100
));
10101
10102
insns.push((
10103
Inst::VecSelect {
10104
rd: writable_vr(4),
10105
rn: vr(6),
10106
rm: vr(8),
10107
ra: vr(10),
10108
},
10109
"E7468000A08D",
10110
"vsel %v4, %v6, %v8, %v10",
10111
));
10112
insns.push((
10113
Inst::VecSelect {
10114
rd: writable_vr(20),
10115
rn: vr(6),
10116
rm: vr(8),
10117
ra: vr(10),
10118
},
10119
"E7468000A88D",
10120
"vsel %v20, %v6, %v8, %v10",
10121
));
10122
insns.push((
10123
Inst::VecSelect {
10124
rd: writable_vr(4),
10125
rn: vr(22),
10126
rm: vr(8),
10127
ra: vr(10),
10128
},
10129
"E7468000A48D",
10130
"vsel %v4, %v22, %v8, %v10",
10131
));
10132
insns.push((
10133
Inst::VecSelect {
10134
rd: writable_vr(4),
10135
rn: vr(6),
10136
rm: vr(24),
10137
ra: vr(10),
10138
},
10139
"E7468000A28D",
10140
"vsel %v4, %v6, %v24, %v10",
10141
));
10142
insns.push((
10143
Inst::VecSelect {
10144
rd: writable_vr(4),
10145
rn: vr(6),
10146
rm: vr(8),
10147
ra: vr(26),
10148
},
10149
"E7468000A18D",
10150
"vsel %v4, %v6, %v8, %v26",
10151
));
10152
insns.push((
10153
Inst::VecSelect {
10154
rd: writable_vr(20),
10155
rn: vr(22),
10156
rm: vr(24),
10157
ra: vr(26),
10158
},
10159
"E7468000AF8D",
10160
"vsel %v20, %v22, %v24, %v26",
10161
));
10162
insns.push((
10163
Inst::VecPermute {
10164
rd: writable_vr(4),
10165
rn: vr(6),
10166
rm: vr(8),
10167
ra: vr(10),
10168
},
10169
"E7468000A08C",
10170
"vperm %v4, %v6, %v8, %v10",
10171
));
10172
insns.push((
10173
Inst::VecPermute {
10174
rd: writable_vr(20),
10175
rn: vr(6),
10176
rm: vr(8),
10177
ra: vr(10),
10178
},
10179
"E7468000A88C",
10180
"vperm %v20, %v6, %v8, %v10",
10181
));
10182
insns.push((
10183
Inst::VecPermute {
10184
rd: writable_vr(4),
10185
rn: vr(22),
10186
rm: vr(8),
10187
ra: vr(10),
10188
},
10189
"E7468000A48C",
10190
"vperm %v4, %v22, %v8, %v10",
10191
));
10192
insns.push((
10193
Inst::VecPermute {
10194
rd: writable_vr(4),
10195
rn: vr(6),
10196
rm: vr(24),
10197
ra: vr(10),
10198
},
10199
"E7468000A28C",
10200
"vperm %v4, %v6, %v24, %v10",
10201
));
10202
insns.push((
10203
Inst::VecPermute {
10204
rd: writable_vr(4),
10205
rn: vr(6),
10206
rm: vr(8),
10207
ra: vr(26),
10208
},
10209
"E7468000A18C",
10210
"vperm %v4, %v6, %v8, %v26",
10211
));
10212
insns.push((
10213
Inst::VecPermute {
10214
rd: writable_vr(20),
10215
rn: vr(22),
10216
rm: vr(24),
10217
ra: vr(26),
10218
},
10219
"E7468000AF8C",
10220
"vperm %v20, %v22, %v24, %v26",
10221
));
10222
insns.push((
10223
Inst::VecPermuteDWImm {
10224
rd: writable_vr(20),
10225
rn: vr(6),
10226
rm: vr(8),
10227
idx1: 0,
10228
idx2: 0,
10229
},
10230
"E74680000884",
10231
"vpdi %v20, %v6, %v8, 0",
10232
));
10233
insns.push((
10234
Inst::VecPermuteDWImm {
10235
rd: writable_vr(20),
10236
rn: vr(6),
10237
rm: vr(8),
10238
idx1: 0,
10239
idx2: 1,
10240
},
10241
"E74680001884",
10242
"vpdi %v20, %v6, %v8, 1",
10243
));
10244
insns.push((
10245
Inst::VecPermuteDWImm {
10246
rd: writable_vr(20),
10247
rn: vr(6),
10248
rm: vr(8),
10249
idx1: 1,
10250
idx2: 0,
10251
},
10252
"E74680004884",
10253
"vpdi %v20, %v6, %v8, 4",
10254
));
10255
insns.push((
10256
Inst::VecPermuteDWImm {
10257
rd: writable_vr(20),
10258
rn: vr(6),
10259
rm: vr(8),
10260
idx1: 1,
10261
idx2: 1,
10262
},
10263
"E74680005884",
10264
"vpdi %v20, %v6, %v8, 5",
10265
));
10266
10267
insns.push((
10268
Inst::VecIntCmp {
10269
op: VecIntCmpOp::CmpEq8x16,
10270
rd: writable_vr(20),
10271
rn: vr(8),
10272
rm: vr(12),
10273
},
10274
"E748C00008F8",
10275
"vceqb %v20, %v8, %v12",
10276
));
10277
insns.push((
10278
Inst::VecIntCmp {
10279
op: VecIntCmpOp::CmpEq16x8,
10280
rd: writable_vr(20),
10281
rn: vr(8),
10282
rm: vr(12),
10283
},
10284
"E748C00018F8",
10285
"vceqh %v20, %v8, %v12",
10286
));
10287
insns.push((
10288
Inst::VecIntCmp {
10289
op: VecIntCmpOp::CmpEq32x4,
10290
rd: writable_vr(20),
10291
rn: vr(8),
10292
rm: vr(12),
10293
},
10294
"E748C00028F8",
10295
"vceqf %v20, %v8, %v12",
10296
));
10297
insns.push((
10298
Inst::VecIntCmp {
10299
op: VecIntCmpOp::CmpEq64x2,
10300
rd: writable_vr(20),
10301
rn: vr(8),
10302
rm: vr(12),
10303
},
10304
"E748C00038F8",
10305
"vceqg %v20, %v8, %v12",
10306
));
10307
insns.push((
10308
Inst::VecIntCmp {
10309
op: VecIntCmpOp::CmpEq128,
10310
rd: writable_vr(20),
10311
rn: vr(8),
10312
rm: vr(12),
10313
},
10314
"E748C00048F8",
10315
"vceqq %v20, %v8, %v12",
10316
));
10317
insns.push((
10318
Inst::VecIntCmp {
10319
op: VecIntCmpOp::SCmpHi8x16,
10320
rd: writable_vr(20),
10321
rn: vr(8),
10322
rm: vr(12),
10323
},
10324
"E748C00008FB",
10325
"vchb %v20, %v8, %v12",
10326
));
10327
insns.push((
10328
Inst::VecIntCmp {
10329
op: VecIntCmpOp::SCmpHi16x8,
10330
rd: writable_vr(20),
10331
rn: vr(8),
10332
rm: vr(12),
10333
},
10334
"E748C00018FB",
10335
"vchh %v20, %v8, %v12",
10336
));
10337
insns.push((
10338
Inst::VecIntCmp {
10339
op: VecIntCmpOp::SCmpHi32x4,
10340
rd: writable_vr(20),
10341
rn: vr(8),
10342
rm: vr(12),
10343
},
10344
"E748C00028FB",
10345
"vchf %v20, %v8, %v12",
10346
));
10347
insns.push((
10348
Inst::VecIntCmp {
10349
op: VecIntCmpOp::SCmpHi64x2,
10350
rd: writable_vr(20),
10351
rn: vr(8),
10352
rm: vr(12),
10353
},
10354
"E748C00038FB",
10355
"vchg %v20, %v8, %v12",
10356
));
10357
insns.push((
10358
Inst::VecIntCmp {
10359
op: VecIntCmpOp::SCmpHi128,
10360
rd: writable_vr(20),
10361
rn: vr(8),
10362
rm: vr(12),
10363
},
10364
"E748C00048FB",
10365
"vchq %v20, %v8, %v12",
10366
));
10367
insns.push((
10368
Inst::VecIntCmp {
10369
op: VecIntCmpOp::UCmpHi8x16,
10370
rd: writable_vr(20),
10371
rn: vr(8),
10372
rm: vr(12),
10373
},
10374
"E748C00008F9",
10375
"vchlb %v20, %v8, %v12",
10376
));
10377
insns.push((
10378
Inst::VecIntCmp {
10379
op: VecIntCmpOp::UCmpHi16x8,
10380
rd: writable_vr(20),
10381
rn: vr(8),
10382
rm: vr(12),
10383
},
10384
"E748C00018F9",
10385
"vchlh %v20, %v8, %v12",
10386
));
10387
insns.push((
10388
Inst::VecIntCmp {
10389
op: VecIntCmpOp::UCmpHi32x4,
10390
rd: writable_vr(20),
10391
rn: vr(8),
10392
rm: vr(12),
10393
},
10394
"E748C00028F9",
10395
"vchlf %v20, %v8, %v12",
10396
));
10397
insns.push((
10398
Inst::VecIntCmp {
10399
op: VecIntCmpOp::UCmpHi64x2,
10400
rd: writable_vr(20),
10401
rn: vr(8),
10402
rm: vr(12),
10403
},
10404
"E748C00038F9",
10405
"vchlg %v20, %v8, %v12",
10406
));
10407
insns.push((
10408
Inst::VecIntCmp {
10409
op: VecIntCmpOp::UCmpHi128,
10410
rd: writable_vr(20),
10411
rn: vr(8),
10412
rm: vr(12),
10413
},
10414
"E748C00048F9",
10415
"vchlq %v20, %v8, %v12",
10416
));
10417
insns.push((
10418
Inst::VecIntCmpS {
10419
op: VecIntCmpOp::CmpEq8x16,
10420
rd: writable_vr(20),
10421
rn: vr(8),
10422
rm: vr(12),
10423
},
10424
"E748C01008F8",
10425
"vceqbs %v20, %v8, %v12",
10426
));
10427
insns.push((
10428
Inst::VecIntCmpS {
10429
op: VecIntCmpOp::CmpEq16x8,
10430
rd: writable_vr(20),
10431
rn: vr(8),
10432
rm: vr(12),
10433
},
10434
"E748C01018F8",
10435
"vceqhs %v20, %v8, %v12",
10436
));
10437
insns.push((
10438
Inst::VecIntCmpS {
10439
op: VecIntCmpOp::CmpEq32x4,
10440
rd: writable_vr(20),
10441
rn: vr(8),
10442
rm: vr(12),
10443
},
10444
"E748C01028F8",
10445
"vceqfs %v20, %v8, %v12",
10446
));
10447
insns.push((
10448
Inst::VecIntCmpS {
10449
op: VecIntCmpOp::CmpEq64x2,
10450
rd: writable_vr(20),
10451
rn: vr(8),
10452
rm: vr(12),
10453
},
10454
"E748C01038F8",
10455
"vceqgs %v20, %v8, %v12",
10456
));
10457
insns.push((
10458
Inst::VecIntCmpS {
10459
op: VecIntCmpOp::CmpEq128,
10460
rd: writable_vr(20),
10461
rn: vr(8),
10462
rm: vr(12),
10463
},
10464
"E748C01048F8",
10465
"vceqqs %v20, %v8, %v12",
10466
));
10467
insns.push((
10468
Inst::VecIntCmpS {
10469
op: VecIntCmpOp::SCmpHi8x16,
10470
rd: writable_vr(20),
10471
rn: vr(8),
10472
rm: vr(12),
10473
},
10474
"E748C01008FB",
10475
"vchbs %v20, %v8, %v12",
10476
));
10477
insns.push((
10478
Inst::VecIntCmpS {
10479
op: VecIntCmpOp::SCmpHi16x8,
10480
rd: writable_vr(20),
10481
rn: vr(8),
10482
rm: vr(12),
10483
},
10484
"E748C01018FB",
10485
"vchhs %v20, %v8, %v12",
10486
));
10487
insns.push((
10488
Inst::VecIntCmpS {
10489
op: VecIntCmpOp::SCmpHi32x4,
10490
rd: writable_vr(20),
10491
rn: vr(8),
10492
rm: vr(12),
10493
},
10494
"E748C01028FB",
10495
"vchfs %v20, %v8, %v12",
10496
));
10497
insns.push((
10498
Inst::VecIntCmpS {
10499
op: VecIntCmpOp::SCmpHi64x2,
10500
rd: writable_vr(20),
10501
rn: vr(8),
10502
rm: vr(12),
10503
},
10504
"E748C01038FB",
10505
"vchgs %v20, %v8, %v12",
10506
));
10507
insns.push((
10508
Inst::VecIntCmpS {
10509
op: VecIntCmpOp::SCmpHi128,
10510
rd: writable_vr(20),
10511
rn: vr(8),
10512
rm: vr(12),
10513
},
10514
"E748C01048FB",
10515
"vchqs %v20, %v8, %v12",
10516
));
10517
insns.push((
10518
Inst::VecIntCmpS {
10519
op: VecIntCmpOp::UCmpHi8x16,
10520
rd: writable_vr(20),
10521
rn: vr(8),
10522
rm: vr(12),
10523
},
10524
"E748C01008F9",
10525
"vchlbs %v20, %v8, %v12",
10526
));
10527
insns.push((
10528
Inst::VecIntCmpS {
10529
op: VecIntCmpOp::UCmpHi16x8,
10530
rd: writable_vr(20),
10531
rn: vr(8),
10532
rm: vr(12),
10533
},
10534
"E748C01018F9",
10535
"vchlhs %v20, %v8, %v12",
10536
));
10537
insns.push((
10538
Inst::VecIntCmpS {
10539
op: VecIntCmpOp::UCmpHi32x4,
10540
rd: writable_vr(20),
10541
rn: vr(8),
10542
rm: vr(12),
10543
},
10544
"E748C01028F9",
10545
"vchlfs %v20, %v8, %v12",
10546
));
10547
insns.push((
10548
Inst::VecIntCmpS {
10549
op: VecIntCmpOp::UCmpHi64x2,
10550
rd: writable_vr(20),
10551
rn: vr(8),
10552
rm: vr(12),
10553
},
10554
"E748C01038F9",
10555
"vchlgs %v20, %v8, %v12",
10556
));
10557
insns.push((
10558
Inst::VecIntCmpS {
10559
op: VecIntCmpOp::UCmpHi128,
10560
rd: writable_vr(20),
10561
rn: vr(8),
10562
rm: vr(12),
10563
},
10564
"E748C01048F9",
10565
"vchlqs %v20, %v8, %v12",
10566
));
10567
insns.push((
10568
Inst::VecIntEltCmp {
10569
op: VecIntEltCmpOp::SCmp128,
10570
rn: vr(20),
10571
rm: vr(12),
10572
},
10573
"E74C000048DB",
10574
"vecq %v20, %v12",
10575
));
10576
insns.push((
10577
Inst::VecIntEltCmp {
10578
op: VecIntEltCmpOp::UCmp128,
10579
rn: vr(20),
10580
rm: vr(12),
10581
},
10582
"E74C000048D9",
10583
"veclq %v20, %v12",
10584
));
10585
insns.push((
10586
Inst::VecEvaluate {
10587
imm: 0x02,
10588
rd: writable_vr(12),
10589
rn: vr(20),
10590
rm: vr(21),
10591
ra: vr(22),
10592
},
10593
"E7C450026788",
10594
"veval %v12, %v20, %v21, %v22, 2",
10595
));
10596
insns.push((
10597
Inst::VecBlend {
10598
rd: writable_vr(12),
10599
rn: vr(20),
10600
rm: vr(21),
10601
ra: vr(22),
10602
},
10603
"E7C450006789",
10604
"vblend %v12, %v20, %v21, %v22",
10605
));
10606
insns.push((
10607
Inst::VecInt128SCmpHi {
10608
tmp: writable_vr(20),
10609
rn: vr(8),
10610
rm: vr(12),
10611
},
10612
"E7C8000030DBA7740005E748C01038F9",
10613
"vecg %v12, %v8 ; jne 10 ; vchlgs %v20, %v8, %v12",
10614
));
10615
insns.push((
10616
Inst::VecInt128UCmpHi {
10617
tmp: writable_vr(20),
10618
rn: vr(8),
10619
rm: vr(12),
10620
},
10621
"E7C8000030D9A7740005E748C01038F9",
10622
"veclg %v12, %v8 ; jne 10 ; vchlgs %v20, %v8, %v12",
10623
));
10624
10625
insns.push((
10626
Inst::VecFloatCmp {
10627
op: VecFloatCmpOp::CmpEq32x4,
10628
rd: writable_vr(20),
10629
rn: vr(8),
10630
rm: vr(12),
10631
},
10632
"E748C00028E8",
10633
"vfcesb %v20, %v8, %v12",
10634
));
10635
insns.push((
10636
Inst::VecFloatCmp {
10637
op: VecFloatCmpOp::CmpEq64x2,
10638
rd: writable_vr(20),
10639
rn: vr(8),
10640
rm: vr(12),
10641
},
10642
"E748C00038E8",
10643
"vfcedb %v20, %v8, %v12",
10644
));
10645
insns.push((
10646
Inst::VecFloatCmp {
10647
op: VecFloatCmpOp::CmpHi32x4,
10648
rd: writable_vr(20),
10649
rn: vr(8),
10650
rm: vr(12),
10651
},
10652
"E748C00028EB",
10653
"vfchsb %v20, %v8, %v12",
10654
));
10655
insns.push((
10656
Inst::VecFloatCmp {
10657
op: VecFloatCmpOp::CmpHi64x2,
10658
rd: writable_vr(20),
10659
rn: vr(8),
10660
rm: vr(12),
10661
},
10662
"E748C00038EB",
10663
"vfchdb %v20, %v8, %v12",
10664
));
10665
insns.push((
10666
Inst::VecFloatCmp {
10667
op: VecFloatCmpOp::CmpHiEq32x4,
10668
rd: writable_vr(20),
10669
rn: vr(8),
10670
rm: vr(12),
10671
},
10672
"E748C00028EA",
10673
"vfchesb %v20, %v8, %v12",
10674
));
10675
insns.push((
10676
Inst::VecFloatCmp {
10677
op: VecFloatCmpOp::CmpHiEq64x2,
10678
rd: writable_vr(20),
10679
rn: vr(8),
10680
rm: vr(12),
10681
},
10682
"E748C00038EA",
10683
"vfchedb %v20, %v8, %v12",
10684
));
10685
insns.push((
10686
Inst::VecFloatCmpS {
10687
op: VecFloatCmpOp::CmpEq32x4,
10688
rd: writable_vr(20),
10689
rn: vr(8),
10690
rm: vr(12),
10691
},
10692
"E748C01028E8",
10693
"vfcesbs %v20, %v8, %v12",
10694
));
10695
insns.push((
10696
Inst::VecFloatCmpS {
10697
op: VecFloatCmpOp::CmpEq64x2,
10698
rd: writable_vr(20),
10699
rn: vr(8),
10700
rm: vr(12),
10701
},
10702
"E748C01038E8",
10703
"vfcedbs %v20, %v8, %v12",
10704
));
10705
insns.push((
10706
Inst::VecFloatCmpS {
10707
op: VecFloatCmpOp::CmpHi32x4,
10708
rd: writable_vr(20),
10709
rn: vr(8),
10710
rm: vr(12),
10711
},
10712
"E748C01028EB",
10713
"vfchsbs %v20, %v8, %v12",
10714
));
10715
insns.push((
10716
Inst::VecFloatCmpS {
10717
op: VecFloatCmpOp::CmpHi64x2,
10718
rd: writable_vr(20),
10719
rn: vr(8),
10720
rm: vr(12),
10721
},
10722
"E748C01038EB",
10723
"vfchdbs %v20, %v8, %v12",
10724
));
10725
insns.push((
10726
Inst::VecFloatCmpS {
10727
op: VecFloatCmpOp::CmpHiEq32x4,
10728
rd: writable_vr(20),
10729
rn: vr(8),
10730
rm: vr(12),
10731
},
10732
"E748C01028EA",
10733
"vfchesbs %v20, %v8, %v12",
10734
));
10735
insns.push((
10736
Inst::VecFloatCmpS {
10737
op: VecFloatCmpOp::CmpHiEq64x2,
10738
rd: writable_vr(20),
10739
rn: vr(8),
10740
rm: vr(12),
10741
},
10742
"E748C01038EA",
10743
"vfchedbs %v20, %v8, %v12",
10744
));
10745
10746
insns.push((
10747
Inst::VecLoad {
10748
rd: writable_vr(17),
10749
mem: MemArg::BXD12 {
10750
base: gpr(2),
10751
index: zero_reg(),
10752
disp: UImm12::zero(),
10753
flags: MemFlags::trusted(),
10754
},
10755
},
10756
"E71020000806",
10757
"vl %v17, 0(%r2)",
10758
));
10759
insns.push((
10760
Inst::VecLoad {
10761
rd: writable_vr(17),
10762
mem: MemArg::BXD12 {
10763
base: gpr(2),
10764
index: zero_reg(),
10765
disp: UImm12::maybe_from_u64(4095).unwrap(),
10766
flags: MemFlags::trusted(),
10767
},
10768
},
10769
"E7102FFF0806",
10770
"vl %v17, 4095(%r2)",
10771
));
10772
insns.push((
10773
Inst::VecLoad {
10774
rd: writable_vr(17),
10775
mem: MemArg::BXD12 {
10776
base: gpr(3),
10777
index: gpr(2),
10778
disp: UImm12::zero(),
10779
flags: MemFlags::trusted(),
10780
},
10781
},
10782
"E71230000806",
10783
"vl %v17, 0(%r2,%r3)",
10784
));
10785
insns.push((
10786
Inst::VecLoadRev {
10787
rd: writable_vr(17),
10788
mem: MemArg::BXD12 {
10789
base: gpr(2),
10790
index: zero_reg(),
10791
disp: UImm12::zero(),
10792
flags: MemFlags::trusted(),
10793
},
10794
},
10795
"E61020004806",
10796
"vlbrq %v17, 0(%r2)",
10797
));
10798
insns.push((
10799
Inst::VecLoadRev {
10800
rd: writable_vr(17),
10801
mem: MemArg::BXD12 {
10802
base: gpr(2),
10803
index: zero_reg(),
10804
disp: UImm12::maybe_from_u64(4095).unwrap(),
10805
flags: MemFlags::trusted(),
10806
},
10807
},
10808
"E6102FFF4806",
10809
"vlbrq %v17, 4095(%r2)",
10810
));
10811
insns.push((
10812
Inst::VecLoadRev {
10813
rd: writable_vr(17),
10814
mem: MemArg::BXD12 {
10815
base: gpr(3),
10816
index: gpr(2),
10817
disp: UImm12::zero(),
10818
flags: MemFlags::trusted(),
10819
},
10820
},
10821
"E61230004806",
10822
"vlbrq %v17, 0(%r2,%r3)",
10823
));
10824
insns.push((
10825
Inst::VecLoadByte16Rev {
10826
rd: writable_vr(17),
10827
mem: MemArg::BXD12 {
10828
base: gpr(2),
10829
index: zero_reg(),
10830
disp: UImm12::zero(),
10831
flags: MemFlags::trusted(),
10832
},
10833
},
10834
"E61020001806",
10835
"vlbrh %v17, 0(%r2)",
10836
));
10837
insns.push((
10838
Inst::VecLoadByte16Rev {
10839
rd: writable_vr(17),
10840
mem: MemArg::BXD12 {
10841
base: gpr(2),
10842
index: zero_reg(),
10843
disp: UImm12::maybe_from_u64(4095).unwrap(),
10844
flags: MemFlags::trusted(),
10845
},
10846
},
10847
"E6102FFF1806",
10848
"vlbrh %v17, 4095(%r2)",
10849
));
10850
insns.push((
10851
Inst::VecLoadByte16Rev {
10852
rd: writable_vr(17),
10853
mem: MemArg::BXD12 {
10854
base: gpr(3),
10855
index: gpr(2),
10856
disp: UImm12::zero(),
10857
flags: MemFlags::trusted(),
10858
},
10859
},
10860
"E61230001806",
10861
"vlbrh %v17, 0(%r2,%r3)",
10862
));
10863
insns.push((
10864
Inst::VecLoadByte32Rev {
10865
rd: writable_vr(17),
10866
mem: MemArg::BXD12 {
10867
base: gpr(2),
10868
index: zero_reg(),
10869
disp: UImm12::zero(),
10870
flags: MemFlags::trusted(),
10871
},
10872
},
10873
"E61020002806",
10874
"vlbrf %v17, 0(%r2)",
10875
));
10876
insns.push((
10877
Inst::VecLoadByte32Rev {
10878
rd: writable_vr(17),
10879
mem: MemArg::BXD12 {
10880
base: gpr(2),
10881
index: zero_reg(),
10882
disp: UImm12::maybe_from_u64(4095).unwrap(),
10883
flags: MemFlags::trusted(),
10884
},
10885
},
10886
"E6102FFF2806",
10887
"vlbrf %v17, 4095(%r2)",
10888
));
10889
insns.push((
10890
Inst::VecLoadByte32Rev {
10891
rd: writable_vr(17),
10892
mem: MemArg::BXD12 {
10893
base: gpr(3),
10894
index: gpr(2),
10895
disp: UImm12::zero(),
10896
flags: MemFlags::trusted(),
10897
},
10898
},
10899
"E61230002806",
10900
"vlbrf %v17, 0(%r2,%r3)",
10901
));
10902
insns.push((
10903
Inst::VecLoadByte64Rev {
10904
rd: writable_vr(17),
10905
mem: MemArg::BXD12 {
10906
base: gpr(2),
10907
index: zero_reg(),
10908
disp: UImm12::zero(),
10909
flags: MemFlags::trusted(),
10910
},
10911
},
10912
"E61020003806",
10913
"vlbrg %v17, 0(%r2)",
10914
));
10915
insns.push((
10916
Inst::VecLoadByte64Rev {
10917
rd: writable_vr(17),
10918
mem: MemArg::BXD12 {
10919
base: gpr(2),
10920
index: zero_reg(),
10921
disp: UImm12::maybe_from_u64(4095).unwrap(),
10922
flags: MemFlags::trusted(),
10923
},
10924
},
10925
"E6102FFF3806",
10926
"vlbrg %v17, 4095(%r2)",
10927
));
10928
insns.push((
10929
Inst::VecLoadByte64Rev {
10930
rd: writable_vr(17),
10931
mem: MemArg::BXD12 {
10932
base: gpr(3),
10933
index: gpr(2),
10934
disp: UImm12::zero(),
10935
flags: MemFlags::trusted(),
10936
},
10937
},
10938
"E61230003806",
10939
"vlbrg %v17, 0(%r2,%r3)",
10940
));
10941
insns.push((
10942
Inst::VecLoadElt16Rev {
10943
rd: writable_vr(17),
10944
mem: MemArg::BXD12 {
10945
base: gpr(2),
10946
index: zero_reg(),
10947
disp: UImm12::zero(),
10948
flags: MemFlags::trusted(),
10949
},
10950
},
10951
"E61020001807",
10952
"vlerh %v17, 0(%r2)",
10953
));
10954
insns.push((
10955
Inst::VecLoadElt16Rev {
10956
rd: writable_vr(17),
10957
mem: MemArg::BXD12 {
10958
base: gpr(2),
10959
index: zero_reg(),
10960
disp: UImm12::maybe_from_u64(4095).unwrap(),
10961
flags: MemFlags::trusted(),
10962
},
10963
},
10964
"E6102FFF1807",
10965
"vlerh %v17, 4095(%r2)",
10966
));
10967
insns.push((
10968
Inst::VecLoadElt16Rev {
10969
rd: writable_vr(17),
10970
mem: MemArg::BXD12 {
10971
base: gpr(3),
10972
index: gpr(2),
10973
disp: UImm12::zero(),
10974
flags: MemFlags::trusted(),
10975
},
10976
},
10977
"E61230001807",
10978
"vlerh %v17, 0(%r2,%r3)",
10979
));
10980
insns.push((
10981
Inst::VecLoadElt32Rev {
10982
rd: writable_vr(17),
10983
mem: MemArg::BXD12 {
10984
base: gpr(2),
10985
index: zero_reg(),
10986
disp: UImm12::zero(),
10987
flags: MemFlags::trusted(),
10988
},
10989
},
10990
"E61020002807",
10991
"vlerf %v17, 0(%r2)",
10992
));
10993
insns.push((
10994
Inst::VecLoadElt32Rev {
10995
rd: writable_vr(17),
10996
mem: MemArg::BXD12 {
10997
base: gpr(2),
10998
index: zero_reg(),
10999
disp: UImm12::maybe_from_u64(4095).unwrap(),
11000
flags: MemFlags::trusted(),
11001
},
11002
},
11003
"E6102FFF2807",
11004
"vlerf %v17, 4095(%r2)",
11005
));
11006
insns.push((
11007
Inst::VecLoadElt32Rev {
11008
rd: writable_vr(17),
11009
mem: MemArg::BXD12 {
11010
base: gpr(3),
11011
index: gpr(2),
11012
disp: UImm12::zero(),
11013
flags: MemFlags::trusted(),
11014
},
11015
},
11016
"E61230002807",
11017
"vlerf %v17, 0(%r2,%r3)",
11018
));
11019
insns.push((
11020
Inst::VecLoadElt64Rev {
11021
rd: writable_vr(17),
11022
mem: MemArg::BXD12 {
11023
base: gpr(2),
11024
index: zero_reg(),
11025
disp: UImm12::zero(),
11026
flags: MemFlags::trusted(),
11027
},
11028
},
11029
"E61020003807",
11030
"vlerg %v17, 0(%r2)",
11031
));
11032
insns.push((
11033
Inst::VecLoadElt64Rev {
11034
rd: writable_vr(17),
11035
mem: MemArg::BXD12 {
11036
base: gpr(2),
11037
index: zero_reg(),
11038
disp: UImm12::maybe_from_u64(4095).unwrap(),
11039
flags: MemFlags::trusted(),
11040
},
11041
},
11042
"E6102FFF3807",
11043
"vlerg %v17, 4095(%r2)",
11044
));
11045
insns.push((
11046
Inst::VecLoadElt64Rev {
11047
rd: writable_vr(17),
11048
mem: MemArg::BXD12 {
11049
base: gpr(3),
11050
index: gpr(2),
11051
disp: UImm12::zero(),
11052
flags: MemFlags::trusted(),
11053
},
11054
},
11055
"E61230003807",
11056
"vlerg %v17, 0(%r2,%r3)",
11057
));
11058
insns.push((
11059
Inst::VecStore {
11060
rd: vr(17),
11061
mem: MemArg::BXD12 {
11062
base: gpr(2),
11063
index: zero_reg(),
11064
disp: UImm12::zero(),
11065
flags: MemFlags::trusted(),
11066
},
11067
},
11068
"E7102000080E",
11069
"vst %v17, 0(%r2)",
11070
));
11071
insns.push((
11072
Inst::VecStore {
11073
rd: vr(17),
11074
mem: MemArg::BXD12 {
11075
base: gpr(2),
11076
index: zero_reg(),
11077
disp: UImm12::maybe_from_u64(4095).unwrap(),
11078
flags: MemFlags::trusted(),
11079
},
11080
},
11081
"E7102FFF080E",
11082
"vst %v17, 4095(%r2)",
11083
));
11084
insns.push((
11085
Inst::VecStore {
11086
rd: vr(17),
11087
mem: MemArg::BXD12 {
11088
base: gpr(3),
11089
index: gpr(2),
11090
disp: UImm12::zero(),
11091
flags: MemFlags::trusted(),
11092
},
11093
},
11094
"E7123000080E",
11095
"vst %v17, 0(%r2,%r3)",
11096
));
11097
insns.push((
11098
Inst::VecStoreRev {
11099
rd: vr(17),
11100
mem: MemArg::BXD12 {
11101
base: gpr(2),
11102
index: zero_reg(),
11103
disp: UImm12::zero(),
11104
flags: MemFlags::trusted(),
11105
},
11106
},
11107
"E6102000480E",
11108
"vstbrq %v17, 0(%r2)",
11109
));
11110
insns.push((
11111
Inst::VecStoreRev {
11112
rd: vr(17),
11113
mem: MemArg::BXD12 {
11114
base: gpr(2),
11115
index: zero_reg(),
11116
disp: UImm12::maybe_from_u64(4095).unwrap(),
11117
flags: MemFlags::trusted(),
11118
},
11119
},
11120
"E6102FFF480E",
11121
"vstbrq %v17, 4095(%r2)",
11122
));
11123
insns.push((
11124
Inst::VecStoreRev {
11125
rd: vr(17),
11126
mem: MemArg::BXD12 {
11127
base: gpr(3),
11128
index: gpr(2),
11129
disp: UImm12::zero(),
11130
flags: MemFlags::trusted(),
11131
},
11132
},
11133
"E6123000480E",
11134
"vstbrq %v17, 0(%r2,%r3)",
11135
));
11136
insns.push((
11137
Inst::VecStoreByte16Rev {
11138
rd: vr(17),
11139
mem: MemArg::BXD12 {
11140
base: gpr(2),
11141
index: zero_reg(),
11142
disp: UImm12::zero(),
11143
flags: MemFlags::trusted(),
11144
},
11145
},
11146
"E6102000180E",
11147
"vstbrh %v17, 0(%r2)",
11148
));
11149
insns.push((
11150
Inst::VecStoreByte16Rev {
11151
rd: vr(17),
11152
mem: MemArg::BXD12 {
11153
base: gpr(2),
11154
index: zero_reg(),
11155
disp: UImm12::maybe_from_u64(4095).unwrap(),
11156
flags: MemFlags::trusted(),
11157
},
11158
},
11159
"E6102FFF180E",
11160
"vstbrh %v17, 4095(%r2)",
11161
));
11162
insns.push((
11163
Inst::VecStoreByte16Rev {
11164
rd: vr(17),
11165
mem: MemArg::BXD12 {
11166
base: gpr(3),
11167
index: gpr(2),
11168
disp: UImm12::zero(),
11169
flags: MemFlags::trusted(),
11170
},
11171
},
11172
"E6123000180E",
11173
"vstbrh %v17, 0(%r2,%r3)",
11174
));
11175
insns.push((
11176
Inst::VecStoreByte32Rev {
11177
rd: vr(17),
11178
mem: MemArg::BXD12 {
11179
base: gpr(2),
11180
index: zero_reg(),
11181
disp: UImm12::zero(),
11182
flags: MemFlags::trusted(),
11183
},
11184
},
11185
"E6102000280E",
11186
"vstbrf %v17, 0(%r2)",
11187
));
11188
insns.push((
11189
Inst::VecStoreByte32Rev {
11190
rd: vr(17),
11191
mem: MemArg::BXD12 {
11192
base: gpr(2),
11193
index: zero_reg(),
11194
disp: UImm12::maybe_from_u64(4095).unwrap(),
11195
flags: MemFlags::trusted(),
11196
},
11197
},
11198
"E6102FFF280E",
11199
"vstbrf %v17, 4095(%r2)",
11200
));
11201
insns.push((
11202
Inst::VecStoreByte32Rev {
11203
rd: vr(17),
11204
mem: MemArg::BXD12 {
11205
base: gpr(3),
11206
index: gpr(2),
11207
disp: UImm12::zero(),
11208
flags: MemFlags::trusted(),
11209
},
11210
},
11211
"E6123000280E",
11212
"vstbrf %v17, 0(%r2,%r3)",
11213
));
11214
insns.push((
11215
Inst::VecStoreByte64Rev {
11216
rd: vr(17),
11217
mem: MemArg::BXD12 {
11218
base: gpr(2),
11219
index: zero_reg(),
11220
disp: UImm12::zero(),
11221
flags: MemFlags::trusted(),
11222
},
11223
},
11224
"E6102000380E",
11225
"vstbrg %v17, 0(%r2)",
11226
));
11227
insns.push((
11228
Inst::VecStoreByte64Rev {
11229
rd: vr(17),
11230
mem: MemArg::BXD12 {
11231
base: gpr(2),
11232
index: zero_reg(),
11233
disp: UImm12::maybe_from_u64(4095).unwrap(),
11234
flags: MemFlags::trusted(),
11235
},
11236
},
11237
"E6102FFF380E",
11238
"vstbrg %v17, 4095(%r2)",
11239
));
11240
insns.push((
11241
Inst::VecStoreByte64Rev {
11242
rd: vr(17),
11243
mem: MemArg::BXD12 {
11244
base: gpr(3),
11245
index: gpr(2),
11246
disp: UImm12::zero(),
11247
flags: MemFlags::trusted(),
11248
},
11249
},
11250
"E6123000380E",
11251
"vstbrg %v17, 0(%r2,%r3)",
11252
));
11253
insns.push((
11254
Inst::VecStoreElt16Rev {
11255
rd: vr(17),
11256
mem: MemArg::BXD12 {
11257
base: gpr(2),
11258
index: zero_reg(),
11259
disp: UImm12::zero(),
11260
flags: MemFlags::trusted(),
11261
},
11262
},
11263
"E6102000180F",
11264
"vsterh %v17, 0(%r2)",
11265
));
11266
insns.push((
11267
Inst::VecStoreElt16Rev {
11268
rd: vr(17),
11269
mem: MemArg::BXD12 {
11270
base: gpr(2),
11271
index: zero_reg(),
11272
disp: UImm12::maybe_from_u64(4095).unwrap(),
11273
flags: MemFlags::trusted(),
11274
},
11275
},
11276
"E6102FFF180F",
11277
"vsterh %v17, 4095(%r2)",
11278
));
11279
insns.push((
11280
Inst::VecStoreElt16Rev {
11281
rd: vr(17),
11282
mem: MemArg::BXD12 {
11283
base: gpr(3),
11284
index: gpr(2),
11285
disp: UImm12::zero(),
11286
flags: MemFlags::trusted(),
11287
},
11288
},
11289
"E6123000180F",
11290
"vsterh %v17, 0(%r2,%r3)",
11291
));
11292
insns.push((
11293
Inst::VecStoreElt32Rev {
11294
rd: vr(17),
11295
mem: MemArg::BXD12 {
11296
base: gpr(2),
11297
index: zero_reg(),
11298
disp: UImm12::zero(),
11299
flags: MemFlags::trusted(),
11300
},
11301
},
11302
"E6102000280F",
11303
"vsterf %v17, 0(%r2)",
11304
));
11305
insns.push((
11306
Inst::VecStoreElt32Rev {
11307
rd: vr(17),
11308
mem: MemArg::BXD12 {
11309
base: gpr(2),
11310
index: zero_reg(),
11311
disp: UImm12::maybe_from_u64(4095).unwrap(),
11312
flags: MemFlags::trusted(),
11313
},
11314
},
11315
"E6102FFF280F",
11316
"vsterf %v17, 4095(%r2)",
11317
));
11318
insns.push((
11319
Inst::VecStoreElt32Rev {
11320
rd: vr(17),
11321
mem: MemArg::BXD12 {
11322
base: gpr(3),
11323
index: gpr(2),
11324
disp: UImm12::zero(),
11325
flags: MemFlags::trusted(),
11326
},
11327
},
11328
"E6123000280F",
11329
"vsterf %v17, 0(%r2,%r3)",
11330
));
11331
insns.push((
11332
Inst::VecStoreElt64Rev {
11333
rd: vr(17),
11334
mem: MemArg::BXD12 {
11335
base: gpr(2),
11336
index: zero_reg(),
11337
disp: UImm12::zero(),
11338
flags: MemFlags::trusted(),
11339
},
11340
},
11341
"E6102000380F",
11342
"vsterg %v17, 0(%r2)",
11343
));
11344
insns.push((
11345
Inst::VecStoreElt64Rev {
11346
rd: vr(17),
11347
mem: MemArg::BXD12 {
11348
base: gpr(2),
11349
index: zero_reg(),
11350
disp: UImm12::maybe_from_u64(4095).unwrap(),
11351
flags: MemFlags::trusted(),
11352
},
11353
},
11354
"E6102FFF380F",
11355
"vsterg %v17, 4095(%r2)",
11356
));
11357
insns.push((
11358
Inst::VecStoreElt64Rev {
11359
rd: vr(17),
11360
mem: MemArg::BXD12 {
11361
base: gpr(3),
11362
index: gpr(2),
11363
disp: UImm12::zero(),
11364
flags: MemFlags::trusted(),
11365
},
11366
},
11367
"E6123000380F",
11368
"vsterg %v17, 0(%r2,%r3)",
11369
));
11370
insns.push((
11371
Inst::VecLoadReplicate {
11372
size: 8,
11373
rd: writable_vr(17),
11374
mem: MemArg::BXD12 {
11375
base: gpr(2),
11376
index: zero_reg(),
11377
disp: UImm12::maybe_from_u64(128).unwrap(),
11378
flags: MemFlags::trusted(),
11379
},
11380
},
11381
"E71020800805",
11382
"vlrepb %v17, 128(%r2)",
11383
));
11384
insns.push((
11385
Inst::VecLoadReplicate {
11386
size: 16,
11387
rd: writable_vr(17),
11388
mem: MemArg::BXD12 {
11389
base: gpr(2),
11390
index: zero_reg(),
11391
disp: UImm12::maybe_from_u64(128).unwrap(),
11392
flags: MemFlags::trusted(),
11393
},
11394
},
11395
"E71020801805",
11396
"vlreph %v17, 128(%r2)",
11397
));
11398
insns.push((
11399
Inst::VecLoadReplicate {
11400
size: 32,
11401
rd: writable_vr(17),
11402
mem: MemArg::BXD12 {
11403
base: gpr(2),
11404
index: zero_reg(),
11405
disp: UImm12::maybe_from_u64(128).unwrap(),
11406
flags: MemFlags::trusted(),
11407
},
11408
},
11409
"E71020802805",
11410
"vlrepf %v17, 128(%r2)",
11411
));
11412
insns.push((
11413
Inst::VecLoadReplicate {
11414
size: 64,
11415
rd: writable_vr(17),
11416
mem: MemArg::BXD12 {
11417
base: gpr(2),
11418
index: zero_reg(),
11419
disp: UImm12::maybe_from_u64(128).unwrap(),
11420
flags: MemFlags::trusted(),
11421
},
11422
},
11423
"E71020803805",
11424
"vlrepg %v17, 128(%r2)",
11425
));
11426
insns.push((
11427
Inst::VecLoadReplicateRev {
11428
size: 16,
11429
rd: writable_vr(17),
11430
mem: MemArg::BXD12 {
11431
base: gpr(2),
11432
index: zero_reg(),
11433
disp: UImm12::maybe_from_u64(128).unwrap(),
11434
flags: MemFlags::trusted(),
11435
},
11436
},
11437
"E61020801805",
11438
"vlbrreph %v17, 128(%r2)",
11439
));
11440
insns.push((
11441
Inst::VecLoadReplicateRev {
11442
size: 32,
11443
rd: writable_vr(17),
11444
mem: MemArg::BXD12 {
11445
base: gpr(2),
11446
index: zero_reg(),
11447
disp: UImm12::maybe_from_u64(128).unwrap(),
11448
flags: MemFlags::trusted(),
11449
},
11450
},
11451
"E61020802805",
11452
"vlbrrepf %v17, 128(%r2)",
11453
));
11454
insns.push((
11455
Inst::VecLoadReplicateRev {
11456
size: 64,
11457
rd: writable_vr(17),
11458
mem: MemArg::BXD12 {
11459
base: gpr(2),
11460
index: zero_reg(),
11461
disp: UImm12::maybe_from_u64(128).unwrap(),
11462
flags: MemFlags::trusted(),
11463
},
11464
},
11465
"E61020803805",
11466
"vlbrrepg %v17, 128(%r2)",
11467
));
11468
11469
insns.push((
11470
Inst::VecMov {
11471
rd: writable_vr(8),
11472
rn: vr(20),
11473
},
11474
"E78400000456",
11475
"vlr %v8, %v20",
11476
));
11477
insns.push((
11478
Inst::VecCMov {
11479
rd: writable_vr(8),
11480
ri: vr(8),
11481
rm: vr(20),
11482
cond: Cond::from_mask(1),
11483
},
11484
"A7E40005E78400000456",
11485
"jno 10 ; vlr %v8, %v20",
11486
));
11487
insns.push((
11488
Inst::MovToVec128 {
11489
rd: writable_vr(20),
11490
rn: gpr(5),
11491
rm: gpr(6),
11492
},
11493
"E74560000862",
11494
"vlvgp %v20, %r5, %r6",
11495
));
11496
11497
insns.push((
11498
Inst::VecImmByteMask {
11499
rd: writable_vr(20),
11500
mask: 0x1234,
11501
},
11502
"E74012340844",
11503
"vgbm %v20, 4660",
11504
));
11505
insns.push((
11506
Inst::VecImmBitMask {
11507
size: 8,
11508
rd: writable_vr(20),
11509
start_bit: 1,
11510
end_bit: 7,
11511
},
11512
"E74001070846",
11513
"vgmb %v20, 1, 7",
11514
));
11515
insns.push((
11516
Inst::VecImmBitMask {
11517
size: 16,
11518
rd: writable_vr(20),
11519
start_bit: 1,
11520
end_bit: 7,
11521
},
11522
"E74001071846",
11523
"vgmh %v20, 1, 7",
11524
));
11525
insns.push((
11526
Inst::VecImmBitMask {
11527
size: 32,
11528
rd: writable_vr(20),
11529
start_bit: 1,
11530
end_bit: 7,
11531
},
11532
"E74001072846",
11533
"vgmf %v20, 1, 7",
11534
));
11535
insns.push((
11536
Inst::VecImmBitMask {
11537
size: 64,
11538
rd: writable_vr(20),
11539
start_bit: 1,
11540
end_bit: 7,
11541
},
11542
"E74001073846",
11543
"vgmg %v20, 1, 7",
11544
));
11545
insns.push((
11546
Inst::VecImmReplicate {
11547
size: 8,
11548
rd: writable_vr(20),
11549
imm: 0x1234,
11550
},
11551
"E74012340845",
11552
"vrepib %v20, 4660",
11553
));
11554
insns.push((
11555
Inst::VecImmReplicate {
11556
size: 16,
11557
rd: writable_vr(20),
11558
imm: 0x1234,
11559
},
11560
"E74012341845",
11561
"vrepih %v20, 4660",
11562
));
11563
insns.push((
11564
Inst::VecImmReplicate {
11565
size: 32,
11566
rd: writable_vr(20),
11567
imm: 0x1234,
11568
},
11569
"E74012342845",
11570
"vrepif %v20, 4660",
11571
));
11572
insns.push((
11573
Inst::VecImmReplicate {
11574
size: 64,
11575
rd: writable_vr(20),
11576
imm: 0x1234,
11577
},
11578
"E74012343845",
11579
"vrepig %v20, 4660",
11580
));
11581
11582
insns.push((
11583
Inst::VecLoadLane {
11584
size: 8,
11585
rd: writable_vr(17),
11586
ri: vr(17),
11587
mem: MemArg::BXD12 {
11588
base: gpr(2),
11589
index: zero_reg(),
11590
disp: UImm12::zero(),
11591
flags: MemFlags::trusted(),
11592
},
11593
lane_imm: 15,
11594
},
11595
"E7102000F800",
11596
"vleb %v17, 0(%r2), 15",
11597
));
11598
insns.push((
11599
Inst::VecLoadLane {
11600
size: 8,
11601
rd: writable_vr(17),
11602
ri: vr(17),
11603
mem: MemArg::BXD12 {
11604
base: gpr(2),
11605
index: zero_reg(),
11606
disp: UImm12::maybe_from_u64(4095).unwrap(),
11607
flags: MemFlags::trusted(),
11608
},
11609
lane_imm: 0,
11610
},
11611
"E7102FFF0800",
11612
"vleb %v17, 4095(%r2), 0",
11613
));
11614
insns.push((
11615
Inst::VecLoadLane {
11616
size: 8,
11617
rd: writable_vr(17),
11618
ri: vr(17),
11619
mem: MemArg::BXD12 {
11620
base: gpr(3),
11621
index: gpr(2),
11622
disp: UImm12::zero(),
11623
flags: MemFlags::trusted(),
11624
},
11625
lane_imm: 15,
11626
},
11627
"E7123000F800",
11628
"vleb %v17, 0(%r2,%r3), 15",
11629
));
11630
insns.push((
11631
Inst::VecLoadLane {
11632
size: 8,
11633
rd: writable_vr(17),
11634
ri: vr(17),
11635
mem: MemArg::BXD12 {
11636
base: gpr(3),
11637
index: gpr(2),
11638
disp: UImm12::maybe_from_u64(4095).unwrap(),
11639
flags: MemFlags::trusted(),
11640
},
11641
lane_imm: 0,
11642
},
11643
"E7123FFF0800",
11644
"vleb %v17, 4095(%r2,%r3), 0",
11645
));
11646
insns.push((
11647
Inst::VecLoadLane {
11648
size: 16,
11649
rd: writable_vr(17),
11650
ri: vr(17),
11651
mem: MemArg::BXD12 {
11652
base: gpr(2),
11653
index: zero_reg(),
11654
disp: UImm12::zero(),
11655
flags: MemFlags::trusted(),
11656
},
11657
lane_imm: 7,
11658
},
11659
"E71020007801",
11660
"vleh %v17, 0(%r2), 7",
11661
));
11662
insns.push((
11663
Inst::VecLoadLane {
11664
size: 16,
11665
rd: writable_vr(17),
11666
ri: vr(17),
11667
mem: MemArg::BXD12 {
11668
base: gpr(2),
11669
index: zero_reg(),
11670
disp: UImm12::maybe_from_u64(4095).unwrap(),
11671
flags: MemFlags::trusted(),
11672
},
11673
lane_imm: 0,
11674
},
11675
"E7102FFF0801",
11676
"vleh %v17, 4095(%r2), 0",
11677
));
11678
insns.push((
11679
Inst::VecLoadLane {
11680
size: 16,
11681
rd: writable_vr(17),
11682
ri: vr(17),
11683
mem: MemArg::BXD12 {
11684
base: gpr(3),
11685
index: gpr(2),
11686
disp: UImm12::zero(),
11687
flags: MemFlags::trusted(),
11688
},
11689
lane_imm: 7,
11690
},
11691
"E71230007801",
11692
"vleh %v17, 0(%r2,%r3), 7",
11693
));
11694
insns.push((
11695
Inst::VecLoadLane {
11696
size: 16,
11697
rd: writable_vr(17),
11698
ri: vr(17),
11699
mem: MemArg::BXD12 {
11700
base: gpr(3),
11701
index: gpr(2),
11702
disp: UImm12::maybe_from_u64(4095).unwrap(),
11703
flags: MemFlags::trusted(),
11704
},
11705
lane_imm: 0,
11706
},
11707
"E7123FFF0801",
11708
"vleh %v17, 4095(%r2,%r3), 0",
11709
));
11710
insns.push((
11711
Inst::VecLoadLane {
11712
size: 32,
11713
rd: writable_vr(17),
11714
ri: vr(17),
11715
mem: MemArg::BXD12 {
11716
base: gpr(2),
11717
index: zero_reg(),
11718
disp: UImm12::zero(),
11719
flags: MemFlags::trusted(),
11720
},
11721
lane_imm: 3,
11722
},
11723
"E71020003803",
11724
"vlef %v17, 0(%r2), 3",
11725
));
11726
insns.push((
11727
Inst::VecLoadLane {
11728
size: 32,
11729
rd: writable_vr(17),
11730
ri: vr(17),
11731
mem: MemArg::BXD12 {
11732
base: gpr(2),
11733
index: zero_reg(),
11734
disp: UImm12::maybe_from_u64(4095).unwrap(),
11735
flags: MemFlags::trusted(),
11736
},
11737
lane_imm: 0,
11738
},
11739
"E7102FFF0803",
11740
"vlef %v17, 4095(%r2), 0",
11741
));
11742
insns.push((
11743
Inst::VecLoadLane {
11744
size: 32,
11745
rd: writable_vr(17),
11746
ri: vr(17),
11747
mem: MemArg::BXD12 {
11748
base: gpr(3),
11749
index: gpr(2),
11750
disp: UImm12::zero(),
11751
flags: MemFlags::trusted(),
11752
},
11753
lane_imm: 3,
11754
},
11755
"E71230003803",
11756
"vlef %v17, 0(%r2,%r3), 3",
11757
));
11758
insns.push((
11759
Inst::VecLoadLane {
11760
size: 32,
11761
rd: writable_vr(17),
11762
ri: vr(17),
11763
mem: MemArg::BXD12 {
11764
base: gpr(3),
11765
index: gpr(2),
11766
disp: UImm12::maybe_from_u64(4095).unwrap(),
11767
flags: MemFlags::trusted(),
11768
},
11769
lane_imm: 0,
11770
},
11771
"E7123FFF0803",
11772
"vlef %v17, 4095(%r2,%r3), 0",
11773
));
11774
insns.push((
11775
Inst::VecLoadLane {
11776
size: 64,
11777
rd: writable_vr(17),
11778
ri: vr(17),
11779
mem: MemArg::BXD12 {
11780
base: gpr(2),
11781
index: zero_reg(),
11782
disp: UImm12::zero(),
11783
flags: MemFlags::trusted(),
11784
},
11785
lane_imm: 1,
11786
},
11787
"E71020001802",
11788
"vleg %v17, 0(%r2), 1",
11789
));
11790
insns.push((
11791
Inst::VecLoadLane {
11792
size: 64,
11793
rd: writable_vr(17),
11794
ri: vr(17),
11795
mem: MemArg::BXD12 {
11796
base: gpr(2),
11797
index: zero_reg(),
11798
disp: UImm12::maybe_from_u64(4095).unwrap(),
11799
flags: MemFlags::trusted(),
11800
},
11801
lane_imm: 0,
11802
},
11803
"E7102FFF0802",
11804
"vleg %v17, 4095(%r2), 0",
11805
));
11806
insns.push((
11807
Inst::VecLoadLane {
11808
size: 64,
11809
rd: writable_vr(17),
11810
ri: vr(17),
11811
mem: MemArg::BXD12 {
11812
base: gpr(3),
11813
index: gpr(2),
11814
disp: UImm12::zero(),
11815
flags: MemFlags::trusted(),
11816
},
11817
lane_imm: 1,
11818
},
11819
"E71230001802",
11820
"vleg %v17, 0(%r2,%r3), 1",
11821
));
11822
insns.push((
11823
Inst::VecLoadLane {
11824
size: 64,
11825
rd: writable_vr(17),
11826
ri: vr(17),
11827
mem: MemArg::BXD12 {
11828
base: gpr(3),
11829
index: gpr(2),
11830
disp: UImm12::maybe_from_u64(4095).unwrap(),
11831
flags: MemFlags::trusted(),
11832
},
11833
lane_imm: 0,
11834
},
11835
"E7123FFF0802",
11836
"vleg %v17, 4095(%r2,%r3), 0",
11837
));
11838
insns.push((
11839
Inst::VecLoadLaneUndef {
11840
size: 32,
11841
rd: writable_vr(1),
11842
mem: MemArg::BXD12 {
11843
base: gpr(2),
11844
index: zero_reg(),
11845
disp: UImm12::zero(),
11846
flags: MemFlags::trusted(),
11847
},
11848
lane_imm: 0,
11849
},
11850
"78102000",
11851
"le %f1, 0(%r2)",
11852
));
11853
insns.push((
11854
Inst::VecLoadLaneUndef {
11855
size: 32,
11856
rd: writable_vr(1),
11857
mem: MemArg::BXD12 {
11858
base: gpr(2),
11859
index: zero_reg(),
11860
disp: UImm12::maybe_from_u64(4095).unwrap(),
11861
flags: MemFlags::trusted(),
11862
},
11863
lane_imm: 0,
11864
},
11865
"78102FFF",
11866
"le %f1, 4095(%r2)",
11867
));
11868
insns.push((
11869
Inst::VecLoadLaneUndef {
11870
size: 32,
11871
rd: writable_vr(1),
11872
mem: MemArg::BXD20 {
11873
base: gpr(2),
11874
index: zero_reg(),
11875
disp: SImm20::maybe_from_i64(-524288).unwrap(),
11876
flags: MemFlags::trusted(),
11877
},
11878
lane_imm: 0,
11879
},
11880
"ED1020008064",
11881
"ley %f1, -524288(%r2)",
11882
));
11883
insns.push((
11884
Inst::VecLoadLaneUndef {
11885
size: 32,
11886
rd: writable_vr(1),
11887
mem: MemArg::BXD20 {
11888
base: gpr(2),
11889
index: zero_reg(),
11890
disp: SImm20::maybe_from_i64(524287).unwrap(),
11891
flags: MemFlags::trusted(),
11892
},
11893
lane_imm: 0,
11894
},
11895
"ED102FFF7F64",
11896
"ley %f1, 524287(%r2)",
11897
));
11898
insns.push((
11899
Inst::VecLoadLaneUndef {
11900
size: 32,
11901
rd: writable_vr(17),
11902
mem: MemArg::BXD12 {
11903
base: gpr(2),
11904
index: zero_reg(),
11905
disp: UImm12::zero(),
11906
flags: MemFlags::trusted(),
11907
},
11908
lane_imm: 0,
11909
},
11910
"E71020000803",
11911
"vlef %v17, 0(%r2), 0",
11912
));
11913
insns.push((
11914
Inst::VecLoadLaneUndef {
11915
size: 32,
11916
rd: writable_vr(17),
11917
mem: MemArg::BXD12 {
11918
base: gpr(2),
11919
index: zero_reg(),
11920
disp: UImm12::maybe_from_u64(4095).unwrap(),
11921
flags: MemFlags::trusted(),
11922
},
11923
lane_imm: 0,
11924
},
11925
"E7102FFF0803",
11926
"vlef %v17, 4095(%r2), 0",
11927
));
11928
insns.push((
11929
Inst::VecLoadLaneUndef {
11930
size: 32,
11931
rd: writable_vr(1),
11932
mem: MemArg::BXD12 {
11933
base: gpr(3),
11934
index: gpr(2),
11935
disp: UImm12::zero(),
11936
flags: MemFlags::trusted(),
11937
},
11938
lane_imm: 0,
11939
},
11940
"78123000",
11941
"le %f1, 0(%r2,%r3)",
11942
));
11943
insns.push((
11944
Inst::VecLoadLaneUndef {
11945
size: 32,
11946
rd: writable_vr(1),
11947
mem: MemArg::BXD12 {
11948
base: gpr(3),
11949
index: gpr(2),
11950
disp: UImm12::maybe_from_u64(4095).unwrap(),
11951
flags: MemFlags::trusted(),
11952
},
11953
lane_imm: 0,
11954
},
11955
"78123FFF",
11956
"le %f1, 4095(%r2,%r3)",
11957
));
11958
insns.push((
11959
Inst::VecLoadLaneUndef {
11960
size: 32,
11961
rd: writable_vr(1),
11962
mem: MemArg::BXD20 {
11963
base: gpr(3),
11964
index: gpr(2),
11965
disp: SImm20::maybe_from_i64(-524288).unwrap(),
11966
flags: MemFlags::trusted(),
11967
},
11968
lane_imm: 0,
11969
},
11970
"ED1230008064",
11971
"ley %f1, -524288(%r2,%r3)",
11972
));
11973
insns.push((
11974
Inst::VecLoadLaneUndef {
11975
size: 32,
11976
rd: writable_vr(1),
11977
mem: MemArg::BXD20 {
11978
base: gpr(3),
11979
index: gpr(2),
11980
disp: SImm20::maybe_from_i64(524287).unwrap(),
11981
flags: MemFlags::trusted(),
11982
},
11983
lane_imm: 0,
11984
},
11985
"ED123FFF7F64",
11986
"ley %f1, 524287(%r2,%r3)",
11987
));
11988
insns.push((
11989
Inst::VecLoadLaneUndef {
11990
size: 32,
11991
rd: writable_vr(17),
11992
mem: MemArg::BXD12 {
11993
base: gpr(3),
11994
index: gpr(2),
11995
disp: UImm12::zero(),
11996
flags: MemFlags::trusted(),
11997
},
11998
lane_imm: 0,
11999
},
12000
"E71230000803",
12001
"vlef %v17, 0(%r2,%r3), 0",
12002
));
12003
insns.push((
12004
Inst::VecLoadLaneUndef {
12005
size: 32,
12006
rd: writable_vr(17),
12007
mem: MemArg::BXD12 {
12008
base: gpr(3),
12009
index: gpr(2),
12010
disp: UImm12::maybe_from_u64(4095).unwrap(),
12011
flags: MemFlags::trusted(),
12012
},
12013
lane_imm: 0,
12014
},
12015
"E7123FFF0803",
12016
"vlef %v17, 4095(%r2,%r3), 0",
12017
));
12018
insns.push((
12019
Inst::VecLoadLaneUndef {
12020
size: 64,
12021
rd: writable_vr(1),
12022
mem: MemArg::BXD12 {
12023
base: gpr(2),
12024
index: zero_reg(),
12025
disp: UImm12::zero(),
12026
flags: MemFlags::trusted(),
12027
},
12028
lane_imm: 0,
12029
},
12030
"68102000",
12031
"ld %f1, 0(%r2)",
12032
));
12033
insns.push((
12034
Inst::VecLoadLaneUndef {
12035
size: 64,
12036
rd: writable_vr(1),
12037
mem: MemArg::BXD12 {
12038
base: gpr(2),
12039
index: zero_reg(),
12040
disp: UImm12::maybe_from_u64(4095).unwrap(),
12041
flags: MemFlags::trusted(),
12042
},
12043
lane_imm: 0,
12044
},
12045
"68102FFF",
12046
"ld %f1, 4095(%r2)",
12047
));
12048
insns.push((
12049
Inst::VecLoadLaneUndef {
12050
size: 64,
12051
rd: writable_vr(1),
12052
mem: MemArg::BXD20 {
12053
base: gpr(2),
12054
index: zero_reg(),
12055
disp: SImm20::maybe_from_i64(-524288).unwrap(),
12056
flags: MemFlags::trusted(),
12057
},
12058
lane_imm: 0,
12059
},
12060
"ED1020008065",
12061
"ldy %f1, -524288(%r2)",
12062
));
12063
insns.push((
12064
Inst::VecLoadLaneUndef {
12065
size: 64,
12066
rd: writable_vr(1),
12067
mem: MemArg::BXD20 {
12068
base: gpr(2),
12069
index: zero_reg(),
12070
disp: SImm20::maybe_from_i64(524287).unwrap(),
12071
flags: MemFlags::trusted(),
12072
},
12073
lane_imm: 0,
12074
},
12075
"ED102FFF7F65",
12076
"ldy %f1, 524287(%r2)",
12077
));
12078
insns.push((
12079
Inst::VecLoadLaneUndef {
12080
size: 64,
12081
rd: writable_vr(17),
12082
mem: MemArg::BXD12 {
12083
base: gpr(2),
12084
index: zero_reg(),
12085
disp: UImm12::zero(),
12086
flags: MemFlags::trusted(),
12087
},
12088
lane_imm: 0,
12089
},
12090
"E71020000802",
12091
"vleg %v17, 0(%r2), 0",
12092
));
12093
insns.push((
12094
Inst::VecLoadLaneUndef {
12095
size: 64,
12096
rd: writable_vr(17),
12097
mem: MemArg::BXD12 {
12098
base: gpr(2),
12099
index: zero_reg(),
12100
disp: UImm12::maybe_from_u64(4095).unwrap(),
12101
flags: MemFlags::trusted(),
12102
},
12103
lane_imm: 0,
12104
},
12105
"E7102FFF0802",
12106
"vleg %v17, 4095(%r2), 0",
12107
));
12108
insns.push((
12109
Inst::VecLoadLaneUndef {
12110
size: 64,
12111
rd: writable_vr(1),
12112
mem: MemArg::BXD12 {
12113
base: gpr(3),
12114
index: gpr(2),
12115
disp: UImm12::zero(),
12116
flags: MemFlags::trusted(),
12117
},
12118
lane_imm: 0,
12119
},
12120
"68123000",
12121
"ld %f1, 0(%r2,%r3)",
12122
));
12123
insns.push((
12124
Inst::VecLoadLaneUndef {
12125
size: 64,
12126
rd: writable_vr(1),
12127
mem: MemArg::BXD12 {
12128
base: gpr(3),
12129
index: gpr(2),
12130
disp: UImm12::maybe_from_u64(4095).unwrap(),
12131
flags: MemFlags::trusted(),
12132
},
12133
lane_imm: 0,
12134
},
12135
"68123FFF",
12136
"ld %f1, 4095(%r2,%r3)",
12137
));
12138
insns.push((
12139
Inst::VecLoadLaneUndef {
12140
size: 64,
12141
rd: writable_vr(1),
12142
mem: MemArg::BXD20 {
12143
base: gpr(3),
12144
index: gpr(2),
12145
disp: SImm20::maybe_from_i64(-524288).unwrap(),
12146
flags: MemFlags::trusted(),
12147
},
12148
lane_imm: 0,
12149
},
12150
"ED1230008065",
12151
"ldy %f1, -524288(%r2,%r3)",
12152
));
12153
insns.push((
12154
Inst::VecLoadLaneUndef {
12155
size: 64,
12156
rd: writable_vr(1),
12157
mem: MemArg::BXD20 {
12158
base: gpr(3),
12159
index: gpr(2),
12160
disp: SImm20::maybe_from_i64(524287).unwrap(),
12161
flags: MemFlags::trusted(),
12162
},
12163
lane_imm: 0,
12164
},
12165
"ED123FFF7F65",
12166
"ldy %f1, 524287(%r2,%r3)",
12167
));
12168
insns.push((
12169
Inst::VecLoadLaneUndef {
12170
size: 64,
12171
rd: writable_vr(17),
12172
mem: MemArg::BXD12 {
12173
base: gpr(3),
12174
index: gpr(2),
12175
disp: UImm12::zero(),
12176
flags: MemFlags::trusted(),
12177
},
12178
lane_imm: 0,
12179
},
12180
"E71230000802",
12181
"vleg %v17, 0(%r2,%r3), 0",
12182
));
12183
insns.push((
12184
Inst::VecLoadLaneUndef {
12185
size: 64,
12186
rd: writable_vr(17),
12187
mem: MemArg::BXD12 {
12188
base: gpr(3),
12189
index: gpr(2),
12190
disp: UImm12::maybe_from_u64(4095).unwrap(),
12191
flags: MemFlags::trusted(),
12192
},
12193
lane_imm: 0,
12194
},
12195
"E7123FFF0802",
12196
"vleg %v17, 4095(%r2,%r3), 0",
12197
));
12198
insns.push((
12199
Inst::VecStoreLane {
12200
size: 8,
12201
rd: vr(17),
12202
mem: MemArg::BXD12 {
12203
base: gpr(2),
12204
index: zero_reg(),
12205
disp: UImm12::zero(),
12206
flags: MemFlags::trusted(),
12207
},
12208
lane_imm: 15,
12209
},
12210
"E7102000F808",
12211
"vsteb %v17, 0(%r2), 15",
12212
));
12213
insns.push((
12214
Inst::VecStoreLane {
12215
size: 8,
12216
rd: vr(17),
12217
mem: MemArg::BXD12 {
12218
base: gpr(2),
12219
index: zero_reg(),
12220
disp: UImm12::maybe_from_u64(4095).unwrap(),
12221
flags: MemFlags::trusted(),
12222
},
12223
lane_imm: 0,
12224
},
12225
"E7102FFF0808",
12226
"vsteb %v17, 4095(%r2), 0",
12227
));
12228
insns.push((
12229
Inst::VecStoreLane {
12230
size: 8,
12231
rd: vr(17),
12232
mem: MemArg::BXD12 {
12233
base: gpr(3),
12234
index: gpr(2),
12235
disp: UImm12::zero(),
12236
flags: MemFlags::trusted(),
12237
},
12238
lane_imm: 15,
12239
},
12240
"E7123000F808",
12241
"vsteb %v17, 0(%r2,%r3), 15",
12242
));
12243
insns.push((
12244
Inst::VecStoreLane {
12245
size: 8,
12246
rd: vr(17),
12247
mem: MemArg::BXD12 {
12248
base: gpr(3),
12249
index: gpr(2),
12250
disp: UImm12::maybe_from_u64(4095).unwrap(),
12251
flags: MemFlags::trusted(),
12252
},
12253
lane_imm: 0,
12254
},
12255
"E7123FFF0808",
12256
"vsteb %v17, 4095(%r2,%r3), 0",
12257
));
12258
insns.push((
12259
Inst::VecStoreLane {
12260
size: 16,
12261
rd: vr(17),
12262
mem: MemArg::BXD12 {
12263
base: gpr(2),
12264
index: zero_reg(),
12265
disp: UImm12::zero(),
12266
flags: MemFlags::trusted(),
12267
},
12268
lane_imm: 7,
12269
},
12270
"E71020007809",
12271
"vsteh %v17, 0(%r2), 7",
12272
));
12273
insns.push((
12274
Inst::VecStoreLane {
12275
size: 16,
12276
rd: vr(17),
12277
mem: MemArg::BXD12 {
12278
base: gpr(2),
12279
index: zero_reg(),
12280
disp: UImm12::maybe_from_u64(4095).unwrap(),
12281
flags: MemFlags::trusted(),
12282
},
12283
lane_imm: 0,
12284
},
12285
"E7102FFF0809",
12286
"vsteh %v17, 4095(%r2), 0",
12287
));
12288
insns.push((
12289
Inst::VecStoreLane {
12290
size: 16,
12291
rd: vr(17),
12292
mem: MemArg::BXD12 {
12293
base: gpr(3),
12294
index: gpr(2),
12295
disp: UImm12::zero(),
12296
flags: MemFlags::trusted(),
12297
},
12298
lane_imm: 7,
12299
},
12300
"E71230007809",
12301
"vsteh %v17, 0(%r2,%r3), 7",
12302
));
12303
insns.push((
12304
Inst::VecStoreLane {
12305
size: 16,
12306
rd: vr(17),
12307
mem: MemArg::BXD12 {
12308
base: gpr(3),
12309
index: gpr(2),
12310
disp: UImm12::maybe_from_u64(4095).unwrap(),
12311
flags: MemFlags::trusted(),
12312
},
12313
lane_imm: 0,
12314
},
12315
"E7123FFF0809",
12316
"vsteh %v17, 4095(%r2,%r3), 0",
12317
));
12318
insns.push((
12319
Inst::VecStoreLane {
12320
size: 32,
12321
rd: vr(1),
12322
mem: MemArg::BXD12 {
12323
base: gpr(2),
12324
index: zero_reg(),
12325
disp: UImm12::zero(),
12326
flags: MemFlags::trusted(),
12327
},
12328
lane_imm: 0,
12329
},
12330
"70102000",
12331
"ste %f1, 0(%r2)",
12332
));
12333
insns.push((
12334
Inst::VecStoreLane {
12335
size: 32,
12336
rd: vr(1),
12337
mem: MemArg::BXD12 {
12338
base: gpr(2),
12339
index: zero_reg(),
12340
disp: UImm12::maybe_from_u64(4095).unwrap(),
12341
flags: MemFlags::trusted(),
12342
},
12343
lane_imm: 0,
12344
},
12345
"70102FFF",
12346
"ste %f1, 4095(%r2)",
12347
));
12348
insns.push((
12349
Inst::VecStoreLane {
12350
size: 32,
12351
rd: vr(1),
12352
mem: MemArg::BXD20 {
12353
base: gpr(2),
12354
index: zero_reg(),
12355
disp: SImm20::maybe_from_i64(-524288).unwrap(),
12356
flags: MemFlags::trusted(),
12357
},
12358
lane_imm: 0,
12359
},
12360
"ED1020008066",
12361
"stey %f1, -524288(%r2)",
12362
));
12363
insns.push((
12364
Inst::VecStoreLane {
12365
size: 32,
12366
rd: vr(1),
12367
mem: MemArg::BXD20 {
12368
base: gpr(2),
12369
index: zero_reg(),
12370
disp: SImm20::maybe_from_i64(524287).unwrap(),
12371
flags: MemFlags::trusted(),
12372
},
12373
lane_imm: 0,
12374
},
12375
"ED102FFF7F66",
12376
"stey %f1, 524287(%r2)",
12377
));
12378
insns.push((
12379
Inst::VecStoreLane {
12380
size: 32,
12381
rd: vr(17),
12382
mem: MemArg::BXD12 {
12383
base: gpr(2),
12384
index: zero_reg(),
12385
disp: UImm12::zero(),
12386
flags: MemFlags::trusted(),
12387
},
12388
lane_imm: 0,
12389
},
12390
"E7102000080B",
12391
"vstef %v17, 0(%r2), 0",
12392
));
12393
insns.push((
12394
Inst::VecStoreLane {
12395
size: 32,
12396
rd: vr(17),
12397
mem: MemArg::BXD12 {
12398
base: gpr(2),
12399
index: zero_reg(),
12400
disp: UImm12::maybe_from_u64(4095).unwrap(),
12401
flags: MemFlags::trusted(),
12402
},
12403
lane_imm: 0,
12404
},
12405
"E7102FFF080B",
12406
"vstef %v17, 4095(%r2), 0",
12407
));
12408
insns.push((
12409
Inst::VecStoreLane {
12410
size: 32,
12411
rd: vr(1),
12412
mem: MemArg::BXD12 {
12413
base: gpr(3),
12414
index: gpr(2),
12415
disp: UImm12::zero(),
12416
flags: MemFlags::trusted(),
12417
},
12418
lane_imm: 0,
12419
},
12420
"70123000",
12421
"ste %f1, 0(%r2,%r3)",
12422
));
12423
insns.push((
12424
Inst::VecStoreLane {
12425
size: 32,
12426
rd: vr(1),
12427
mem: MemArg::BXD12 {
12428
base: gpr(3),
12429
index: gpr(2),
12430
disp: UImm12::maybe_from_u64(4095).unwrap(),
12431
flags: MemFlags::trusted(),
12432
},
12433
lane_imm: 0,
12434
},
12435
"70123FFF",
12436
"ste %f1, 4095(%r2,%r3)",
12437
));
12438
insns.push((
12439
Inst::VecStoreLane {
12440
size: 32,
12441
rd: vr(1),
12442
mem: MemArg::BXD20 {
12443
base: gpr(3),
12444
index: gpr(2),
12445
disp: SImm20::maybe_from_i64(-524288).unwrap(),
12446
flags: MemFlags::trusted(),
12447
},
12448
lane_imm: 0,
12449
},
12450
"ED1230008066",
12451
"stey %f1, -524288(%r2,%r3)",
12452
));
12453
insns.push((
12454
Inst::VecStoreLane {
12455
size: 32,
12456
rd: vr(1),
12457
mem: MemArg::BXD20 {
12458
base: gpr(3),
12459
index: gpr(2),
12460
disp: SImm20::maybe_from_i64(524287).unwrap(),
12461
flags: MemFlags::trusted(),
12462
},
12463
lane_imm: 0,
12464
},
12465
"ED123FFF7F66",
12466
"stey %f1, 524287(%r2,%r3)",
12467
));
12468
insns.push((
12469
Inst::VecStoreLane {
12470
size: 32,
12471
rd: vr(17),
12472
mem: MemArg::BXD12 {
12473
base: gpr(3),
12474
index: gpr(2),
12475
disp: UImm12::zero(),
12476
flags: MemFlags::trusted(),
12477
},
12478
lane_imm: 0,
12479
},
12480
"E7123000080B",
12481
"vstef %v17, 0(%r2,%r3), 0",
12482
));
12483
insns.push((
12484
Inst::VecStoreLane {
12485
size: 32,
12486
rd: vr(17),
12487
mem: MemArg::BXD12 {
12488
base: gpr(3),
12489
index: gpr(2),
12490
disp: UImm12::maybe_from_u64(4095).unwrap(),
12491
flags: MemFlags::trusted(),
12492
},
12493
lane_imm: 0,
12494
},
12495
"E7123FFF080B",
12496
"vstef %v17, 4095(%r2,%r3), 0",
12497
));
12498
insns.push((
12499
Inst::VecStoreLane {
12500
size: 64,
12501
rd: vr(1),
12502
mem: MemArg::BXD12 {
12503
base: gpr(2),
12504
index: zero_reg(),
12505
disp: UImm12::zero(),
12506
flags: MemFlags::trusted(),
12507
},
12508
lane_imm: 0,
12509
},
12510
"60102000",
12511
"std %f1, 0(%r2)",
12512
));
12513
insns.push((
12514
Inst::VecStoreLane {
12515
size: 64,
12516
rd: vr(1),
12517
mem: MemArg::BXD12 {
12518
base: gpr(2),
12519
index: zero_reg(),
12520
disp: UImm12::maybe_from_u64(4095).unwrap(),
12521
flags: MemFlags::trusted(),
12522
},
12523
lane_imm: 0,
12524
},
12525
"60102FFF",
12526
"std %f1, 4095(%r2)",
12527
));
12528
insns.push((
12529
Inst::VecStoreLane {
12530
size: 64,
12531
rd: vr(1),
12532
mem: MemArg::BXD20 {
12533
base: gpr(2),
12534
index: zero_reg(),
12535
disp: SImm20::maybe_from_i64(-524288).unwrap(),
12536
flags: MemFlags::trusted(),
12537
},
12538
lane_imm: 0,
12539
},
12540
"ED1020008067",
12541
"stdy %f1, -524288(%r2)",
12542
));
12543
insns.push((
12544
Inst::VecStoreLane {
12545
size: 64,
12546
rd: vr(1),
12547
mem: MemArg::BXD20 {
12548
base: gpr(2),
12549
index: zero_reg(),
12550
disp: SImm20::maybe_from_i64(524287).unwrap(),
12551
flags: MemFlags::trusted(),
12552
},
12553
lane_imm: 0,
12554
},
12555
"ED102FFF7F67",
12556
"stdy %f1, 524287(%r2)",
12557
));
12558
insns.push((
12559
Inst::VecStoreLane {
12560
size: 64,
12561
rd: vr(17),
12562
mem: MemArg::BXD12 {
12563
base: gpr(2),
12564
index: zero_reg(),
12565
disp: UImm12::zero(),
12566
flags: MemFlags::trusted(),
12567
},
12568
lane_imm: 0,
12569
},
12570
"E7102000080A",
12571
"vsteg %v17, 0(%r2), 0",
12572
));
12573
insns.push((
12574
Inst::VecStoreLane {
12575
size: 64,
12576
rd: vr(17),
12577
mem: MemArg::BXD12 {
12578
base: gpr(2),
12579
index: zero_reg(),
12580
disp: UImm12::maybe_from_u64(4095).unwrap(),
12581
flags: MemFlags::trusted(),
12582
},
12583
lane_imm: 0,
12584
},
12585
"E7102FFF080A",
12586
"vsteg %v17, 4095(%r2), 0",
12587
));
12588
insns.push((
12589
Inst::VecStoreLane {
12590
size: 64,
12591
rd: vr(1),
12592
mem: MemArg::BXD12 {
12593
base: gpr(3),
12594
index: gpr(2),
12595
disp: UImm12::zero(),
12596
flags: MemFlags::trusted(),
12597
},
12598
lane_imm: 0,
12599
},
12600
"60123000",
12601
"std %f1, 0(%r2,%r3)",
12602
));
12603
insns.push((
12604
Inst::VecStoreLane {
12605
size: 64,
12606
rd: vr(1),
12607
mem: MemArg::BXD12 {
12608
base: gpr(3),
12609
index: gpr(2),
12610
disp: UImm12::maybe_from_u64(4095).unwrap(),
12611
flags: MemFlags::trusted(),
12612
},
12613
lane_imm: 0,
12614
},
12615
"60123FFF",
12616
"std %f1, 4095(%r2,%r3)",
12617
));
12618
insns.push((
12619
Inst::VecStoreLane {
12620
size: 64,
12621
rd: vr(1),
12622
mem: MemArg::BXD20 {
12623
base: gpr(3),
12624
index: gpr(2),
12625
disp: SImm20::maybe_from_i64(-524288).unwrap(),
12626
flags: MemFlags::trusted(),
12627
},
12628
lane_imm: 0,
12629
},
12630
"ED1230008067",
12631
"stdy %f1, -524288(%r2,%r3)",
12632
));
12633
insns.push((
12634
Inst::VecStoreLane {
12635
size: 64,
12636
rd: vr(1),
12637
mem: MemArg::BXD20 {
12638
base: gpr(3),
12639
index: gpr(2),
12640
disp: SImm20::maybe_from_i64(524287).unwrap(),
12641
flags: MemFlags::trusted(),
12642
},
12643
lane_imm: 0,
12644
},
12645
"ED123FFF7F67",
12646
"stdy %f1, 524287(%r2,%r3)",
12647
));
12648
insns.push((
12649
Inst::VecStoreLane {
12650
size: 64,
12651
rd: vr(17),
12652
mem: MemArg::BXD12 {
12653
base: gpr(3),
12654
index: gpr(2),
12655
disp: UImm12::zero(),
12656
flags: MemFlags::trusted(),
12657
},
12658
lane_imm: 0,
12659
},
12660
"E7123000080A",
12661
"vsteg %v17, 0(%r2,%r3), 0",
12662
));
12663
insns.push((
12664
Inst::VecStoreLane {
12665
size: 64,
12666
rd: vr(17),
12667
mem: MemArg::BXD12 {
12668
base: gpr(3),
12669
index: gpr(2),
12670
disp: UImm12::maybe_from_u64(4095).unwrap(),
12671
flags: MemFlags::trusted(),
12672
},
12673
lane_imm: 0,
12674
},
12675
"E7123FFF080A",
12676
"vsteg %v17, 4095(%r2,%r3), 0",
12677
));
12678
insns.push((
12679
Inst::VecLoadLaneRev {
12680
size: 16,
12681
rd: writable_vr(1),
12682
ri: vr(1),
12683
mem: MemArg::BXD12 {
12684
base: gpr(2),
12685
index: zero_reg(),
12686
disp: UImm12::zero(),
12687
flags: MemFlags::trusted(),
12688
},
12689
lane_imm: 0,
12690
},
12691
"E61020000001",
12692
"vlebrh %v1, 0(%r2), 0",
12693
));
12694
insns.push((
12695
Inst::VecLoadLaneRev {
12696
size: 16,
12697
rd: writable_vr(1),
12698
ri: vr(1),
12699
mem: MemArg::BXD12 {
12700
base: gpr(2),
12701
index: zero_reg(),
12702
disp: UImm12::maybe_from_u64(4095).unwrap(),
12703
flags: MemFlags::trusted(),
12704
},
12705
lane_imm: 0,
12706
},
12707
"E6102FFF0001",
12708
"vlebrh %v1, 4095(%r2), 0",
12709
));
12710
insns.push((
12711
Inst::VecLoadLaneRev {
12712
size: 16,
12713
rd: writable_vr(1),
12714
ri: vr(1),
12715
mem: MemArg::BXD12 {
12716
base: gpr(3),
12717
index: gpr(2),
12718
disp: UImm12::zero(),
12719
flags: MemFlags::trusted(),
12720
},
12721
lane_imm: 0,
12722
},
12723
"E61230000001",
12724
"vlebrh %v1, 0(%r2,%r3), 0",
12725
));
12726
insns.push((
12727
Inst::VecLoadLaneRev {
12728
size: 16,
12729
rd: writable_vr(1),
12730
ri: vr(1),
12731
mem: MemArg::BXD12 {
12732
base: gpr(3),
12733
index: gpr(2),
12734
disp: UImm12::maybe_from_u64(4095).unwrap(),
12735
flags: MemFlags::trusted(),
12736
},
12737
lane_imm: 0,
12738
},
12739
"E6123FFF0001",
12740
"vlebrh %v1, 4095(%r2,%r3), 0",
12741
));
12742
insns.push((
12743
Inst::VecLoadLaneRev {
12744
size: 32,
12745
rd: writable_vr(1),
12746
ri: vr(1),
12747
mem: MemArg::BXD12 {
12748
base: gpr(2),
12749
index: zero_reg(),
12750
disp: UImm12::zero(),
12751
flags: MemFlags::trusted(),
12752
},
12753
lane_imm: 0,
12754
},
12755
"E61020000003",
12756
"vlebrf %v1, 0(%r2), 0",
12757
));
12758
insns.push((
12759
Inst::VecLoadLaneRev {
12760
size: 32,
12761
rd: writable_vr(1),
12762
ri: vr(1),
12763
mem: MemArg::BXD12 {
12764
base: gpr(2),
12765
index: zero_reg(),
12766
disp: UImm12::maybe_from_u64(4095).unwrap(),
12767
flags: MemFlags::trusted(),
12768
},
12769
lane_imm: 0,
12770
},
12771
"E6102FFF0003",
12772
"vlebrf %v1, 4095(%r2), 0",
12773
));
12774
insns.push((
12775
Inst::VecLoadLaneRev {
12776
size: 32,
12777
rd: writable_vr(1),
12778
ri: vr(1),
12779
mem: MemArg::BXD12 {
12780
base: gpr(3),
12781
index: gpr(2),
12782
disp: UImm12::zero(),
12783
flags: MemFlags::trusted(),
12784
},
12785
lane_imm: 0,
12786
},
12787
"E61230000003",
12788
"vlebrf %v1, 0(%r2,%r3), 0",
12789
));
12790
insns.push((
12791
Inst::VecLoadLaneRev {
12792
size: 32,
12793
rd: writable_vr(1),
12794
ri: vr(1),
12795
mem: MemArg::BXD12 {
12796
base: gpr(3),
12797
index: gpr(2),
12798
disp: UImm12::maybe_from_u64(4095).unwrap(),
12799
flags: MemFlags::trusted(),
12800
},
12801
lane_imm: 0,
12802
},
12803
"E6123FFF0003",
12804
"vlebrf %v1, 4095(%r2,%r3), 0",
12805
));
12806
insns.push((
12807
Inst::VecLoadLaneRev {
12808
size: 64,
12809
rd: writable_vr(1),
12810
ri: vr(1),
12811
mem: MemArg::BXD12 {
12812
base: gpr(2),
12813
index: zero_reg(),
12814
disp: UImm12::zero(),
12815
flags: MemFlags::trusted(),
12816
},
12817
lane_imm: 0,
12818
},
12819
"E61020000002",
12820
"vlebrg %v1, 0(%r2), 0",
12821
));
12822
insns.push((
12823
Inst::VecLoadLaneRev {
12824
size: 64,
12825
rd: writable_vr(1),
12826
ri: vr(1),
12827
mem: MemArg::BXD12 {
12828
base: gpr(2),
12829
index: zero_reg(),
12830
disp: UImm12::maybe_from_u64(4095).unwrap(),
12831
flags: MemFlags::trusted(),
12832
},
12833
lane_imm: 0,
12834
},
12835
"E6102FFF0002",
12836
"vlebrg %v1, 4095(%r2), 0",
12837
));
12838
insns.push((
12839
Inst::VecLoadLaneRev {
12840
size: 64,
12841
rd: writable_vr(1),
12842
ri: vr(1),
12843
mem: MemArg::BXD12 {
12844
base: gpr(3),
12845
index: gpr(2),
12846
disp: UImm12::zero(),
12847
flags: MemFlags::trusted(),
12848
},
12849
lane_imm: 0,
12850
},
12851
"E61230000002",
12852
"vlebrg %v1, 0(%r2,%r3), 0",
12853
));
12854
insns.push((
12855
Inst::VecLoadLaneRev {
12856
size: 64,
12857
rd: writable_vr(1),
12858
ri: vr(1),
12859
mem: MemArg::BXD12 {
12860
base: gpr(3),
12861
index: gpr(2),
12862
disp: UImm12::maybe_from_u64(4095).unwrap(),
12863
flags: MemFlags::trusted(),
12864
},
12865
lane_imm: 0,
12866
},
12867
"E6123FFF0002",
12868
"vlebrg %v1, 4095(%r2,%r3), 0",
12869
));
12870
insns.push((
12871
Inst::VecLoadLaneRevUndef {
12872
size: 32,
12873
rd: writable_vr(1),
12874
mem: MemArg::BXD12 {
12875
base: gpr(2),
12876
index: zero_reg(),
12877
disp: UImm12::zero(),
12878
flags: MemFlags::trusted(),
12879
},
12880
lane_imm: 0,
12881
},
12882
"E61020000003",
12883
"vlebrf %v1, 0(%r2), 0",
12884
));
12885
insns.push((
12886
Inst::VecLoadLaneRevUndef {
12887
size: 32,
12888
rd: writable_vr(1),
12889
mem: MemArg::BXD12 {
12890
base: gpr(2),
12891
index: zero_reg(),
12892
disp: UImm12::maybe_from_u64(4095).unwrap(),
12893
flags: MemFlags::trusted(),
12894
},
12895
lane_imm: 0,
12896
},
12897
"E6102FFF0003",
12898
"vlebrf %v1, 4095(%r2), 0",
12899
));
12900
insns.push((
12901
Inst::VecLoadLaneRevUndef {
12902
size: 32,
12903
rd: writable_vr(1),
12904
mem: MemArg::BXD20 {
12905
base: gpr(2),
12906
index: zero_reg(),
12907
disp: SImm20::maybe_from_i64(-524288).unwrap(),
12908
flags: MemFlags::trusted(),
12909
},
12910
lane_imm: 0,
12911
},
12912
"E31020008071E61010000003",
12913
"lay %r1, -524288(%r2) ; vlebrf %v1, 0(%r1), 0",
12914
));
12915
insns.push((
12916
Inst::VecLoadLaneRevUndef {
12917
size: 32,
12918
rd: writable_vr(1),
12919
mem: MemArg::BXD20 {
12920
base: gpr(2),
12921
index: zero_reg(),
12922
disp: SImm20::maybe_from_i64(524287).unwrap(),
12923
flags: MemFlags::trusted(),
12924
},
12925
lane_imm: 0,
12926
},
12927
"E3102FFF7F71E61010000003",
12928
"lay %r1, 524287(%r2) ; vlebrf %v1, 0(%r1), 0",
12929
));
12930
insns.push((
12931
Inst::VecLoadLaneRevUndef {
12932
size: 32,
12933
rd: writable_vr(1),
12934
mem: MemArg::BXD12 {
12935
base: gpr(3),
12936
index: gpr(2),
12937
disp: UImm12::zero(),
12938
flags: MemFlags::trusted(),
12939
},
12940
lane_imm: 0,
12941
},
12942
"E61230000003",
12943
"vlebrf %v1, 0(%r2,%r3), 0",
12944
));
12945
insns.push((
12946
Inst::VecLoadLaneRevUndef {
12947
size: 32,
12948
rd: writable_vr(1),
12949
mem: MemArg::BXD12 {
12950
base: gpr(3),
12951
index: gpr(2),
12952
disp: UImm12::maybe_from_u64(4095).unwrap(),
12953
flags: MemFlags::trusted(),
12954
},
12955
lane_imm: 0,
12956
},
12957
"E6123FFF0003",
12958
"vlebrf %v1, 4095(%r2,%r3), 0",
12959
));
12960
insns.push((
12961
Inst::VecLoadLaneRevUndef {
12962
size: 32,
12963
rd: writable_vr(1),
12964
mem: MemArg::BXD20 {
12965
base: gpr(3),
12966
index: gpr(2),
12967
disp: SImm20::maybe_from_i64(-524288).unwrap(),
12968
flags: MemFlags::trusted(),
12969
},
12970
lane_imm: 0,
12971
},
12972
"E31230008071E61010000003",
12973
"lay %r1, -524288(%r2,%r3) ; vlebrf %v1, 0(%r1), 0",
12974
));
12975
insns.push((
12976
Inst::VecLoadLaneRevUndef {
12977
size: 32,
12978
rd: writable_vr(1),
12979
mem: MemArg::BXD20 {
12980
base: gpr(3),
12981
index: gpr(2),
12982
disp: SImm20::maybe_from_i64(524287).unwrap(),
12983
flags: MemFlags::trusted(),
12984
},
12985
lane_imm: 0,
12986
},
12987
"E3123FFF7F71E61010000003",
12988
"lay %r1, 524287(%r2,%r3) ; vlebrf %v1, 0(%r1), 0",
12989
));
12990
insns.push((
12991
Inst::VecLoadLaneRevUndef {
12992
size: 64,
12993
rd: writable_vr(1),
12994
mem: MemArg::BXD12 {
12995
base: gpr(2),
12996
index: zero_reg(),
12997
disp: UImm12::zero(),
12998
flags: MemFlags::trusted(),
12999
},
13000
lane_imm: 0,
13001
},
13002
"E61020000002",
13003
"vlebrg %v1, 0(%r2), 0",
13004
));
13005
insns.push((
13006
Inst::VecLoadLaneRevUndef {
13007
size: 64,
13008
rd: writable_vr(1),
13009
mem: MemArg::BXD12 {
13010
base: gpr(2),
13011
index: zero_reg(),
13012
disp: UImm12::maybe_from_u64(4095).unwrap(),
13013
flags: MemFlags::trusted(),
13014
},
13015
lane_imm: 0,
13016
},
13017
"E6102FFF0002",
13018
"vlebrg %v1, 4095(%r2), 0",
13019
));
13020
insns.push((
13021
Inst::VecLoadLaneRevUndef {
13022
size: 64,
13023
rd: writable_vr(1),
13024
mem: MemArg::BXD20 {
13025
base: gpr(2),
13026
index: zero_reg(),
13027
disp: SImm20::maybe_from_i64(-524288).unwrap(),
13028
flags: MemFlags::trusted(),
13029
},
13030
lane_imm: 0,
13031
},
13032
"E31020008071E61010000002",
13033
"lay %r1, -524288(%r2) ; vlebrg %v1, 0(%r1), 0",
13034
));
13035
insns.push((
13036
Inst::VecLoadLaneRevUndef {
13037
size: 64,
13038
rd: writable_vr(1),
13039
mem: MemArg::BXD20 {
13040
base: gpr(2),
13041
index: zero_reg(),
13042
disp: SImm20::maybe_from_i64(524287).unwrap(),
13043
flags: MemFlags::trusted(),
13044
},
13045
lane_imm: 0,
13046
},
13047
"E3102FFF7F71E61010000002",
13048
"lay %r1, 524287(%r2) ; vlebrg %v1, 0(%r1), 0",
13049
));
13050
insns.push((
13051
Inst::VecLoadLaneRevUndef {
13052
size: 64,
13053
rd: writable_vr(1),
13054
mem: MemArg::BXD12 {
13055
base: gpr(3),
13056
index: gpr(2),
13057
disp: UImm12::zero(),
13058
flags: MemFlags::trusted(),
13059
},
13060
lane_imm: 0,
13061
},
13062
"E61230000002",
13063
"vlebrg %v1, 0(%r2,%r3), 0",
13064
));
13065
insns.push((
13066
Inst::VecLoadLaneRevUndef {
13067
size: 64,
13068
rd: writable_vr(1),
13069
mem: MemArg::BXD12 {
13070
base: gpr(3),
13071
index: gpr(2),
13072
disp: UImm12::maybe_from_u64(4095).unwrap(),
13073
flags: MemFlags::trusted(),
13074
},
13075
lane_imm: 0,
13076
},
13077
"E6123FFF0002",
13078
"vlebrg %v1, 4095(%r2,%r3), 0",
13079
));
13080
insns.push((
13081
Inst::VecLoadLaneRevUndef {
13082
size: 64,
13083
rd: writable_vr(1),
13084
mem: MemArg::BXD20 {
13085
base: gpr(3),
13086
index: gpr(2),
13087
disp: SImm20::maybe_from_i64(-524288).unwrap(),
13088
flags: MemFlags::trusted(),
13089
},
13090
lane_imm: 0,
13091
},
13092
"E31230008071E61010000002",
13093
"lay %r1, -524288(%r2,%r3) ; vlebrg %v1, 0(%r1), 0",
13094
));
13095
insns.push((
13096
Inst::VecLoadLaneRevUndef {
13097
size: 64,
13098
rd: writable_vr(1),
13099
mem: MemArg::BXD20 {
13100
base: gpr(3),
13101
index: gpr(2),
13102
disp: SImm20::maybe_from_i64(524287).unwrap(),
13103
flags: MemFlags::trusted(),
13104
},
13105
lane_imm: 0,
13106
},
13107
"E3123FFF7F71E61010000002",
13108
"lay %r1, 524287(%r2,%r3) ; vlebrg %v1, 0(%r1), 0",
13109
));
13110
insns.push((
13111
Inst::VecStoreLaneRev {
13112
size: 16,
13113
rd: vr(1),
13114
mem: MemArg::BXD12 {
13115
base: gpr(2),
13116
index: zero_reg(),
13117
disp: UImm12::zero(),
13118
flags: MemFlags::trusted(),
13119
},
13120
lane_imm: 7,
13121
},
13122
"E61020007009",
13123
"vstebrh %v1, 0(%r2), 7",
13124
));
13125
insns.push((
13126
Inst::VecStoreLaneRev {
13127
size: 16,
13128
rd: vr(1),
13129
mem: MemArg::BXD12 {
13130
base: gpr(2),
13131
index: zero_reg(),
13132
disp: UImm12::maybe_from_u64(4095).unwrap(),
13133
flags: MemFlags::trusted(),
13134
},
13135
lane_imm: 0,
13136
},
13137
"E6102FFF0009",
13138
"vstebrh %v1, 4095(%r2), 0",
13139
));
13140
insns.push((
13141
Inst::VecStoreLaneRev {
13142
size: 16,
13143
rd: vr(1),
13144
mem: MemArg::BXD12 {
13145
base: gpr(3),
13146
index: gpr(2),
13147
disp: UImm12::zero(),
13148
flags: MemFlags::trusted(),
13149
},
13150
lane_imm: 7,
13151
},
13152
"E61230007009",
13153
"vstebrh %v1, 0(%r2,%r3), 7",
13154
));
13155
insns.push((
13156
Inst::VecStoreLaneRev {
13157
size: 16,
13158
rd: vr(1),
13159
mem: MemArg::BXD12 {
13160
base: gpr(3),
13161
index: gpr(2),
13162
disp: UImm12::maybe_from_u64(4095).unwrap(),
13163
flags: MemFlags::trusted(),
13164
},
13165
lane_imm: 0,
13166
},
13167
"E6123FFF0009",
13168
"vstebrh %v1, 4095(%r2,%r3), 0",
13169
));
13170
insns.push((
13171
Inst::VecStoreLaneRev {
13172
size: 32,
13173
rd: vr(1),
13174
mem: MemArg::BXD12 {
13175
base: gpr(2),
13176
index: zero_reg(),
13177
disp: UImm12::zero(),
13178
flags: MemFlags::trusted(),
13179
},
13180
lane_imm: 0,
13181
},
13182
"E6102000000B",
13183
"vstebrf %v1, 0(%r2), 0",
13184
));
13185
insns.push((
13186
Inst::VecStoreLaneRev {
13187
size: 32,
13188
rd: vr(1),
13189
mem: MemArg::BXD12 {
13190
base: gpr(2),
13191
index: zero_reg(),
13192
disp: UImm12::maybe_from_u64(4095).unwrap(),
13193
flags: MemFlags::trusted(),
13194
},
13195
lane_imm: 0,
13196
},
13197
"E6102FFF000B",
13198
"vstebrf %v1, 4095(%r2), 0",
13199
));
13200
insns.push((
13201
Inst::VecStoreLaneRev {
13202
size: 32,
13203
rd: vr(1),
13204
mem: MemArg::BXD20 {
13205
base: gpr(2),
13206
index: zero_reg(),
13207
disp: SImm20::maybe_from_i64(-524288).unwrap(),
13208
flags: MemFlags::trusted(),
13209
},
13210
lane_imm: 0,
13211
},
13212
"E31020008071E6101000000B",
13213
"lay %r1, -524288(%r2) ; vstebrf %v1, 0(%r1), 0",
13214
));
13215
insns.push((
13216
Inst::VecStoreLaneRev {
13217
size: 32,
13218
rd: vr(1),
13219
mem: MemArg::BXD20 {
13220
base: gpr(2),
13221
index: zero_reg(),
13222
disp: SImm20::maybe_from_i64(524287).unwrap(),
13223
flags: MemFlags::trusted(),
13224
},
13225
lane_imm: 0,
13226
},
13227
"E3102FFF7F71E6101000000B",
13228
"lay %r1, 524287(%r2) ; vstebrf %v1, 0(%r1), 0",
13229
));
13230
insns.push((
13231
Inst::VecStoreLaneRev {
13232
size: 32,
13233
rd: vr(1),
13234
mem: MemArg::BXD12 {
13235
base: gpr(3),
13236
index: gpr(2),
13237
disp: UImm12::zero(),
13238
flags: MemFlags::trusted(),
13239
},
13240
lane_imm: 0,
13241
},
13242
"E6123000000B",
13243
"vstebrf %v1, 0(%r2,%r3), 0",
13244
));
13245
insns.push((
13246
Inst::VecStoreLaneRev {
13247
size: 32,
13248
rd: vr(1),
13249
mem: MemArg::BXD12 {
13250
base: gpr(3),
13251
index: gpr(2),
13252
disp: UImm12::maybe_from_u64(4095).unwrap(),
13253
flags: MemFlags::trusted(),
13254
},
13255
lane_imm: 0,
13256
},
13257
"E6123FFF000B",
13258
"vstebrf %v1, 4095(%r2,%r3), 0",
13259
));
13260
insns.push((
13261
Inst::VecStoreLaneRev {
13262
size: 32,
13263
rd: vr(1),
13264
mem: MemArg::BXD20 {
13265
base: gpr(3),
13266
index: gpr(2),
13267
disp: SImm20::maybe_from_i64(-524288).unwrap(),
13268
flags: MemFlags::trusted(),
13269
},
13270
lane_imm: 0,
13271
},
13272
"E31230008071E6101000000B",
13273
"lay %r1, -524288(%r2,%r3) ; vstebrf %v1, 0(%r1), 0",
13274
));
13275
insns.push((
13276
Inst::VecStoreLaneRev {
13277
size: 32,
13278
rd: vr(1),
13279
mem: MemArg::BXD20 {
13280
base: gpr(3),
13281
index: gpr(2),
13282
disp: SImm20::maybe_from_i64(524287).unwrap(),
13283
flags: MemFlags::trusted(),
13284
},
13285
lane_imm: 0,
13286
},
13287
"E3123FFF7F71E6101000000B",
13288
"lay %r1, 524287(%r2,%r3) ; vstebrf %v1, 0(%r1), 0",
13289
));
13290
insns.push((
13291
Inst::VecStoreLaneRev {
13292
size: 64,
13293
rd: vr(1),
13294
mem: MemArg::BXD12 {
13295
base: gpr(2),
13296
index: zero_reg(),
13297
disp: UImm12::zero(),
13298
flags: MemFlags::trusted(),
13299
},
13300
lane_imm: 0,
13301
},
13302
"E6102000000A",
13303
"vstebrg %v1, 0(%r2), 0",
13304
));
13305
insns.push((
13306
Inst::VecStoreLaneRev {
13307
size: 64,
13308
rd: vr(1),
13309
mem: MemArg::BXD12 {
13310
base: gpr(2),
13311
index: zero_reg(),
13312
disp: UImm12::maybe_from_u64(4095).unwrap(),
13313
flags: MemFlags::trusted(),
13314
},
13315
lane_imm: 0,
13316
},
13317
"E6102FFF000A",
13318
"vstebrg %v1, 4095(%r2), 0",
13319
));
13320
insns.push((
13321
Inst::VecStoreLaneRev {
13322
size: 64,
13323
rd: vr(1),
13324
mem: MemArg::BXD20 {
13325
base: gpr(2),
13326
index: zero_reg(),
13327
disp: SImm20::maybe_from_i64(-524288).unwrap(),
13328
flags: MemFlags::trusted(),
13329
},
13330
lane_imm: 0,
13331
},
13332
"E31020008071E6101000000A",
13333
"lay %r1, -524288(%r2) ; vstebrg %v1, 0(%r1), 0",
13334
));
13335
insns.push((
13336
Inst::VecStoreLaneRev {
13337
size: 64,
13338
rd: vr(1),
13339
mem: MemArg::BXD20 {
13340
base: gpr(2),
13341
index: zero_reg(),
13342
disp: SImm20::maybe_from_i64(524287).unwrap(),
13343
flags: MemFlags::trusted(),
13344
},
13345
lane_imm: 0,
13346
},
13347
"E3102FFF7F71E6101000000A",
13348
"lay %r1, 524287(%r2) ; vstebrg %v1, 0(%r1), 0",
13349
));
13350
insns.push((
13351
Inst::VecStoreLaneRev {
13352
size: 64,
13353
rd: vr(1),
13354
mem: MemArg::BXD12 {
13355
base: gpr(3),
13356
index: gpr(2),
13357
disp: UImm12::zero(),
13358
flags: MemFlags::trusted(),
13359
},
13360
lane_imm: 0,
13361
},
13362
"E6123000000A",
13363
"vstebrg %v1, 0(%r2,%r3), 0",
13364
));
13365
insns.push((
13366
Inst::VecStoreLaneRev {
13367
size: 64,
13368
rd: vr(1),
13369
mem: MemArg::BXD12 {
13370
base: gpr(3),
13371
index: gpr(2),
13372
disp: UImm12::maybe_from_u64(4095).unwrap(),
13373
flags: MemFlags::trusted(),
13374
},
13375
lane_imm: 0,
13376
},
13377
"E6123FFF000A",
13378
"vstebrg %v1, 4095(%r2,%r3), 0",
13379
));
13380
insns.push((
13381
Inst::VecStoreLaneRev {
13382
size: 64,
13383
rd: vr(1),
13384
mem: MemArg::BXD20 {
13385
base: gpr(3),
13386
index: gpr(2),
13387
disp: SImm20::maybe_from_i64(-524288).unwrap(),
13388
flags: MemFlags::trusted(),
13389
},
13390
lane_imm: 0,
13391
},
13392
"E31230008071E6101000000A",
13393
"lay %r1, -524288(%r2,%r3) ; vstebrg %v1, 0(%r1), 0",
13394
));
13395
insns.push((
13396
Inst::VecStoreLaneRev {
13397
size: 64,
13398
rd: vr(1),
13399
mem: MemArg::BXD20 {
13400
base: gpr(3),
13401
index: gpr(2),
13402
disp: SImm20::maybe_from_i64(524287).unwrap(),
13403
flags: MemFlags::trusted(),
13404
},
13405
lane_imm: 0,
13406
},
13407
"E3123FFF7F71E6101000000A",
13408
"lay %r1, 524287(%r2,%r3) ; vstebrg %v1, 0(%r1), 0",
13409
));
13410
13411
insns.push((
13412
Inst::VecInsertLane {
13413
size: 8,
13414
rd: writable_vr(8),
13415
ri: vr(8),
13416
rn: gpr(4),
13417
lane_imm: 0,
13418
lane_reg: zero_reg(),
13419
},
13420
"E78400000022",
13421
"vlvgb %v8, %r4, 0",
13422
));
13423
insns.push((
13424
Inst::VecInsertLane {
13425
size: 8,
13426
rd: writable_vr(8),
13427
ri: vr(8),
13428
rn: gpr(4),
13429
lane_imm: 255,
13430
lane_reg: zero_reg(),
13431
},
13432
"E78400FF0022",
13433
"vlvgb %v8, %r4, 255",
13434
));
13435
insns.push((
13436
Inst::VecInsertLane {
13437
size: 8,
13438
rd: writable_vr(24),
13439
ri: vr(24),
13440
rn: gpr(4),
13441
lane_imm: 0,
13442
lane_reg: gpr(3),
13443
},
13444
"E78430000822",
13445
"vlvgb %v24, %r4, 0(%r3)",
13446
));
13447
insns.push((
13448
Inst::VecInsertLane {
13449
size: 16,
13450
rd: writable_vr(8),
13451
ri: vr(8),
13452
rn: gpr(4),
13453
lane_imm: 0,
13454
lane_reg: zero_reg(),
13455
},
13456
"E78400001022",
13457
"vlvgh %v8, %r4, 0",
13458
));
13459
insns.push((
13460
Inst::VecInsertLane {
13461
size: 16,
13462
rd: writable_vr(8),
13463
ri: vr(8),
13464
rn: gpr(4),
13465
lane_imm: 255,
13466
lane_reg: zero_reg(),
13467
},
13468
"E78400FF1022",
13469
"vlvgh %v8, %r4, 255",
13470
));
13471
insns.push((
13472
Inst::VecInsertLane {
13473
size: 16,
13474
rd: writable_vr(24),
13475
ri: vr(24),
13476
rn: gpr(4),
13477
lane_imm: 0,
13478
lane_reg: gpr(3),
13479
},
13480
"E78430001822",
13481
"vlvgh %v24, %r4, 0(%r3)",
13482
));
13483
insns.push((
13484
Inst::VecInsertLane {
13485
size: 32,
13486
rd: writable_vr(8),
13487
ri: vr(8),
13488
rn: gpr(4),
13489
lane_imm: 0,
13490
lane_reg: zero_reg(),
13491
},
13492
"E78400002022",
13493
"vlvgf %v8, %r4, 0",
13494
));
13495
insns.push((
13496
Inst::VecInsertLane {
13497
size: 32,
13498
rd: writable_vr(8),
13499
ri: vr(8),
13500
rn: gpr(4),
13501
lane_imm: 255,
13502
lane_reg: zero_reg(),
13503
},
13504
"E78400FF2022",
13505
"vlvgf %v8, %r4, 255",
13506
));
13507
insns.push((
13508
Inst::VecInsertLane {
13509
size: 32,
13510
rd: writable_vr(24),
13511
ri: vr(24),
13512
rn: gpr(4),
13513
lane_imm: 0,
13514
lane_reg: gpr(3),
13515
},
13516
"E78430002822",
13517
"vlvgf %v24, %r4, 0(%r3)",
13518
));
13519
insns.push((
13520
Inst::VecInsertLane {
13521
size: 64,
13522
rd: writable_vr(8),
13523
ri: vr(8),
13524
rn: gpr(4),
13525
lane_imm: 0,
13526
lane_reg: zero_reg(),
13527
},
13528
"E78400003022",
13529
"vlvgg %v8, %r4, 0",
13530
));
13531
insns.push((
13532
Inst::VecInsertLane {
13533
size: 64,
13534
rd: writable_vr(8),
13535
ri: vr(8),
13536
rn: gpr(4),
13537
lane_imm: 255,
13538
lane_reg: zero_reg(),
13539
},
13540
"E78400FF3022",
13541
"vlvgg %v8, %r4, 255",
13542
));
13543
insns.push((
13544
Inst::VecInsertLane {
13545
size: 64,
13546
rd: writable_vr(24),
13547
ri: vr(24),
13548
rn: gpr(4),
13549
lane_imm: 0,
13550
lane_reg: gpr(3),
13551
},
13552
"E78430003822",
13553
"vlvgg %v24, %r4, 0(%r3)",
13554
));
13555
insns.push((
13556
Inst::VecInsertLaneUndef {
13557
size: 8,
13558
rd: writable_vr(8),
13559
rn: gpr(4),
13560
lane_imm: 0,
13561
lane_reg: zero_reg(),
13562
},
13563
"E78400000022",
13564
"vlvgb %v8, %r4, 0",
13565
));
13566
insns.push((
13567
Inst::VecInsertLaneUndef {
13568
size: 8,
13569
rd: writable_vr(8),
13570
rn: gpr(4),
13571
lane_imm: 255,
13572
lane_reg: zero_reg(),
13573
},
13574
"E78400FF0022",
13575
"vlvgb %v8, %r4, 255",
13576
));
13577
insns.push((
13578
Inst::VecInsertLaneUndef {
13579
size: 8,
13580
rd: writable_vr(24),
13581
rn: gpr(4),
13582
lane_imm: 0,
13583
lane_reg: gpr(3),
13584
},
13585
"E78430000822",
13586
"vlvgb %v24, %r4, 0(%r3)",
13587
));
13588
insns.push((
13589
Inst::VecInsertLaneUndef {
13590
size: 16,
13591
rd: writable_vr(8),
13592
rn: gpr(4),
13593
lane_imm: 0,
13594
lane_reg: zero_reg(),
13595
},
13596
"E78400001022",
13597
"vlvgh %v8, %r4, 0",
13598
));
13599
insns.push((
13600
Inst::VecInsertLaneUndef {
13601
size: 16,
13602
rd: writable_vr(8),
13603
rn: gpr(4),
13604
lane_imm: 255,
13605
lane_reg: zero_reg(),
13606
},
13607
"E78400FF1022",
13608
"vlvgh %v8, %r4, 255",
13609
));
13610
insns.push((
13611
Inst::VecInsertLaneUndef {
13612
size: 16,
13613
rd: writable_vr(24),
13614
rn: gpr(4),
13615
lane_imm: 0,
13616
lane_reg: gpr(3),
13617
},
13618
"E78430001822",
13619
"vlvgh %v24, %r4, 0(%r3)",
13620
));
13621
insns.push((
13622
Inst::VecInsertLaneUndef {
13623
size: 32,
13624
rd: writable_vr(8),
13625
rn: gpr(4),
13626
lane_imm: 0,
13627
lane_reg: zero_reg(),
13628
},
13629
"E78400002022",
13630
"vlvgf %v8, %r4, 0",
13631
));
13632
insns.push((
13633
Inst::VecInsertLaneUndef {
13634
size: 32,
13635
rd: writable_vr(8),
13636
rn: gpr(4),
13637
lane_imm: 255,
13638
lane_reg: zero_reg(),
13639
},
13640
"E78400FF2022",
13641
"vlvgf %v8, %r4, 255",
13642
));
13643
insns.push((
13644
Inst::VecInsertLaneUndef {
13645
size: 32,
13646
rd: writable_vr(24),
13647
rn: gpr(4),
13648
lane_imm: 0,
13649
lane_reg: gpr(3),
13650
},
13651
"E78430002822",
13652
"vlvgf %v24, %r4, 0(%r3)",
13653
));
13654
insns.push((
13655
Inst::VecInsertLaneUndef {
13656
size: 64,
13657
rd: writable_vr(8),
13658
rn: gpr(4),
13659
lane_imm: 0,
13660
lane_reg: zero_reg(),
13661
},
13662
"B3C10084",
13663
"ldgr %f8, %r4",
13664
));
13665
insns.push((
13666
Inst::VecInsertLaneUndef {
13667
size: 64,
13668
rd: writable_vr(8),
13669
rn: gpr(4),
13670
lane_imm: 255,
13671
lane_reg: zero_reg(),
13672
},
13673
"E78400FF3022",
13674
"vlvgg %v8, %r4, 255",
13675
));
13676
insns.push((
13677
Inst::VecInsertLaneUndef {
13678
size: 64,
13679
rd: writable_vr(8),
13680
rn: gpr(4),
13681
lane_imm: 0,
13682
lane_reg: gpr(3),
13683
},
13684
"E78430003022",
13685
"vlvgg %v8, %r4, 0(%r3)",
13686
));
13687
insns.push((
13688
Inst::VecExtractLane {
13689
size: 8,
13690
rd: writable_gpr(8),
13691
rn: vr(4),
13692
lane_imm: 255,
13693
lane_reg: zero_reg(),
13694
},
13695
"E78400FF0021",
13696
"vlgvb %r8, %v4, 255",
13697
));
13698
insns.push((
13699
Inst::VecExtractLane {
13700
size: 8,
13701
rd: writable_gpr(8),
13702
rn: vr(20),
13703
lane_imm: 0,
13704
lane_reg: gpr(3),
13705
},
13706
"E78430000421",
13707
"vlgvb %r8, %v20, 0(%r3)",
13708
));
13709
insns.push((
13710
Inst::VecExtractLane {
13711
size: 16,
13712
rd: writable_gpr(8),
13713
rn: vr(4),
13714
lane_imm: 0,
13715
lane_reg: zero_reg(),
13716
},
13717
"E78400001021",
13718
"vlgvh %r8, %v4, 0",
13719
));
13720
insns.push((
13721
Inst::VecExtractLane {
13722
size: 16,
13723
rd: writable_gpr(8),
13724
rn: vr(4),
13725
lane_imm: 255,
13726
lane_reg: zero_reg(),
13727
},
13728
"E78400FF1021",
13729
"vlgvh %r8, %v4, 255",
13730
));
13731
insns.push((
13732
Inst::VecExtractLane {
13733
size: 16,
13734
rd: writable_gpr(8),
13735
rn: vr(20),
13736
lane_imm: 0,
13737
lane_reg: gpr(3),
13738
},
13739
"E78430001421",
13740
"vlgvh %r8, %v20, 0(%r3)",
13741
));
13742
insns.push((
13743
Inst::VecExtractLane {
13744
size: 32,
13745
rd: writable_gpr(8),
13746
rn: vr(4),
13747
lane_imm: 0,
13748
lane_reg: zero_reg(),
13749
},
13750
"E78400002021",
13751
"vlgvf %r8, %v4, 0",
13752
));
13753
insns.push((
13754
Inst::VecExtractLane {
13755
size: 32,
13756
rd: writable_gpr(8),
13757
rn: vr(4),
13758
lane_imm: 255,
13759
lane_reg: zero_reg(),
13760
},
13761
"E78400FF2021",
13762
"vlgvf %r8, %v4, 255",
13763
));
13764
insns.push((
13765
Inst::VecExtractLane {
13766
size: 32,
13767
rd: writable_gpr(8),
13768
rn: vr(20),
13769
lane_imm: 0,
13770
lane_reg: gpr(3),
13771
},
13772
"E78430002421",
13773
"vlgvf %r8, %v20, 0(%r3)",
13774
));
13775
insns.push((
13776
Inst::VecExtractLane {
13777
size: 64,
13778
rd: writable_gpr(8),
13779
rn: vr(4),
13780
lane_imm: 0,
13781
lane_reg: zero_reg(),
13782
},
13783
"B3CD0084",
13784
"lgdr %r8, %f4",
13785
));
13786
insns.push((
13787
Inst::VecExtractLane {
13788
size: 64,
13789
rd: writable_gpr(8),
13790
rn: vr(4),
13791
lane_imm: 255,
13792
lane_reg: zero_reg(),
13793
},
13794
"E78400FF3021",
13795
"vlgvg %r8, %v4, 255",
13796
));
13797
insns.push((
13798
Inst::VecExtractLane {
13799
size: 64,
13800
rd: writable_gpr(8),
13801
rn: vr(4),
13802
lane_imm: 0,
13803
lane_reg: gpr(3),
13804
},
13805
"E78430003021",
13806
"vlgvg %r8, %v4, 0(%r3)",
13807
));
13808
insns.push((
13809
Inst::VecInsertLaneImm {
13810
size: 8,
13811
rd: writable_vr(20),
13812
ri: vr(20),
13813
imm: 0x1234,
13814
lane_imm: 15,
13815
},
13816
"E7401234F840",
13817
"vleib %v20, 4660, 15",
13818
));
13819
insns.push((
13820
Inst::VecInsertLaneImm {
13821
size: 16,
13822
rd: writable_vr(20),
13823
ri: vr(20),
13824
imm: 0x1234,
13825
lane_imm: 7,
13826
},
13827
"E74012347841",
13828
"vleih %v20, 4660, 7",
13829
));
13830
insns.push((
13831
Inst::VecInsertLaneImm {
13832
size: 32,
13833
rd: writable_vr(20),
13834
ri: vr(20),
13835
imm: 0x1234,
13836
lane_imm: 3,
13837
},
13838
"E74012343843",
13839
"vleif %v20, 4660, 3",
13840
));
13841
insns.push((
13842
Inst::VecInsertLaneImm {
13843
size: 64,
13844
rd: writable_vr(20),
13845
ri: vr(20),
13846
imm: 0x1234,
13847
lane_imm: 1,
13848
},
13849
"E74012341842",
13850
"vleig %v20, 4660, 1",
13851
));
13852
insns.push((
13853
Inst::VecInsertLaneImmUndef {
13854
size: 8,
13855
rd: writable_vr(20),
13856
imm: 0x1234,
13857
lane_imm: 15,
13858
},
13859
"E7401234F840",
13860
"vleib %v20, 4660, 15",
13861
));
13862
insns.push((
13863
Inst::VecInsertLaneImmUndef {
13864
size: 16,
13865
rd: writable_vr(20),
13866
imm: 0x1234,
13867
lane_imm: 7,
13868
},
13869
"E74012347841",
13870
"vleih %v20, 4660, 7",
13871
));
13872
insns.push((
13873
Inst::VecInsertLaneImmUndef {
13874
size: 32,
13875
rd: writable_vr(20),
13876
imm: 0x1234,
13877
lane_imm: 3,
13878
},
13879
"E74012343843",
13880
"vleif %v20, 4660, 3",
13881
));
13882
insns.push((
13883
Inst::VecInsertLaneImmUndef {
13884
size: 64,
13885
rd: writable_vr(20),
13886
imm: 0x1234,
13887
lane_imm: 1,
13888
},
13889
"E74012341842",
13890
"vleig %v20, 4660, 1",
13891
));
13892
insns.push((
13893
Inst::VecReplicateLane {
13894
size: 8,
13895
rd: writable_vr(20),
13896
rn: vr(8),
13897
lane_imm: 15,
13898
},
13899
"E748000F084D",
13900
"vrepb %v20, %v8, 15",
13901
));
13902
insns.push((
13903
Inst::VecReplicateLane {
13904
size: 16,
13905
rd: writable_vr(20),
13906
rn: vr(8),
13907
lane_imm: 7,
13908
},
13909
"E7480007184D",
13910
"vreph %v20, %v8, 7",
13911
));
13912
insns.push((
13913
Inst::VecReplicateLane {
13914
size: 32,
13915
rd: writable_vr(20),
13916
rn: vr(8),
13917
lane_imm: 3,
13918
},
13919
"E7480003284D",
13920
"vrepf %v20, %v8, 3",
13921
));
13922
insns.push((
13923
Inst::VecReplicateLane {
13924
size: 64,
13925
rd: writable_vr(20),
13926
rn: vr(8),
13927
lane_imm: 1,
13928
},
13929
"E7480001384D",
13930
"vrepg %v20, %v8, 1",
13931
));
13932
13933
let flags = settings::Flags::new(settings::builder());
13934
13935
use crate::settings::Configurable;
13936
let mut isa_flag_builder = s390x_settings::builder();
13937
isa_flag_builder.enable("arch15").unwrap();
13938
let isa_flags = s390x_settings::Flags::new(&flags, &isa_flag_builder);
13939
let ctrl_plane = &mut Default::default();
13940
let constants = Default::default();
13941
13942
let emit_info = EmitInfo::new(isa_flags);
13943
for (insn, expected_encoding, expected_printing) in insns {
13944
println!("S390x: {insn:?}, {expected_encoding}, {expected_printing}");
13945
13946
// Check the printed text is as expected.
13947
let actual_printing = insn.print_with_state(&mut EmitState::default());
13948
assert_eq!(expected_printing, actual_printing);
13949
13950
let mut buffer = MachBuffer::new();
13951
13952
// Label 0 before the instruction.
13953
let label0 = buffer.get_label();
13954
buffer.bind_label(label0, ctrl_plane);
13955
13956
// Emit the instruction.
13957
insn.emit(&mut buffer, &emit_info, &mut Default::default());
13958
13959
// Label 1 after the instruction.
13960
let label1 = buffer.get_label();
13961
buffer.bind_label(label1, ctrl_plane);
13962
13963
let buffer = buffer.finish(&constants, ctrl_plane);
13964
let actual_encoding = &buffer.stringify_code_bytes();
13965
assert_eq!(expected_encoding, actual_encoding);
13966
}
13967
}
13968
13969