Path: blob/main/cranelift/codegen/src/machinst/isle.rs
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use crate::ir::{BlockCall, Value, ValueList};1use alloc::boxed::Box;2use alloc::vec::Vec;3use smallvec::SmallVec;45pub use super::MachLabel;6use super::RetPair;7pub use crate::ir::{condcodes::CondCode, *};8pub use crate::isa::{TargetIsa, unwind::UnwindInst};9pub use crate::machinst::{10ABIArg, ABIArgSlot, ABIMachineSpec, InputSourceInst, Lower, LowerBackend, RealReg, Reg,11RelocDistance, Sig, TryCallInfo, VCodeInst, Writable,12};13pub use crate::settings::{StackSwitchModel, TlsModel};1415pub type Unit = ();16pub type ValueSlice = (ValueList, usize);17pub type ValueArray2 = [Value; 2];18pub type ValueArray3 = [Value; 3];19pub type BlockArray2 = [BlockCall; 2];20pub type WritableReg = Writable<Reg>;21pub type VecRetPair = Vec<RetPair>;22pub type VecMask = Vec<u8>;23pub type ValueRegs = crate::machinst::ValueRegs<Reg>;24pub type WritableValueRegs = crate::machinst::ValueRegs<WritableReg>;25pub type ValueRegsVec = SmallVec<[ValueRegs; 2]>;26pub type InstOutput = SmallVec<[ValueRegs; 2]>;27pub type BoxExternalName = Box<ExternalName>;28pub type MachLabelSlice = [MachLabel];29pub type BoxVecMachLabel = Box<Vec<MachLabel>>;30pub type OptionTryCallInfo = Option<TryCallInfo>;3132/// Helper macro to define methods in `prelude.isle` within `impl Context for33/// ...` for each backend. These methods are shared amongst all backends.34#[macro_export]35#[doc(hidden)]36macro_rules! isle_lower_prelude_methods {37() => {38crate::isle_lower_prelude_methods!(MInst);39};40($inst:ty) => {41crate::isle_common_prelude_methods!();4243#[inline]44fn value_type(&mut self, val: Value) -> Type {45self.lower_ctx.dfg().value_type(val)46}4748#[inline]49fn value_reg(&mut self, reg: Reg) -> ValueRegs {50ValueRegs::one(reg)51}5253#[inline]54fn value_regs(&mut self, r1: Reg, r2: Reg) -> ValueRegs {55ValueRegs::two(r1, r2)56}5758#[inline]59fn writable_value_regs(&mut self, r1: WritableReg, r2: WritableReg) -> WritableValueRegs {60WritableValueRegs::two(r1, r2)61}6263#[inline]64fn writable_value_reg(&mut self, r: WritableReg) -> WritableValueRegs {65WritableValueRegs::one(r)66}6768#[inline]69fn value_regs_invalid(&mut self) -> ValueRegs {70ValueRegs::invalid()71}7273#[inline]74fn output_none(&mut self) -> InstOutput {75smallvec::smallvec![]76}7778#[inline]79fn output(&mut self, regs: ValueRegs) -> InstOutput {80smallvec::smallvec![regs]81}8283#[inline]84fn output_pair(&mut self, r1: ValueRegs, r2: ValueRegs) -> InstOutput {85smallvec::smallvec![r1, r2]86}8788#[inline]89fn output_vec(&mut self, output: &ValueRegsVec) -> InstOutput {90output.clone()91}9293#[inline]94fn temp_writable_reg(&mut self, ty: Type) -> WritableReg {95let value_regs = self.lower_ctx.alloc_tmp(ty);96value_regs.only_reg().unwrap()97}9899#[inline]100fn is_valid_reg(&mut self, reg: Reg) -> bool {101use crate::machinst::valueregs::InvalidSentinel;102!reg.is_invalid_sentinel()103}104105#[inline]106fn invalid_reg(&mut self) -> Reg {107use crate::machinst::valueregs::InvalidSentinel;108Reg::invalid_sentinel()109}110111#[inline]112fn mark_value_used(&mut self, val: Value) {113self.lower_ctx.increment_lowered_uses(val);114}115116#[inline]117fn put_in_reg(&mut self, val: Value) -> Reg {118self.put_in_regs(val).only_reg().unwrap()119}120121#[inline]122fn put_in_regs(&mut self, val: Value) -> ValueRegs {123self.lower_ctx.put_value_in_regs(val)124}125126#[inline]127fn put_in_regs_vec(&mut self, (list, off): ValueSlice) -> ValueRegsVec {128(off..list.len(&self.lower_ctx.dfg().value_lists))129.map(|ix| {130let val = list.get(ix, &self.lower_ctx.dfg().value_lists).unwrap();131self.put_in_regs(val)132})133.collect()134}135136#[inline]137fn ensure_in_vreg(&mut self, reg: Reg, ty: Type) -> Reg {138self.lower_ctx.ensure_in_vreg(reg, ty)139}140141#[inline]142fn value_regs_get(&mut self, regs: ValueRegs, i: usize) -> Reg {143regs.regs()[i]144}145146#[inline]147fn value_regs_len(&mut self, regs: ValueRegs) -> usize {148regs.regs().len()149}150151#[inline]152fn value_list_slice(&mut self, list: ValueList) -> ValueSlice {153(list, 0)154}155156#[inline]157fn value_slice_empty(&mut self, slice: ValueSlice) -> Option<()> {158let (list, off) = slice;159if off >= list.len(&self.lower_ctx.dfg().value_lists) {160Some(())161} else {162None163}164}165166#[inline]167fn value_slice_unwrap(&mut self, slice: ValueSlice) -> Option<(Value, ValueSlice)> {168let (list, off) = slice;169if let Some(val) = list.get(off, &self.lower_ctx.dfg().value_lists) {170Some((val, (list, off + 1)))171} else {172None173}174}175176#[inline]177fn value_slice_len(&mut self, slice: ValueSlice) -> usize {178let (list, off) = slice;179list.len(&self.lower_ctx.dfg().value_lists) - off180}181182#[inline]183fn value_slice_get(&mut self, slice: ValueSlice, idx: usize) -> Value {184let (list, off) = slice;185list.get(off + idx, &self.lower_ctx.dfg().value_lists)186.unwrap()187}188189#[inline]190fn writable_reg_to_reg(&mut self, r: WritableReg) -> Reg {191r.to_reg()192}193194#[inline]195fn inst_results(&mut self, inst: Inst) -> ValueSlice {196(self.lower_ctx.dfg().inst_results_list(inst), 0)197}198199#[inline]200fn first_result(&mut self, inst: Inst) -> Option<Value> {201self.lower_ctx.dfg().inst_results(inst).first().copied()202}203204#[inline]205fn inst_data_value(&mut self, inst: Inst) -> InstructionData {206self.lower_ctx.dfg().insts[inst]207}208209#[inline]210fn i64_from_iconst(&mut self, val: Value) -> Option<i64> {211let inst = self.def_inst(val)?;212let constant = match self.lower_ctx.data(inst) {213InstructionData::UnaryImm {214opcode: Opcode::Iconst,215imm,216} => imm.bits(),217_ => return None,218};219let ty = self.lower_ctx.output_ty(inst, 0);220let shift_amt = std::cmp::max(0, 64 - self.ty_bits(ty));221Some((constant << shift_amt) >> shift_amt)222}223224fn zero_value(&mut self, value: Value) -> Option<Value> {225let insn = self.def_inst(value);226if insn.is_some() {227let insn = insn.unwrap();228let inst_data = self.lower_ctx.data(insn);229match inst_data {230InstructionData::Unary {231opcode: Opcode::Splat,232arg,233} => {234let arg = arg.clone();235return self.zero_value(arg);236}237InstructionData::UnaryConst {238opcode: Opcode::Vconst | Opcode::F128const,239constant_handle,240} => {241let constant_data =242self.lower_ctx.get_constant_data(*constant_handle).clone();243if constant_data.into_vec().iter().any(|&x| x != 0) {244return None;245} else {246return Some(value);247}248}249InstructionData::UnaryImm { imm, .. } => {250if imm.bits() == 0 {251return Some(value);252} else {253return None;254}255}256InstructionData::UnaryIeee16 { imm, .. } => {257if imm.bits() == 0 {258return Some(value);259} else {260return None;261}262}263InstructionData::UnaryIeee32 { imm, .. } => {264if imm.bits() == 0 {265return Some(value);266} else {267return None;268}269}270InstructionData::UnaryIeee64 { imm, .. } => {271if imm.bits() == 0 {272return Some(value);273} else {274return None;275}276}277_ => None,278}279} else {280None281}282}283284#[inline]285fn tls_model(&mut self, _: Type) -> TlsModel {286self.backend.flags().tls_model()287}288289#[inline]290fn tls_model_is_elf_gd(&mut self) -> Option<()> {291if self.backend.flags().tls_model() == TlsModel::ElfGd {292Some(())293} else {294None295}296}297298#[inline]299fn tls_model_is_macho(&mut self) -> Option<()> {300if self.backend.flags().tls_model() == TlsModel::Macho {301Some(())302} else {303None304}305}306307#[inline]308fn tls_model_is_coff(&mut self) -> Option<()> {309if self.backend.flags().tls_model() == TlsModel::Coff {310Some(())311} else {312None313}314}315316#[inline]317fn preserve_frame_pointers(&mut self) -> Option<()> {318if self.backend.flags().preserve_frame_pointers() {319Some(())320} else {321None322}323}324325#[inline]326fn stack_switch_model(&mut self) -> Option<StackSwitchModel> {327Some(self.backend.flags().stack_switch_model())328}329330#[inline]331fn func_ref_data(&mut self, func_ref: FuncRef) -> (SigRef, ExternalName, RelocDistance) {332let funcdata = &self.lower_ctx.dfg().ext_funcs[func_ref];333let reloc_distance = if funcdata.colocated {334RelocDistance::Near335} else {336RelocDistance::Far337};338(funcdata.signature, funcdata.name.clone(), reloc_distance)339}340341#[inline]342fn exception_sig(&mut self, et: ExceptionTable) -> SigRef {343self.lower_ctx.dfg().exception_tables[et].signature()344}345346#[inline]347fn box_external_name(&mut self, extname: ExternalName) -> BoxExternalName {348Box::new(extname)349}350351#[inline]352fn symbol_value_data(353&mut self,354global_value: GlobalValue,355) -> Option<(ExternalName, RelocDistance, i64)> {356let (name, reloc, offset) = self.lower_ctx.symbol_value_data(global_value)?;357Some((name.clone(), reloc, offset))358}359360#[inline]361fn u128_from_immediate(&mut self, imm: Immediate) -> Option<u128> {362let bytes = self.lower_ctx.get_immediate_data(imm).as_slice();363Some(u128::from_le_bytes(bytes.try_into().ok()?))364}365366#[inline]367fn vconst_from_immediate(&mut self, imm: Immediate) -> Option<VCodeConstant> {368Some(self.lower_ctx.use_constant(VCodeConstantData::Generated(369self.lower_ctx.get_immediate_data(imm).clone(),370)))371}372373#[inline]374fn vec_mask_from_immediate(&mut self, imm: Immediate) -> Option<VecMask> {375let data = self.lower_ctx.get_immediate_data(imm);376if data.len() == 16 {377Some(Vec::from(data.as_slice()))378} else {379None380}381}382383#[inline]384fn u64_from_constant(&mut self, constant: Constant) -> Option<u64> {385let bytes = self.lower_ctx.get_constant_data(constant).as_slice();386Some(u64::from_le_bytes(bytes.try_into().ok()?))387}388389#[inline]390fn u128_from_constant(&mut self, constant: Constant) -> Option<u128> {391let bytes = self.lower_ctx.get_constant_data(constant).as_slice();392Some(u128::from_le_bytes(bytes.try_into().ok()?))393}394395#[inline]396fn emit_u64_le_const(&mut self, value: u64) -> VCodeConstant {397let data = VCodeConstantData::U64(value.to_le_bytes());398self.lower_ctx.use_constant(data)399}400401#[inline]402fn emit_u64_be_const(&mut self, value: u64) -> VCodeConstant {403let data = VCodeConstantData::U64(value.to_be_bytes());404self.lower_ctx.use_constant(data)405}406407#[inline]408fn emit_u128_le_const(&mut self, value: u128) -> VCodeConstant {409let data = VCodeConstantData::Generated(value.to_le_bytes().as_slice().into());410self.lower_ctx.use_constant(data)411}412413#[inline]414fn emit_u128_be_const(&mut self, value: u128) -> VCodeConstant {415let data = VCodeConstantData::Generated(value.to_be_bytes().as_slice().into());416self.lower_ctx.use_constant(data)417}418419#[inline]420fn const_to_vconst(&mut self, constant: Constant) -> VCodeConstant {421self.lower_ctx.use_constant(VCodeConstantData::Pool(422constant,423self.lower_ctx.get_constant_data(constant).clone(),424))425}426427fn only_writable_reg(&mut self, regs: WritableValueRegs) -> Option<WritableReg> {428regs.only_reg()429}430431fn writable_regs_get(&mut self, regs: WritableValueRegs, idx: usize) -> WritableReg {432regs.regs()[idx]433}434435fn abi_sig(&mut self, sig_ref: SigRef) -> Sig {436self.lower_ctx.sigs().abi_sig_for_sig_ref(sig_ref)437}438439fn abi_num_args(&mut self, abi: Sig) -> usize {440self.lower_ctx.sigs().num_args(abi)441}442443fn abi_get_arg(&mut self, abi: Sig, idx: usize) -> ABIArg {444self.lower_ctx.sigs().get_arg(abi, idx)445}446447fn abi_num_rets(&mut self, abi: Sig) -> usize {448self.lower_ctx.sigs().num_rets(abi)449}450451fn abi_get_ret(&mut self, abi: Sig, idx: usize) -> ABIArg {452self.lower_ctx.sigs().get_ret(abi, idx)453}454455fn abi_ret_arg(&mut self, abi: Sig) -> Option<ABIArg> {456self.lower_ctx.sigs().get_ret_arg(abi)457}458459fn abi_no_ret_arg(&mut self, abi: Sig) -> Option<()> {460if let Some(_) = self.lower_ctx.sigs().get_ret_arg(abi) {461None462} else {463Some(())464}465}466467fn abi_arg_only_slot(&mut self, arg: &ABIArg) -> Option<ABIArgSlot> {468match arg {469&ABIArg::Slots { ref slots, .. } => {470if slots.len() == 1 {471Some(slots[0])472} else {473None474}475}476_ => None,477}478}479480fn abi_arg_implicit_pointer(&mut self, arg: &ABIArg) -> Option<(ABIArgSlot, i64, Type)> {481match arg {482&ABIArg::ImplicitPtrArg {483pointer,484offset,485ty,486..487} => Some((pointer, offset, ty)),488_ => None,489}490}491492fn abi_unwrap_ret_area_ptr(&mut self) -> Reg {493self.lower_ctx.abi().ret_area_ptr().unwrap()494}495496fn abi_stackslot_addr(497&mut self,498dst: WritableReg,499stack_slot: StackSlot,500offset: Offset32,501) -> MInst {502let offset = u32::try_from(i32::from(offset)).unwrap();503self.lower_ctx504.abi()505.sized_stackslot_addr(stack_slot, offset, dst)506.into()507}508509fn abi_dynamic_stackslot_addr(510&mut self,511dst: WritableReg,512stack_slot: DynamicStackSlot,513) -> MInst {514assert!(515self.lower_ctx516.abi()517.dynamic_stackslot_offsets()518.is_valid(stack_slot)519);520self.lower_ctx521.abi()522.dynamic_stackslot_addr(stack_slot, dst)523.into()524}525526fn real_reg_to_reg(&mut self, reg: RealReg) -> Reg {527Reg::from(reg)528}529530fn real_reg_to_writable_reg(&mut self, reg: RealReg) -> WritableReg {531Writable::from_reg(Reg::from(reg))532}533534fn is_sinkable_inst(&mut self, val: Value) -> Option<Inst> {535let input = self.lower_ctx.get_value_as_source_or_const(val);536537if let InputSourceInst::UniqueUse(inst, _) = input.inst {538Some(inst)539} else {540None541}542}543544#[inline]545fn sink_inst(&mut self, inst: Inst) {546self.lower_ctx.sink_inst(inst);547}548549#[inline]550fn maybe_uextend(&mut self, value: Value) -> Option<Value> {551if let Some(def_inst) = self.def_inst(value) {552if let InstructionData::Unary {553opcode: Opcode::Uextend,554arg,555} = self.lower_ctx.data(def_inst)556{557return Some(*arg);558}559}560561Some(value)562}563564#[inline]565fn uimm8(&mut self, x: Imm64) -> Option<u8> {566let x64: i64 = x.into();567let x8: u8 = x64.try_into().ok()?;568Some(x8)569}570571#[inline]572fn preg_to_reg(&mut self, preg: PReg) -> Reg {573preg.into()574}575576#[inline]577fn gen_move(&mut self, ty: Type, dst: WritableReg, src: Reg) -> MInst {578<$inst>::gen_move(dst, src, ty).into()579}580581/// Generate the return instruction.582fn gen_return(&mut self, rets: &ValueRegsVec) {583self.lower_ctx.gen_return(rets);584}585586fn gen_call_output(&mut self, sig_ref: SigRef) -> ValueRegsVec {587self.lower_ctx.gen_call_output_from_sig_ref(sig_ref)588}589590fn gen_call_args(&mut self, sig: Sig, inputs: &ValueRegsVec) -> CallArgList {591self.lower_ctx.gen_call_args(sig, inputs)592}593594fn gen_return_call_args(&mut self, sig: Sig, inputs: &ValueRegsVec) -> CallArgList {595self.lower_ctx.gen_return_call_args(sig, inputs)596}597598fn gen_call_rets(&mut self, sig: Sig, outputs: &ValueRegsVec) -> CallRetList {599self.lower_ctx.gen_call_rets(sig, &outputs)600}601602fn gen_try_call_rets(&mut self, sig: Sig) -> CallRetList {603self.lower_ctx.gen_try_call_rets(sig)604}605606fn try_call_none(&mut self) -> OptionTryCallInfo {607None608}609610fn try_call_info(611&mut self,612et: ExceptionTable,613labels: &MachLabelSlice,614) -> OptionTryCallInfo {615let mut exception_handlers = vec![];616let mut labels = labels.iter().cloned();617for item in self.lower_ctx.dfg().exception_tables[et].clone().items() {618match item {619crate::ir::ExceptionTableItem::Tag(tag, _) => {620exception_handlers.push(crate::machinst::abi::TryCallHandler::Tag(621tag,622labels.next().unwrap(),623));624}625crate::ir::ExceptionTableItem::Default(_) => {626exception_handlers.push(crate::machinst::abi::TryCallHandler::Default(627labels.next().unwrap(),628));629}630crate::ir::ExceptionTableItem::Context(ctx) => {631let reg = self.put_in_reg(ctx);632exception_handlers.push(crate::machinst::abi::TryCallHandler::Context(reg));633}634}635}636637let continuation = labels.next().unwrap();638assert_eq!(labels.next(), None);639640let exception_handlers = exception_handlers.into_boxed_slice();641642Some(TryCallInfo {643continuation,644exception_handlers,645})646}647648/// Same as `shuffle32_from_imm`, but for 64-bit lane shuffles.649fn shuffle64_from_imm(&mut self, imm: Immediate) -> Option<(u8, u8)> {650use crate::machinst::isle::shuffle_imm_as_le_lane_idx;651652let bytes = self.lower_ctx.get_immediate_data(imm).as_slice();653Some((654shuffle_imm_as_le_lane_idx(8, &bytes[0..8])?,655shuffle_imm_as_le_lane_idx(8, &bytes[8..16])?,656))657}658659/// Attempts to interpret the shuffle immediate `imm` as a shuffle of660/// 32-bit lanes, returning four integers, each of which is less than 8,661/// which represents a permutation of 32-bit lanes as specified by662/// `imm`.663///664/// For example the shuffle immediate665///666/// `0 1 2 3 8 9 10 11 16 17 18 19 24 25 26 27`667///668/// would return `Some((0, 2, 4, 6))`.669fn shuffle32_from_imm(&mut self, imm: Immediate) -> Option<(u8, u8, u8, u8)> {670use crate::machinst::isle::shuffle_imm_as_le_lane_idx;671672let bytes = self.lower_ctx.get_immediate_data(imm).as_slice();673Some((674shuffle_imm_as_le_lane_idx(4, &bytes[0..4])?,675shuffle_imm_as_le_lane_idx(4, &bytes[4..8])?,676shuffle_imm_as_le_lane_idx(4, &bytes[8..12])?,677shuffle_imm_as_le_lane_idx(4, &bytes[12..16])?,678))679}680681/// Same as `shuffle32_from_imm`, but for 16-bit lane shuffles.682fn shuffle16_from_imm(683&mut self,684imm: Immediate,685) -> Option<(u8, u8, u8, u8, u8, u8, u8, u8)> {686use crate::machinst::isle::shuffle_imm_as_le_lane_idx;687let bytes = self.lower_ctx.get_immediate_data(imm).as_slice();688Some((689shuffle_imm_as_le_lane_idx(2, &bytes[0..2])?,690shuffle_imm_as_le_lane_idx(2, &bytes[2..4])?,691shuffle_imm_as_le_lane_idx(2, &bytes[4..6])?,692shuffle_imm_as_le_lane_idx(2, &bytes[6..8])?,693shuffle_imm_as_le_lane_idx(2, &bytes[8..10])?,694shuffle_imm_as_le_lane_idx(2, &bytes[10..12])?,695shuffle_imm_as_le_lane_idx(2, &bytes[12..14])?,696shuffle_imm_as_le_lane_idx(2, &bytes[14..16])?,697))698}699700fn safe_divisor_from_imm64(&mut self, ty: Type, val: Imm64) -> Option<u64> {701let minus_one = if ty.bytes() == 8 {702-1703} else {704(1 << (ty.bytes() * 8)) - 1705};706let bits = val.bits() & minus_one;707if bits == 0 || bits == minus_one {708None709} else {710Some(bits as u64)711}712}713714fn single_target(&mut self, targets: &MachLabelSlice) -> Option<MachLabel> {715if targets.len() == 1 {716Some(targets[0])717} else {718None719}720}721722fn two_targets(&mut self, targets: &MachLabelSlice) -> Option<(MachLabel, MachLabel)> {723if targets.len() == 2 {724Some((targets[0], targets[1]))725} else {726None727}728}729730fn jump_table_targets(731&mut self,732targets: &MachLabelSlice,733) -> Option<(MachLabel, BoxVecMachLabel)> {734use std::boxed::Box;735if targets.is_empty() {736return None;737}738739let default_label = targets[0];740let jt_targets = Box::new(targets[1..].to_vec());741Some((default_label, jt_targets))742}743744fn jump_table_size(&mut self, targets: &BoxVecMachLabel) -> u32 {745targets.len() as u32746}747748fn add_range_fact(&mut self, reg: Reg, bits: u16, min: u64, max: u64) -> Reg {749self.lower_ctx.add_range_fact(reg, bits, min, max);750reg751}752753fn value_is_unused(&mut self, val: Value) -> bool {754self.lower_ctx.value_is_unused(val)755}756757fn block_exn_successor_label(&mut self, block: &Block, exn_succ: u64) -> MachLabel {758// The first N successors are the exceptional edges, and759// the normal return is last; so the `exn_succ`'th760// exceptional edge is just the `exn_succ`'th edge overall.761let succ = usize::try_from(exn_succ).unwrap();762self.lower_ctx.block_successor_label(*block, succ)763}764};765}766767/// Returns the `size`-byte lane referred to by the shuffle immediate specified768/// in `bytes`.769///770/// This helper is used by `shuffleNN_from_imm` above and is used to interpret a771/// byte-based shuffle as a higher-level shuffle of bigger lanes. This will see772/// if the `bytes` specified, which must have `size` length, specifies a lane in773/// vectors aligned to a `size`-byte boundary.774///775/// Returns `None` if `bytes` doesn't specify a `size`-byte lane aligned776/// appropriately, or returns `Some(n)` where `n` is the index of the lane being777/// shuffled.778pub fn shuffle_imm_as_le_lane_idx(size: u8, bytes: &[u8]) -> Option<u8> {779assert_eq!(bytes.len(), usize::from(size));780781// The first index in `bytes` must be aligned to a `size` boundary for the782// bytes to be a valid specifier for a lane of `size` bytes.783if bytes[0] % size != 0 {784return None;785}786787// Afterwards the bytes must all be one larger than the prior to specify a788// contiguous sequence of bytes that's being shuffled. Basically `bytes`789// must refer to the entire `size`-byte lane, in little-endian order.790for i in 0..size - 1 {791let idx = usize::from(i);792if bytes[idx] + 1 != bytes[idx + 1] {793return None;794}795}796797// All of the `bytes` are in-order, meaning that this is a valid shuffle798// immediate to specify a lane of `size` bytes. The index, when viewed as799// `size`-byte immediates, will be the first byte divided by the byte size.800Some(bytes[0] / size)801}802803/// This structure is used to implement the ISLE-generated `Context` trait and804/// internally has a temporary reference to a machinst `LowerCtx`.805pub(crate) struct IsleContext<'a, 'b, I, B>806where807I: VCodeInst,808B: LowerBackend,809{810pub lower_ctx: &'a mut Lower<'b, I>,811pub backend: &'a B,812}813814impl<I, B> IsleContext<'_, '_, I, B>815where816I: VCodeInst,817B: LowerBackend,818{819pub(crate) fn dfg(&self) -> &crate::ir::DataFlowGraph {820&self.lower_ctx.f.dfg821}822}823824825