Path: blob/main/tests/complex/traffic_lights/loop_flow/input_additional_template.add.xml
169686 views
<a>12<e2Detector id="1i_l0" lane="1i_0" pos="-500" length="500" freq="60" file="results/e2_output.xml" friendlyPos="true"/>3<e2Detector id="2i_l0" lane="2i_0" pos="-500" length="500" freq="60" file="results/e2_output.xml" friendlyPos="true"/>4<e2Detector id="3i_l0" lane="3i_0" pos="-500" length="500" freq="60" file="results/e2_output.xml" friendlyPos="true"/>5<e2Detector id="4i_l0" lane="4i_0" pos="-500" length="500" freq="60" file="results/e2_output.xml" friendlyPos="true"/>67<e2Detector id="1i_tl0_l0" lane="1i_0" tl="0" pos="-500" length="500" file="results/e2_tl0_output.xml" friendlyPos="true"/>8<e2Detector id="2i_tl0_l0" lane="2i_0" tl="0" pos="-500" length="500" file="results/e2_tl0_output.xml" friendlyPos="true"/>9<e2Detector id="3i_tl0_l0" lane="3i_0" tl="0" pos="-500" length="500" file="results/e2_tl0_output.xml" friendlyPos="true"/>10<e2Detector id="4i_tl0_l0" lane="4i_0" tl="0" pos="-500" length="500" file="results/e2_tl0_output.xml" friendlyPos="true"/>1112<edgeData id="edges" freq="3600" file="results/edgeData_3600.xml"/>13<laneData id="lanes" freq="3600" file="results/laneData_3600.xml"/>14<edgeData id="edgesEmissions" type="emissions" freq="3600" file="results/edgesEmissions_3600.xml"/>15<laneData id="lanesEmissions" type="emissions" freq="3600" file="results/lanesEmissions_3600.xml"/>16<!-- edgeData id="edgesNoise" type="harmonoise" freq="3600" file="results/edgesNoise_3600.xml"/>17<laneData id="lanesNoise" type="harmonoise" freq="3600" file="results/lanesNoise_3600.xml"/ -->1819<timedEvent type="SaveTLSStates" source="0" dest="results/TLSStates.xml"/>20<timedEvent type="SaveTLSSwitchTimes" source="0" dest="results/TLSSwitchTimes.xml"/>21<timedEvent type="SaveTLSSwitchStates" source="0" dest="results/TLSSwitchStates.xml"/>2223<tlLogic id="0" type="%tls_type%" programID="a" offset="0">24<param key="THRESHOLD" value="200"/>25<param key="MIN_DECISIONAL_PHASE_DUR" value="5000"/>26<param key="MAX_CONGESTION_DUR" value="80"/>27<param key="PHERO_MAXVAL" value="10.0"/>282930<param key="CHANGE_PLAN_PROBABILITY" value="0.03"/>31<param key="GAMMA_SP" value="0.18"/>32<param key="BETA_SP" value="0.27"/>3334<param key="GAMMA_NO" value="0.1"/>35<param key="BETA_NO" value="0.2"/>36<param key="THETA_MAX" value="0.85"/>37<param key="THETA_MIN" value="0.1"/>38<param key="THETA_INIT" value="0.5"/>39<param key="LEARNING_COX" value="0.1"/>40<param key="FORGETTING_COX" value="0.4"/>4142<param key="PHASE_STIM_COX" value=".127326"/>43<param key="PHASE_STIM_OFFSET_IN" value="5"/>44<param key="PHASE_STIM_OFFSET_OUT" value="0"/>45<param key="PHASE_STIM_DIVISOR_IN" value="8"/>46<param key="PHASE_STIM_DIVISOR_OUT" value="8"/>47<param key="PHASE_STIM_COX_EXP_IN" value="1"/>48<param key="PHASE_STIM_COX_EXP_OUT" value="1"/>4950<param key="PLATOON_STIM_COX" value=".0805782"/>51<param key="PLATOON_STIM_OFFSET_IN" value="0"/>52<param key="PLATOON_STIM_OFFSET_OUT" value="0"/>53<param key="PLATOON_STIM_DIVISOR_IN" value="10"/>54<param key="PLATOON_STIM_DIVISOR_OUT" value="10"/>55<param key="PLATOON_STIM_COX_EXP_IN" value="1"/>56<param key="PLATOON_STIM_COX_EXP_OUT" value="1"/>5758<param key="MARCHING_STIM_COX" value=".0407958"/>59<param key="MARCHING_STIM_OFFSET_IN" value="5"/>60<param key="MARCHING_STIM_OFFSET_OUT" value="5"/>61<param key="MARCHING_STIM_DIVISOR_IN" value="8"/>62<param key="MARCHING_STIM_DIVISOR_OUT" value="8"/>63<param key="MARCHING_STIM_COX_EXP_IN" value="1"/>64<param key="MARCHING_STIM_COX_EXP_OUT" value="1"/>6566<param key="CONGESTION_STIM_COX" value=".0407958"/>67<param key="CONGESTION_STIM_OFFSET_IN" value="0"/>68<param key="CONGESTION_STIM_OFFSET_OUT" value="10"/>69<param key="CONGESTION_STIM_DIVISOR_IN" value="1"/>70<param key="CONGESTION_STIM_DIVISOR_OUT" value="8"/>71<param key="CONGESTION_STIM_COX_EXP_IN" value="0"/>72<param key="CONGESTION_STIM_COX_EXP_OUT" value="1"/>737475<phase duration="32" state="GrGr" type="target;decisional" targetLanes="2i_0 4i_0" minDur="12" maxDur="52"/>76<phase duration="4" state="yryr" type="transient"/>77<phase duration="4" state="rrrr" type="transient;commit"/>78<phase duration="32" state="rGrG" type="target;decisional" targetLanes="1i_0 3i_0" minDur="12" maxDur="52"/>79<phase duration="4" state="ryry" type="transient"/>80<phase duration="4" state="rrrr" type="transient;commit"/>81</tlLogic>8283</a>848586