Path: blob/main/cddl/contrib/opensolaris/lib/libdtrace/common/dt_pcb.h
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/*1* CDDL HEADER START2*3* The contents of this file are subject to the terms of the4* Common Development and Distribution License, Version 1.0 only5* (the "License"). You may not use this file except in compliance6* with the License.7*8* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE9* or http://www.opensolaris.org/os/licensing.10* See the License for the specific language governing permissions11* and limitations under the License.12*13* When distributing Covered Code, include this CDDL HEADER in each14* file and include the License file at usr/src/OPENSOLARIS.LICENSE.15* If applicable, add the following below this CDDL HEADER, with the16* fields enclosed by brackets "[]" replaced with your own identifying17* information: Portions Copyright [yyyy] [name of copyright owner]18*19* CDDL HEADER END20*/21/*22* Copyright 2005 Sun Microsystems, Inc. All rights reserved.23* Use is subject to license terms.24*/2526#ifndef _DT_PCB_H27#define _DT_PCB_H2829#pragma ident "%Z%%M% %I% %E% SMI"3031#include <dtrace.h>32#include <setjmp.h>33#include <stdio.h>3435#ifdef __cplusplus36extern "C" {37#endif3839#include <dt_parser.h>40#include <dt_regset.h>41#include <dt_inttab.h>42#include <dt_strtab.h>43#include <dt_decl.h>44#include <dt_as.h>4546typedef struct dt_pcb {47dtrace_hdl_t *pcb_hdl; /* pointer to library handle */48struct dt_pcb *pcb_prev; /* pointer to previous pcb in stack */49FILE *pcb_fileptr; /* pointer to input file (or NULL) */50char *pcb_filetag; /* optional file name string (or NULL) */51const char *pcb_string; /* pointer to input string (or NULL) */52const char *pcb_strptr; /* pointer to input position */53size_t pcb_strlen; /* length of pcb_string */54int pcb_sargc; /* number of script arguments (if any) */55char *const *pcb_sargv; /* script argument strings (if any) */56ushort_t *pcb_sflagv; /* script argument flags (DT_IDFLG_* bits) */57dt_scope_t pcb_dstack; /* declaration processing stack */58dt_node_t *pcb_list; /* list of allocated parse tree nodes */59dt_node_t *pcb_hold; /* parse tree nodes on hold until end of defn */60dt_node_t *pcb_root; /* root of current parse tree */61dt_idstack_t pcb_globals; /* stack of global identifier hash tables */62dt_idhash_t *pcb_locals; /* current hash table of local identifiers */63dt_idhash_t *pcb_idents; /* current hash table of ambiguous idents */64dt_idhash_t *pcb_pragmas; /* current hash table of pending pragmas */65dt_inttab_t *pcb_inttab; /* integer table for constant references */66dt_strtab_t *pcb_strtab; /* string table for string references */67dt_regset_t *pcb_regs; /* register set for code generation */68dt_irlist_t pcb_ir; /* list of unrelocated IR instructions */69uint_t pcb_asvidx; /* assembler vartab index (see dt_as.c) */70ulong_t **pcb_asxrefs; /* assembler imported xlators (see dt_as.c) */71uint_t pcb_asxreflen; /* assembler xlator map length (see dt_as.c) */72const dtrace_probedesc_t *pcb_pdesc; /* probedesc for current context */73struct dt_probe *pcb_probe; /* probe associated with current context */74dtrace_probeinfo_t pcb_pinfo; /* info associated with current context */75dtrace_attribute_t pcb_amin; /* stability minimum for compilation */76dt_node_t *pcb_dret; /* node containing return type for assembler */77dtrace_difo_t *pcb_difo; /* intermediate DIF object made by assembler */78dtrace_prog_t *pcb_prog; /* intermediate program made by compiler */79dtrace_stmtdesc_t *pcb_stmt; /* intermediate stmt made by compiler */80dtrace_ecbdesc_t *pcb_ecbdesc; /* intermediate ecbdesc made by cmplr */81jmp_buf pcb_jmpbuf; /* setjmp(3C) buffer for error return */82const char *pcb_region; /* optional region name for yyerror() suffix */83dtrace_probespec_t pcb_pspec; /* probe description evaluation context */84uint_t pcb_cflags; /* optional compilation flags (see dtrace.h) */85uint_t pcb_idepth; /* preprocessor #include nesting depth */86yystate_t pcb_yystate; /* lex/yacc parsing state (see yybegin()) */87int pcb_context; /* yyparse() rules context (DT_CTX_* value) */88int pcb_token; /* token to be returned by yylex() (if != 0) */89int pcb_cstate; /* state to be restored by lexer at state end */90int pcb_braces; /* number of open curly braces in lexer */91int pcb_brackets; /* number of open square brackets in lexer */92int pcb_parens; /* number of open parentheses in lexer */93} dt_pcb_t;9495extern void dt_pcb_push(dtrace_hdl_t *, dt_pcb_t *);96extern void dt_pcb_pop(dtrace_hdl_t *, int);9798#ifdef __cplusplus99}100#endif101102#endif /* _DT_PCB_H */103104105