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freebsd
GitHub Repository: freebsd/freebsd-src
Path: blob/main/contrib/arm-optimized-routines/math/aarch64/advsimd/asinf.c
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/*
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* Single-precision vector asin(x) function.
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*
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* Copyright (c) 2023-2024, Arm Limited.
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* SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
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*/
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#include "v_math.h"
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#include "v_poly_f32.h"
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#include "test_sig.h"
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#include "test_defs.h"
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static const struct data
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{
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float32x4_t poly[5];
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float32x4_t pi_over_2f;
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} data = {
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/* Polynomial approximation of (asin(sqrt(x)) - sqrt(x)) / (x * sqrt(x)) on
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[ 0x1p-24 0x1p-2 ] order = 4 rel error: 0x1.00a23bbp-29 . */
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.poly = { V4 (0x1.55555ep-3), V4 (0x1.33261ap-4), V4 (0x1.70d7dcp-5),
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V4 (0x1.b059dp-6), V4 (0x1.3af7d8p-5) },
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.pi_over_2f = V4 (0x1.921fb6p+0f),
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};
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#define AbsMask 0x7fffffff
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#define Half 0x3f000000
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#define One 0x3f800000
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#define Small 0x39800000 /* 2^-12. */
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#if WANT_SIMD_EXCEPT
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static float32x4_t VPCS_ATTR NOINLINE
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special_case (float32x4_t x, float32x4_t y, uint32x4_t special)
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{
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return v_call_f32 (asinf, x, y, special);
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}
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#endif
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/* Single-precision implementation of vector asin(x).
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For |x| < Small, approximate asin(x) by x. Small = 2^-12 for correct
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rounding. If WANT_SIMD_EXCEPT = 0, Small = 0 and we proceed with the
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following approximation.
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For |x| in [Small, 0.5], use order 4 polynomial P such that the final
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approximation is an odd polynomial: asin(x) ~ x + x^3 P(x^2).
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The largest observed error in this region is 0.83 ulps,
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_ZGVnN4v_asinf (0x1.ea00f4p-2) got 0x1.fef15ep-2 want 0x1.fef15cp-2.
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For |x| in [0.5, 1.0], use same approximation with a change of variable
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asin(x) = pi/2 - (y + y * z * P(z)), with z = (1-x)/2 and y = sqrt(z).
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The largest observed error in this region is 2.41 ulps,
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_ZGVnN4v_asinf (0x1.00203ep-1) got 0x1.0c3a64p-1 want 0x1.0c3a6p-1. */
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float32x4_t VPCS_ATTR NOINLINE V_NAME_F1 (asin) (float32x4_t x)
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{
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const struct data *d = ptr_barrier (&data);
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uint32x4_t ix = vreinterpretq_u32_f32 (x);
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uint32x4_t ia = vandq_u32 (ix, v_u32 (AbsMask));
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#if WANT_SIMD_EXCEPT
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/* Special values need to be computed with scalar fallbacks so
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that appropriate fp exceptions are raised. */
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uint32x4_t special
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= vcgtq_u32 (vsubq_u32 (ia, v_u32 (Small)), v_u32 (One - Small));
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if (unlikely (v_any_u32 (special)))
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return special_case (x, x, v_u32 (0xffffffff));
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#endif
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float32x4_t ax = vreinterpretq_f32_u32 (ia);
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uint32x4_t a_lt_half = vcltq_u32 (ia, v_u32 (Half));
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/* Evaluate polynomial Q(x) = y + y * z * P(z) with
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z = x ^ 2 and y = |x| , if |x| < 0.5
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z = (1 - |x|) / 2 and y = sqrt(z), if |x| >= 0.5. */
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float32x4_t z2 = vbslq_f32 (a_lt_half, vmulq_f32 (x, x),
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vfmsq_n_f32 (v_f32 (0.5), ax, 0.5));
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float32x4_t z = vbslq_f32 (a_lt_half, ax, vsqrtq_f32 (z2));
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/* Use a single polynomial approximation P for both intervals. */
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float32x4_t p = v_horner_4_f32 (z2, d->poly);
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/* Finalize polynomial: z + z * z2 * P(z2). */
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p = vfmaq_f32 (z, vmulq_f32 (z, z2), p);
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/* asin(|x|) = Q(|x|) , for |x| < 0.5
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= pi/2 - 2 Q(|x|), for |x| >= 0.5. */
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float32x4_t y
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= vbslq_f32 (a_lt_half, p, vfmsq_n_f32 (d->pi_over_2f, p, 2.0));
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/* Copy sign. */
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return vbslq_f32 (v_u32 (AbsMask), y, x);
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}
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HALF_WIDTH_ALIAS_F1 (asin)
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TEST_SIG (V, F, 1, asin, -1.0, 1.0)
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TEST_ULP (V_NAME_F1 (asin), 1.91)
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TEST_DISABLE_FENV_IF_NOT (V_NAME_F1 (asin), WANT_SIMD_EXCEPT)
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TEST_INTERVAL (V_NAME_F1 (asin), 0, 0x1p-12, 5000)
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TEST_INTERVAL (V_NAME_F1 (asin), 0x1p-12, 0.5, 50000)
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TEST_INTERVAL (V_NAME_F1 (asin), 0.5, 1.0, 50000)
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TEST_INTERVAL (V_NAME_F1 (asin), 1.0, 0x1p11, 50000)
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TEST_INTERVAL (V_NAME_F1 (asin), 0x1p11, inf, 20000)
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TEST_INTERVAL (V_NAME_F1 (asin), -0, -inf, 20000)
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