Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
freebsd
GitHub Repository: freebsd/freebsd-src
 Path: blob/main/contrib/arm-optimized-routines/math/aarch64/advsimd/exp2f_1u.c
48378 views
1
/*

2
 * Single-precision vector 2^x function.

3
 *

4
 * Copyright (c) 2019-2024, Arm Limited.

5
 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception

6
 */

7


8
#include "v_math.h"

9
#include "test_defs.h"

10


11
static const struct data

12
{

13
  float32x4_t c0, c1, c2, c3, c4, c5, shift;

14
  uint32x4_t exponent_bias;

15
  float32x4_t special_bound, scale_thresh;

16
  uint32x4_t special_offset, special_bias;

17
} data = {

18
  .shift = V4 (0x1.8p23f),

19
  .exponent_bias = V4 (0x3f800000),

20
  .special_bound = V4 (126.0f),

21
  .scale_thresh = V4 (192.0f),

22
  .special_offset = V4 (0x82000000),

23
  .special_bias = V4 (0x7f000000),

24
  /*  maxerr: 0.878 ulp.  */

25
  .c0 = V4 (0x1.416b5ep-13f),

26
  .c1 = V4 (0x1.5f082ep-10f),

27
  .c2 = V4 (0x1.3b2dep-7f),

28
  .c3 = V4 (0x1.c6af7cp-5f),

29
  .c4 = V4 (0x1.ebfbdcp-3f),

30
  .c5 = V4 (0x1.62e43p-1f),

31
};

32


33
static float32x4_t VPCS_ATTR NOINLINE

34
specialcase (float32x4_t p, float32x4_t n, uint32x4_t e, const struct data *d)

35
{

36
  /* 2^n may overflow, break it up into s1*s2.  */

37
  uint32x4_t b = vandq_u32 (vclezq_f32 (n), d->special_offset);

38
  float32x4_t s1 = vreinterpretq_f32_u32 (vaddq_u32 (b, d->special_bias));

39
  float32x4_t s2 = vreinterpretq_f32_u32 (vsubq_u32 (e, b));

40
  uint32x4_t cmp = vcagtq_f32 (n, d->scale_thresh);

41
  float32x4_t r1 = vmulq_f32 (s1, s1);

42
  float32x4_t r0 = vmulq_f32 (vmulq_f32 (p, s1), s2);

43
  return vreinterpretq_f32_u32 ((cmp & vreinterpretq_u32_f32 (r1))

44
				| (~cmp & vreinterpretq_u32_f32 (r0)));

45
}

46


47
float32x4_t VPCS_ATTR

48
_ZGVnN4v_exp2f_1u (float32x4_t x)

49
{

50
  /* exp2(x) = 2^n * poly(r), with poly(r) in [1/sqrt(2),sqrt(2)]

51
     x = n + r, with r in [-1/2, 1/2].  */

52
  const struct data *d = ptr_barrier (&data);

53
  float32x4_t n = vrndaq_f32 (x);

54
  float32x4_t r = x - n;

55
  uint32x4_t e = vreinterpretq_u32_s32 (vcvtaq_s32_f32 (x)) << 23;

56
  float32x4_t scale = vreinterpretq_f32_u32 (e + d->exponent_bias);

57
  uint32x4_t cmp = vcagtq_f32 (n, d->special_bound);

58


59
  float32x4_t p = vfmaq_f32 (d->c1, d->c0, r);

60
  p = vfmaq_f32 (d->c2, p, r);

61
  p = vfmaq_f32 (d->c3, p, r);

62
  p = vfmaq_f32 (d->c4, p, r);

63
  p = vfmaq_f32 (d->c5, p, r);

64
  p = vfmaq_f32 (v_f32 (1.0f), p, r);

65
  if (unlikely (v_any_u32 (cmp)))

66
    return specialcase (p, n, e, d);

67
  return scale * p;

68
}

69


70
TEST_ULP (_ZGVnN4v_exp2f_1u, 0.4)

71
TEST_DISABLE_FENV (_ZGVnN4v_exp2f_1u)

72
TEST_INTERVAL (_ZGVnN4v_exp2f_1u, 0, 0xffff0000, 10000)

73
TEST_SYM_INTERVAL (_ZGVnN4v_exp2f_1u, 0x1p-14, 0x1p8, 500000)

74


75