Path: blob/main/contrib/arm-optimized-routines/math/aarch64/advsimd/expm1.c
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/*1* Double-precision vector exp(x) - 1 function.2*3* Copyright (c) 2022-2024, Arm Limited.4* SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception5*/67#include "v_math.h"8#include "test_sig.h"9#include "test_defs.h"10#include "v_expm1_inline.h"1112static const struct data13{14struct v_expm1_data d;15#if WANT_SIMD_EXCEPT16uint64x2_t thresh, tiny_bound;17#else18float64x2_t oflow_bound;19#endif20} data = {21.d = V_EXPM1_DATA,22#if WANT_SIMD_EXCEPT23/* asuint64(oflow_bound) - asuint64(0x1p-51), shifted left by 1 for abs24compare. */25.thresh = V2 (0x78c56fa6d34b552),26/* asuint64(0x1p-51) << 1. */27.tiny_bound = V2 (0x3cc0000000000000 << 1),28#else29/* Value above which expm1(x) should overflow. Absolute value of the30underflow bound is greater than this, so it catches both cases - there is31a small window where fallbacks are triggered unnecessarily. */32.oflow_bound = V2 (0x1.62b7d369a5aa9p+9),33#endif34};3536static float64x2_t VPCS_ATTR NOINLINE37special_case (float64x2_t x, uint64x2_t special, const struct data *d)38{39return v_call_f64 (expm1, x, expm1_inline (v_zerofy_f64 (x, special), &d->d),40special);41}4243/* Double-precision vector exp(x) - 1 function.44The maximum error observed error is 2.05 ULP:45_ZGVnN2v_expm1(0x1.6329669eb8c87p-2) got 0x1.a8897eef87b34p-246want 0x1.a8897eef87b32p-2. */47float64x2_t VPCS_ATTR V_NAME_D1 (expm1) (float64x2_t x)48{49const struct data *d = ptr_barrier (&data);5051#if WANT_SIMD_EXCEPT52uint64x2_t ix = vreinterpretq_u64_f64 (x);53/* If fp exceptions are to be triggered correctly, fall back to scalar for54|x| < 2^-51, |x| > oflow_bound, Inf & NaN. Add ix to itself for55shift-left by 1, and compare with thresh which was left-shifted offline -56this is effectively an absolute compare. */57uint64x2_t special58= vcgeq_u64 (vsubq_u64 (vaddq_u64 (ix, ix), d->tiny_bound), d->thresh);59#else60/* Large input, NaNs and Infs. */61uint64x2_t special = vcageq_f64 (x, d->oflow_bound);62#endif6364if (unlikely (v_any_u64 (special)))65return special_case (x, special, d);6667/* expm1(x) ~= p * t + (t - 1). */68return expm1_inline (x, &d->d);69}7071TEST_SIG (V, D, 1, expm1, -9.9, 9.9)72TEST_ULP (V_NAME_D1 (expm1), 1.56)73TEST_DISABLE_FENV_IF_NOT (V_NAME_D1 (expm1), WANT_SIMD_EXCEPT)74TEST_SYM_INTERVAL (V_NAME_D1 (expm1), 0, 0x1p-51, 1000)75TEST_SYM_INTERVAL (V_NAME_D1 (expm1), 0x1p-51, 0x1.62b7d369a5aa9p+9, 100000)76TEST_SYM_INTERVAL (V_NAME_D1 (expm1), 0x1.62b7d369a5aa9p+9, inf, 100)777879