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freebsd
GitHub Repository: freebsd/freebsd-src
Path: blob/main/contrib/arm-optimized-routines/math/aarch64/advsimd/hypotf.c
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/*
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* Single-precision vector hypot(x) function.
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*
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* Copyright (c) 2023-2024, Arm Limited.
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* SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
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*/
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#include "v_math.h"
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#include "test_sig.h"
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#include "test_defs.h"
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#if WANT_SIMD_EXCEPT
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static const struct data
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{
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uint32x4_t tiny_bound, thres;
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} data = {
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.tiny_bound = V4 (0x20000000), /* asuint (0x1p-63). */
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.thres = V4 (0x3f000000), /* asuint (0x1p63) - tiny_bound. */
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};
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#else
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static const struct data
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{
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uint32x4_t tiny_bound;
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uint16x8_t thres;
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} data = {
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.tiny_bound = V4 (0x0C800000), /* asuint (0x1p-102). */
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.thres = V8 (0x7300), /* asuint (inf) - tiny_bound. */
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};
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#endif
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static float32x4_t VPCS_ATTR NOINLINE
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special_case (float32x4_t x, float32x4_t y, float32x4_t sqsum,
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uint16x4_t special)
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{
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return v_call2_f32 (hypotf, x, y, vsqrtq_f32 (sqsum), vmovl_u16 (special));
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}
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/* Vector implementation of single-precision hypot.
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Maximum error observed is 1.21 ULP:
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_ZGVnN4vv_hypotf (0x1.6a419cp-13, 0x1.82a852p-22) got 0x1.6a41d2p-13
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want 0x1.6a41dp-13. */
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#if WANT_SIMD_EXCEPT
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float32x4_t VPCS_ATTR NOINLINE V_NAME_F2 (hypot) (float32x4_t x, float32x4_t y)
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{
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const struct data *d = ptr_barrier (&data);
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float32x4_t ax = vabsq_f32 (x);
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float32x4_t ay = vabsq_f32 (y);
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uint32x4_t ix = vreinterpretq_u32_f32 (ax);
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uint32x4_t iy = vreinterpretq_u32_f32 (ay);
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/* Extreme values, NaNs, and infinities should be handled by the scalar
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fallback for correct flag handling. */
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uint32x4_t specialx = vcgeq_u32 (vsubq_u32 (ix, d->tiny_bound), d->thres);
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uint32x4_t specialy = vcgeq_u32 (vsubq_u32 (iy, d->tiny_bound), d->thres);
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ax = v_zerofy_f32 (ax, specialx);
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ay = v_zerofy_f32 (ay, specialy);
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uint16x4_t special = vaddhn_u32 (specialx, specialy);
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float32x4_t sqsum = vfmaq_f32 (vmulq_f32 (ax, ax), ay, ay);
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if (unlikely (v_any_u16h (special)))
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return special_case (x, y, sqsum, special);
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return vsqrtq_f32 (sqsum);
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}
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#else
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float32x4_t VPCS_ATTR NOINLINE V_NAME_F2 (hypot) (float32x4_t x, float32x4_t y)
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{
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const struct data *d = ptr_barrier (&data);
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float32x4_t sqsum = vfmaq_f32 (vmulq_f32 (x, x), y, y);
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uint16x4_t special
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= vcge_u16 (vsubhn_u32 (vreinterpretq_u32_f32 (sqsum), d->tiny_bound),
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vget_low_u16 (d->thres));
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if (unlikely (v_any_u16h (special)))
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return special_case (x, y, sqsum, special);
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return vsqrtq_f32 (sqsum);
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}
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#endif
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HALF_WIDTH_ALIAS_F2 (hypot)
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TEST_SIG (V, F, 2, hypot, -10.0, 10.0)
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TEST_ULP (V_NAME_F2 (hypot), 1.21)
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TEST_DISABLE_FENV_IF_NOT (V_NAME_F2 (hypot), WANT_SIMD_EXCEPT)
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TEST_INTERVAL2 (V_NAME_F2 (hypot), 0, inf, 0, inf, 10000)
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TEST_INTERVAL2 (V_NAME_F2 (hypot), 0, inf, -0, -inf, 10000)
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TEST_INTERVAL2 (V_NAME_F2 (hypot), -0, -inf, 0, inf, 10000)
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TEST_INTERVAL2 (V_NAME_F2 (hypot), -0, -inf, -0, -inf, 10000)
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