Path: blob/main/contrib/arm-optimized-routines/math/aarch64/advsimd/log.c
48378 views
/*1* Double-precision vector log(x) function.2*3* Copyright (c) 2019-2024, Arm Limited.4* SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception5*/67#include "v_math.h"8#include "test_defs.h"9#include "test_sig.h"1011static const struct data12{13uint64x2_t off, sign_exp_mask, offset_lower_bound;14uint32x4_t special_bound;15float64x2_t c0, c2;16double c1, c3, ln2, c4;17} data = {18/* Rel error: 0x1.6272e588p-56 in [ -0x1.fc1p-9 0x1.009p-8 ]. */19.c0 = V2 (-0x1.ffffffffffff7p-2),20.c1 = 0x1.55555555170d4p-2,21.c2 = V2 (-0x1.0000000399c27p-2),22.c3 = 0x1.999b2e90e94cap-3,23.c4 = -0x1.554e550bd501ep-3,24.ln2 = 0x1.62e42fefa39efp-1,25.sign_exp_mask = V2 (0xfff0000000000000),26.off = V2 (0x3fe6900900000000),27/* Lower bound is 0x0010000000000000. For28optimised register use subnormals are detected after offset has been29subtracted, so lower bound - offset (which wraps around). */30.offset_lower_bound = V2 (0x0010000000000000 - 0x3fe6900900000000),31.special_bound = V4 (0x7fe00000), /* asuint64(inf) - asuint64(0x1p-126). */32};3334#define N (1 << V_LOG_TABLE_BITS)35#define IndexMask (N - 1)3637struct entry38{39float64x2_t invc;40float64x2_t logc;41};4243static inline struct entry44lookup (uint64x2_t i)45{46/* Since N is a power of 2, n % N = n & (N - 1). */47struct entry e;48uint64_t i0 = (vgetq_lane_u64 (i, 0) >> (52 - V_LOG_TABLE_BITS)) & IndexMask;49uint64_t i1 = (vgetq_lane_u64 (i, 1) >> (52 - V_LOG_TABLE_BITS)) & IndexMask;50float64x2_t e0 = vld1q_f64 (&__v_log_data.table[i0].invc);51float64x2_t e1 = vld1q_f64 (&__v_log_data.table[i1].invc);52e.invc = vuzp1q_f64 (e0, e1);53e.logc = vuzp2q_f64 (e0, e1);54return e;55}5657static float64x2_t VPCS_ATTR NOINLINE58special_case (float64x2_t hi, uint64x2_t u_off, float64x2_t y, float64x2_t r2,59uint32x2_t special, const struct data *d)60{61float64x2_t x = vreinterpretq_f64_u64 (vaddq_u64 (u_off, d->off));62return v_call_f64 (log, x, vfmaq_f64 (hi, y, r2), vmovl_u32 (special));63}6465/* Double-precision vector log routine.66The maximum observed error is 2.17 ULP:67_ZGVnN2v_log(0x1.a6129884398a3p+0) got 0x1.ffffff1cca043p-268want 0x1.ffffff1cca045p-2. */69float64x2_t VPCS_ATTR V_NAME_D1 (log) (float64x2_t x)70{71const struct data *d = ptr_barrier (&data);7273/* To avoid having to mov x out of the way, keep u after offset has been74applied, and recover x by adding the offset back in the special-case75handler. */76uint64x2_t u = vreinterpretq_u64_f64 (x);77uint64x2_t u_off = vsubq_u64 (u, d->off);7879/* x = 2^k z; where z is in range [Off,2*Off) and exact.80The range is split into N subintervals.81The ith subinterval contains z and c is near its center. */82int64x2_t k = vshrq_n_s64 (vreinterpretq_s64_u64 (u_off), 52);83uint64x2_t iz = vsubq_u64 (u, vandq_u64 (u_off, d->sign_exp_mask));84float64x2_t z = vreinterpretq_f64_u64 (iz);8586struct entry e = lookup (u_off);8788uint32x2_t special = vcge_u32 (vsubhn_u64 (u_off, d->offset_lower_bound),89vget_low_u32 (d->special_bound));9091/* log(x) = log1p(z/c-1) + log(c) + k*Ln2. */92float64x2_t r = vfmaq_f64 (v_f64 (-1.0), z, e.invc);93float64x2_t kd = vcvtq_f64_s64 (k);9495/* hi = r + log(c) + k*Ln2. */96float64x2_t ln2_and_c4 = vld1q_f64 (&d->ln2);97float64x2_t hi = vfmaq_laneq_f64 (vaddq_f64 (e.logc, r), kd, ln2_and_c4, 0);9899/* y = r2*(A0 + r*A1 + r2*(A2 + r*A3 + r2*A4)) + hi. */100float64x2_t odd_coeffs = vld1q_f64 (&d->c1);101float64x2_t r2 = vmulq_f64 (r, r);102float64x2_t y = vfmaq_laneq_f64 (d->c2, r, odd_coeffs, 1);103float64x2_t p = vfmaq_laneq_f64 (d->c0, r, odd_coeffs, 0);104y = vfmaq_laneq_f64 (y, r2, ln2_and_c4, 1);105y = vfmaq_f64 (p, r2, y);106107if (unlikely (v_any_u32h (special)))108return special_case (hi, u_off, y, r2, special, d);109return vfmaq_f64 (hi, y, r2);110}111112TEST_SIG (V, D, 1, log, 0.01, 11.1)113TEST_ULP (V_NAME_D1 (log), 1.67)114TEST_DISABLE_FENV_IF_NOT (V_NAME_D1 (log), WANT_SIMD_EXCEPT)115TEST_INTERVAL (V_NAME_D1 (log), 0, 0xffff000000000000, 10000)116TEST_INTERVAL (V_NAME_D1 (log), 0x1p-4, 0x1p4, 400000)117TEST_INTERVAL (V_NAME_D1 (log), 0, inf, 400000)118119120