Path: blob/main/contrib/arm-optimized-routines/math/aarch64/sve/atanhf.c
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/*1* Single-precision vector atanh(x) function.2*3* Copyright (c) 2023-2024, Arm Limited.4* SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception5*/67#include "sv_math.h"8#include "test_sig.h"9#include "test_defs.h"1011#include "sv_log1pf_inline.h"1213#define One (0x3f800000)14#define Half (0x3f000000)1516static svfloat32_t NOINLINE17special_case (svuint32_t iax, svuint32_t sign, svfloat32_t halfsign,18svfloat32_t y, svbool_t special)19{20svfloat32_t x = svreinterpret_f32 (sveor_x (svptrue_b32 (), iax, sign));21y = svmul_x (svptrue_b32 (), halfsign, y);22return sv_call_f32 (atanhf, x, y, special);23}2425/* Approximation for vector single-precision atanh(x) using modified log1p.26The maximum error is 1.99 ULP:27_ZGVsMxv_atanhf(0x1.f1583p-5) got 0x1.f1f4fap-528want 0x1.f1f4f6p-5. */29svfloat32_t SV_NAME_F1 (atanh) (svfloat32_t x, const svbool_t pg)30{31svfloat32_t ax = svabs_x (pg, x);32svuint32_t iax = svreinterpret_u32 (ax);33svuint32_t sign = sveor_x (pg, svreinterpret_u32 (x), iax);34svfloat32_t halfsign = svreinterpret_f32 (svorr_x (pg, sign, Half));35svbool_t special = svcmpge (pg, iax, One);3637/* Computation is performed based on the following sequence of equality:38* (1+x)/(1-x) = 1 + 2x/(1-x). */39svfloat32_t y = svadd_x (pg, ax, ax);40y = svdiv_x (pg, y, svsub_x (pg, sv_f32 (1), ax));41/* ln((1+x)/(1-x)) = ln(1+2x/(1-x)) = ln(1 + y). */42y = sv_log1pf_inline (y, pg);4344if (unlikely (svptest_any (pg, special)))45return special_case (iax, sign, halfsign, y, special);4647return svmul_x (pg, halfsign, y);48}4950TEST_SIG (SV, F, 1, atanh, -1.0, 1.0)51TEST_ULP (SV_NAME_F1 (atanh), 1.50)52TEST_DISABLE_FENV (SV_NAME_F1 (atanh))53TEST_SYM_INTERVAL (SV_NAME_F1 (atanh), 0, 0x1p-12, 1000)54TEST_SYM_INTERVAL (SV_NAME_F1 (atanh), 0x1p-12, 1, 20000)55TEST_SYM_INTERVAL (SV_NAME_F1 (atanh), 1, inf, 1000)56/* atanh is asymptotic at 1, which is the default control value - have to set57-c 0 specially to ensure fp exceptions are triggered correctly (choice of58control lane is irrelevant if fp exceptions are disabled). */59TEST_CONTROL_VALUE (SV_NAME_F1 (atanh), 0)60CLOSE_SVE_ATTR616263