Path: blob/main/contrib/llvm-project/clang/lib/Headers/avx512bwintrin.h
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/*===------------- avx512bwintrin.h - AVX512BW intrinsics ------------------===1*2*3* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.4* See https://llvm.org/LICENSE.txt for license information.5* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception6*7*===-----------------------------------------------------------------------===8*/9#ifndef __IMMINTRIN_H10#error "Never use <avx512bwintrin.h> directly; include <immintrin.h> instead."11#endif1213#ifndef __AVX512BWINTRIN_H14#define __AVX512BWINTRIN_H1516typedef unsigned int __mmask32;17typedef unsigned long long __mmask64;1819/* Define the default attributes for the functions in this file. */20#define __DEFAULT_FN_ATTRS512 \21__attribute__((__always_inline__, __nodebug__, \22__target__("avx512bw,evex512"), __min_vector_width__(512)))23#define __DEFAULT_FN_ATTRS \24__attribute__((__always_inline__, __nodebug__, \25__target__("avx512bw,no-evex512")))2627static __inline __mmask32 __DEFAULT_FN_ATTRS28_knot_mask32(__mmask32 __M)29{30return __builtin_ia32_knotsi(__M);31}3233static __inline __mmask64 __DEFAULT_FN_ATTRS _knot_mask64(__mmask64 __M) {34return __builtin_ia32_knotdi(__M);35}3637static __inline__ __mmask32 __DEFAULT_FN_ATTRS38_kand_mask32(__mmask32 __A, __mmask32 __B)39{40return (__mmask32)__builtin_ia32_kandsi((__mmask32)__A, (__mmask32)__B);41}4243static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kand_mask64(__mmask64 __A,44__mmask64 __B) {45return (__mmask64)__builtin_ia32_kanddi((__mmask64)__A, (__mmask64)__B);46}4748static __inline__ __mmask32 __DEFAULT_FN_ATTRS49_kandn_mask32(__mmask32 __A, __mmask32 __B)50{51return (__mmask32)__builtin_ia32_kandnsi((__mmask32)__A, (__mmask32)__B);52}5354static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kandn_mask64(__mmask64 __A,55__mmask64 __B) {56return (__mmask64)__builtin_ia32_kandndi((__mmask64)__A, (__mmask64)__B);57}5859static __inline__ __mmask32 __DEFAULT_FN_ATTRS60_kor_mask32(__mmask32 __A, __mmask32 __B)61{62return (__mmask32)__builtin_ia32_korsi((__mmask32)__A, (__mmask32)__B);63}6465static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kor_mask64(__mmask64 __A,66__mmask64 __B) {67return (__mmask64)__builtin_ia32_kordi((__mmask64)__A, (__mmask64)__B);68}6970static __inline__ __mmask32 __DEFAULT_FN_ATTRS71_kxnor_mask32(__mmask32 __A, __mmask32 __B)72{73return (__mmask32)__builtin_ia32_kxnorsi((__mmask32)__A, (__mmask32)__B);74}7576static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kxnor_mask64(__mmask64 __A,77__mmask64 __B) {78return (__mmask64)__builtin_ia32_kxnordi((__mmask64)__A, (__mmask64)__B);79}8081static __inline__ __mmask32 __DEFAULT_FN_ATTRS82_kxor_mask32(__mmask32 __A, __mmask32 __B)83{84return (__mmask32)__builtin_ia32_kxorsi((__mmask32)__A, (__mmask32)__B);85}8687static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kxor_mask64(__mmask64 __A,88__mmask64 __B) {89return (__mmask64)__builtin_ia32_kxordi((__mmask64)__A, (__mmask64)__B);90}9192static __inline__ unsigned char __DEFAULT_FN_ATTRS93_kortestc_mask32_u8(__mmask32 __A, __mmask32 __B)94{95return (unsigned char)__builtin_ia32_kortestcsi(__A, __B);96}9798static __inline__ unsigned char __DEFAULT_FN_ATTRS99_kortestz_mask32_u8(__mmask32 __A, __mmask32 __B)100{101return (unsigned char)__builtin_ia32_kortestzsi(__A, __B);102}103104static __inline__ unsigned char __DEFAULT_FN_ATTRS105_kortest_mask32_u8(__mmask32 __A, __mmask32 __B, unsigned char *__C) {106*__C = (unsigned char)__builtin_ia32_kortestcsi(__A, __B);107return (unsigned char)__builtin_ia32_kortestzsi(__A, __B);108}109110static __inline__ unsigned char __DEFAULT_FN_ATTRS111_kortestc_mask64_u8(__mmask64 __A, __mmask64 __B) {112return (unsigned char)__builtin_ia32_kortestcdi(__A, __B);113}114115static __inline__ unsigned char __DEFAULT_FN_ATTRS116_kortestz_mask64_u8(__mmask64 __A, __mmask64 __B) {117return (unsigned char)__builtin_ia32_kortestzdi(__A, __B);118}119120static __inline__ unsigned char __DEFAULT_FN_ATTRS121_kortest_mask64_u8(__mmask64 __A, __mmask64 __B, unsigned char *__C) {122*__C = (unsigned char)__builtin_ia32_kortestcdi(__A, __B);123return (unsigned char)__builtin_ia32_kortestzdi(__A, __B);124}125126static __inline__ unsigned char __DEFAULT_FN_ATTRS127_ktestc_mask32_u8(__mmask32 __A, __mmask32 __B)128{129return (unsigned char)__builtin_ia32_ktestcsi(__A, __B);130}131132static __inline__ unsigned char __DEFAULT_FN_ATTRS133_ktestz_mask32_u8(__mmask32 __A, __mmask32 __B)134{135return (unsigned char)__builtin_ia32_ktestzsi(__A, __B);136}137138static __inline__ unsigned char __DEFAULT_FN_ATTRS139_ktest_mask32_u8(__mmask32 __A, __mmask32 __B, unsigned char *__C) {140*__C = (unsigned char)__builtin_ia32_ktestcsi(__A, __B);141return (unsigned char)__builtin_ia32_ktestzsi(__A, __B);142}143144static __inline__ unsigned char __DEFAULT_FN_ATTRS145_ktestc_mask64_u8(__mmask64 __A, __mmask64 __B) {146return (unsigned char)__builtin_ia32_ktestcdi(__A, __B);147}148149static __inline__ unsigned char __DEFAULT_FN_ATTRS150_ktestz_mask64_u8(__mmask64 __A, __mmask64 __B) {151return (unsigned char)__builtin_ia32_ktestzdi(__A, __B);152}153154static __inline__ unsigned char __DEFAULT_FN_ATTRS155_ktest_mask64_u8(__mmask64 __A, __mmask64 __B, unsigned char *__C) {156*__C = (unsigned char)__builtin_ia32_ktestcdi(__A, __B);157return (unsigned char)__builtin_ia32_ktestzdi(__A, __B);158}159160static __inline__ __mmask32 __DEFAULT_FN_ATTRS161_kadd_mask32(__mmask32 __A, __mmask32 __B)162{163return (__mmask32)__builtin_ia32_kaddsi((__mmask32)__A, (__mmask32)__B);164}165166static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kadd_mask64(__mmask64 __A,167__mmask64 __B) {168return (__mmask64)__builtin_ia32_kadddi((__mmask64)__A, (__mmask64)__B);169}170171#define _kshiftli_mask32(A, I) \172((__mmask32)__builtin_ia32_kshiftlisi((__mmask32)(A), (unsigned int)(I)))173174#define _kshiftri_mask32(A, I) \175((__mmask32)__builtin_ia32_kshiftrisi((__mmask32)(A), (unsigned int)(I)))176177#define _kshiftli_mask64(A, I) \178((__mmask64)__builtin_ia32_kshiftlidi((__mmask64)(A), (unsigned int)(I)))179180#define _kshiftri_mask64(A, I) \181((__mmask64)__builtin_ia32_kshiftridi((__mmask64)(A), (unsigned int)(I)))182183static __inline__ unsigned int __DEFAULT_FN_ATTRS184_cvtmask32_u32(__mmask32 __A) {185return (unsigned int)__builtin_ia32_kmovd((__mmask32)__A);186}187188static __inline__ unsigned long long __DEFAULT_FN_ATTRS189_cvtmask64_u64(__mmask64 __A) {190return (unsigned long long)__builtin_ia32_kmovq((__mmask64)__A);191}192193static __inline__ __mmask32 __DEFAULT_FN_ATTRS194_cvtu32_mask32(unsigned int __A) {195return (__mmask32)__builtin_ia32_kmovd((__mmask32)__A);196}197198static __inline__ __mmask64 __DEFAULT_FN_ATTRS199_cvtu64_mask64(unsigned long long __A) {200return (__mmask64)__builtin_ia32_kmovq((__mmask64)__A);201}202203static __inline__ __mmask32 __DEFAULT_FN_ATTRS204_load_mask32(__mmask32 *__A) {205return (__mmask32)__builtin_ia32_kmovd(*(__mmask32 *)__A);206}207208static __inline__ __mmask64 __DEFAULT_FN_ATTRS _load_mask64(__mmask64 *__A) {209return (__mmask64)__builtin_ia32_kmovq(*(__mmask64 *)__A);210}211212static __inline__ void __DEFAULT_FN_ATTRS213_store_mask32(__mmask32 *__A, __mmask32 __B) {214*(__mmask32 *)__A = __builtin_ia32_kmovd((__mmask32)__B);215}216217static __inline__ void __DEFAULT_FN_ATTRS _store_mask64(__mmask64 *__A,218__mmask64 __B) {219*(__mmask64 *)__A = __builtin_ia32_kmovq((__mmask64)__B);220}221222/* Integer compare */223224#define _mm512_cmp_epi8_mask(a, b, p) \225((__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)(__m512i)(a), \226(__v64qi)(__m512i)(b), (int)(p), \227(__mmask64)-1))228229#define _mm512_mask_cmp_epi8_mask(m, a, b, p) \230((__mmask64)__builtin_ia32_cmpb512_mask((__v64qi)(__m512i)(a), \231(__v64qi)(__m512i)(b), (int)(p), \232(__mmask64)(m)))233234#define _mm512_cmp_epu8_mask(a, b, p) \235((__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)(__m512i)(a), \236(__v64qi)(__m512i)(b), (int)(p), \237(__mmask64)-1))238239#define _mm512_mask_cmp_epu8_mask(m, a, b, p) \240((__mmask64)__builtin_ia32_ucmpb512_mask((__v64qi)(__m512i)(a), \241(__v64qi)(__m512i)(b), (int)(p), \242(__mmask64)(m)))243244#define _mm512_cmp_epi16_mask(a, b, p) \245((__mmask32)__builtin_ia32_cmpw512_mask((__v32hi)(__m512i)(a), \246(__v32hi)(__m512i)(b), (int)(p), \247(__mmask32)-1))248249#define _mm512_mask_cmp_epi16_mask(m, a, b, p) \250((__mmask32)__builtin_ia32_cmpw512_mask((__v32hi)(__m512i)(a), \251(__v32hi)(__m512i)(b), (int)(p), \252(__mmask32)(m)))253254#define _mm512_cmp_epu16_mask(a, b, p) \255((__mmask32)__builtin_ia32_ucmpw512_mask((__v32hi)(__m512i)(a), \256(__v32hi)(__m512i)(b), (int)(p), \257(__mmask32)-1))258259#define _mm512_mask_cmp_epu16_mask(m, a, b, p) \260((__mmask32)__builtin_ia32_ucmpw512_mask((__v32hi)(__m512i)(a), \261(__v32hi)(__m512i)(b), (int)(p), \262(__mmask32)(m)))263264#define _mm512_cmpeq_epi8_mask(A, B) \265_mm512_cmp_epi8_mask((A), (B), _MM_CMPINT_EQ)266#define _mm512_mask_cmpeq_epi8_mask(k, A, B) \267_mm512_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_EQ)268#define _mm512_cmpge_epi8_mask(A, B) \269_mm512_cmp_epi8_mask((A), (B), _MM_CMPINT_GE)270#define _mm512_mask_cmpge_epi8_mask(k, A, B) \271_mm512_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_GE)272#define _mm512_cmpgt_epi8_mask(A, B) \273_mm512_cmp_epi8_mask((A), (B), _MM_CMPINT_GT)274#define _mm512_mask_cmpgt_epi8_mask(k, A, B) \275_mm512_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_GT)276#define _mm512_cmple_epi8_mask(A, B) \277_mm512_cmp_epi8_mask((A), (B), _MM_CMPINT_LE)278#define _mm512_mask_cmple_epi8_mask(k, A, B) \279_mm512_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_LE)280#define _mm512_cmplt_epi8_mask(A, B) \281_mm512_cmp_epi8_mask((A), (B), _MM_CMPINT_LT)282#define _mm512_mask_cmplt_epi8_mask(k, A, B) \283_mm512_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_LT)284#define _mm512_cmpneq_epi8_mask(A, B) \285_mm512_cmp_epi8_mask((A), (B), _MM_CMPINT_NE)286#define _mm512_mask_cmpneq_epi8_mask(k, A, B) \287_mm512_mask_cmp_epi8_mask((k), (A), (B), _MM_CMPINT_NE)288289#define _mm512_cmpeq_epu8_mask(A, B) \290_mm512_cmp_epu8_mask((A), (B), _MM_CMPINT_EQ)291#define _mm512_mask_cmpeq_epu8_mask(k, A, B) \292_mm512_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_EQ)293#define _mm512_cmpge_epu8_mask(A, B) \294_mm512_cmp_epu8_mask((A), (B), _MM_CMPINT_GE)295#define _mm512_mask_cmpge_epu8_mask(k, A, B) \296_mm512_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_GE)297#define _mm512_cmpgt_epu8_mask(A, B) \298_mm512_cmp_epu8_mask((A), (B), _MM_CMPINT_GT)299#define _mm512_mask_cmpgt_epu8_mask(k, A, B) \300_mm512_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_GT)301#define _mm512_cmple_epu8_mask(A, B) \302_mm512_cmp_epu8_mask((A), (B), _MM_CMPINT_LE)303#define _mm512_mask_cmple_epu8_mask(k, A, B) \304_mm512_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_LE)305#define _mm512_cmplt_epu8_mask(A, B) \306_mm512_cmp_epu8_mask((A), (B), _MM_CMPINT_LT)307#define _mm512_mask_cmplt_epu8_mask(k, A, B) \308_mm512_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_LT)309#define _mm512_cmpneq_epu8_mask(A, B) \310_mm512_cmp_epu8_mask((A), (B), _MM_CMPINT_NE)311#define _mm512_mask_cmpneq_epu8_mask(k, A, B) \312_mm512_mask_cmp_epu8_mask((k), (A), (B), _MM_CMPINT_NE)313314#define _mm512_cmpeq_epi16_mask(A, B) \315_mm512_cmp_epi16_mask((A), (B), _MM_CMPINT_EQ)316#define _mm512_mask_cmpeq_epi16_mask(k, A, B) \317_mm512_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_EQ)318#define _mm512_cmpge_epi16_mask(A, B) \319_mm512_cmp_epi16_mask((A), (B), _MM_CMPINT_GE)320#define _mm512_mask_cmpge_epi16_mask(k, A, B) \321_mm512_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_GE)322#define _mm512_cmpgt_epi16_mask(A, B) \323_mm512_cmp_epi16_mask((A), (B), _MM_CMPINT_GT)324#define _mm512_mask_cmpgt_epi16_mask(k, A, B) \325_mm512_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_GT)326#define _mm512_cmple_epi16_mask(A, B) \327_mm512_cmp_epi16_mask((A), (B), _MM_CMPINT_LE)328#define _mm512_mask_cmple_epi16_mask(k, A, B) \329_mm512_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_LE)330#define _mm512_cmplt_epi16_mask(A, B) \331_mm512_cmp_epi16_mask((A), (B), _MM_CMPINT_LT)332#define _mm512_mask_cmplt_epi16_mask(k, A, B) \333_mm512_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_LT)334#define _mm512_cmpneq_epi16_mask(A, B) \335_mm512_cmp_epi16_mask((A), (B), _MM_CMPINT_NE)336#define _mm512_mask_cmpneq_epi16_mask(k, A, B) \337_mm512_mask_cmp_epi16_mask((k), (A), (B), _MM_CMPINT_NE)338339#define _mm512_cmpeq_epu16_mask(A, B) \340_mm512_cmp_epu16_mask((A), (B), _MM_CMPINT_EQ)341#define _mm512_mask_cmpeq_epu16_mask(k, A, B) \342_mm512_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_EQ)343#define _mm512_cmpge_epu16_mask(A, B) \344_mm512_cmp_epu16_mask((A), (B), _MM_CMPINT_GE)345#define _mm512_mask_cmpge_epu16_mask(k, A, B) \346_mm512_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_GE)347#define _mm512_cmpgt_epu16_mask(A, B) \348_mm512_cmp_epu16_mask((A), (B), _MM_CMPINT_GT)349#define _mm512_mask_cmpgt_epu16_mask(k, A, B) \350_mm512_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_GT)351#define _mm512_cmple_epu16_mask(A, B) \352_mm512_cmp_epu16_mask((A), (B), _MM_CMPINT_LE)353#define _mm512_mask_cmple_epu16_mask(k, A, B) \354_mm512_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_LE)355#define _mm512_cmplt_epu16_mask(A, B) \356_mm512_cmp_epu16_mask((A), (B), _MM_CMPINT_LT)357#define _mm512_mask_cmplt_epu16_mask(k, A, B) \358_mm512_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_LT)359#define _mm512_cmpneq_epu16_mask(A, B) \360_mm512_cmp_epu16_mask((A), (B), _MM_CMPINT_NE)361#define _mm512_mask_cmpneq_epu16_mask(k, A, B) \362_mm512_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_NE)363364static __inline__ __m512i __DEFAULT_FN_ATTRS512365_mm512_add_epi8 (__m512i __A, __m512i __B) {366return (__m512i) ((__v64qu) __A + (__v64qu) __B);367}368369static __inline__ __m512i __DEFAULT_FN_ATTRS512370_mm512_mask_add_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {371return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,372(__v64qi)_mm512_add_epi8(__A, __B),373(__v64qi)__W);374}375376static __inline__ __m512i __DEFAULT_FN_ATTRS512377_mm512_maskz_add_epi8(__mmask64 __U, __m512i __A, __m512i __B) {378return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,379(__v64qi)_mm512_add_epi8(__A, __B),380(__v64qi)_mm512_setzero_si512());381}382383static __inline__ __m512i __DEFAULT_FN_ATTRS512384_mm512_sub_epi8 (__m512i __A, __m512i __B) {385return (__m512i) ((__v64qu) __A - (__v64qu) __B);386}387388static __inline__ __m512i __DEFAULT_FN_ATTRS512389_mm512_mask_sub_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {390return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,391(__v64qi)_mm512_sub_epi8(__A, __B),392(__v64qi)__W);393}394395static __inline__ __m512i __DEFAULT_FN_ATTRS512396_mm512_maskz_sub_epi8(__mmask64 __U, __m512i __A, __m512i __B) {397return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,398(__v64qi)_mm512_sub_epi8(__A, __B),399(__v64qi)_mm512_setzero_si512());400}401402static __inline__ __m512i __DEFAULT_FN_ATTRS512403_mm512_add_epi16 (__m512i __A, __m512i __B) {404return (__m512i) ((__v32hu) __A + (__v32hu) __B);405}406407static __inline__ __m512i __DEFAULT_FN_ATTRS512408_mm512_mask_add_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {409return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,410(__v32hi)_mm512_add_epi16(__A, __B),411(__v32hi)__W);412}413414static __inline__ __m512i __DEFAULT_FN_ATTRS512415_mm512_maskz_add_epi16(__mmask32 __U, __m512i __A, __m512i __B) {416return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,417(__v32hi)_mm512_add_epi16(__A, __B),418(__v32hi)_mm512_setzero_si512());419}420421static __inline__ __m512i __DEFAULT_FN_ATTRS512422_mm512_sub_epi16 (__m512i __A, __m512i __B) {423return (__m512i) ((__v32hu) __A - (__v32hu) __B);424}425426static __inline__ __m512i __DEFAULT_FN_ATTRS512427_mm512_mask_sub_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {428return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,429(__v32hi)_mm512_sub_epi16(__A, __B),430(__v32hi)__W);431}432433static __inline__ __m512i __DEFAULT_FN_ATTRS512434_mm512_maskz_sub_epi16(__mmask32 __U, __m512i __A, __m512i __B) {435return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,436(__v32hi)_mm512_sub_epi16(__A, __B),437(__v32hi)_mm512_setzero_si512());438}439440static __inline__ __m512i __DEFAULT_FN_ATTRS512441_mm512_mullo_epi16 (__m512i __A, __m512i __B) {442return (__m512i) ((__v32hu) __A * (__v32hu) __B);443}444445static __inline__ __m512i __DEFAULT_FN_ATTRS512446_mm512_mask_mullo_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {447return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,448(__v32hi)_mm512_mullo_epi16(__A, __B),449(__v32hi)__W);450}451452static __inline__ __m512i __DEFAULT_FN_ATTRS512453_mm512_maskz_mullo_epi16(__mmask32 __U, __m512i __A, __m512i __B) {454return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,455(__v32hi)_mm512_mullo_epi16(__A, __B),456(__v32hi)_mm512_setzero_si512());457}458459static __inline__ __m512i __DEFAULT_FN_ATTRS512460_mm512_mask_blend_epi8 (__mmask64 __U, __m512i __A, __m512i __W)461{462return (__m512i) __builtin_ia32_selectb_512 ((__mmask64) __U,463(__v64qi) __W,464(__v64qi) __A);465}466467static __inline__ __m512i __DEFAULT_FN_ATTRS512468_mm512_mask_blend_epi16 (__mmask32 __U, __m512i __A, __m512i __W)469{470return (__m512i) __builtin_ia32_selectw_512 ((__mmask32) __U,471(__v32hi) __W,472(__v32hi) __A);473}474475static __inline__ __m512i __DEFAULT_FN_ATTRS512476_mm512_abs_epi8 (__m512i __A)477{478return (__m512i)__builtin_elementwise_abs((__v64qs)__A);479}480481static __inline__ __m512i __DEFAULT_FN_ATTRS512482_mm512_mask_abs_epi8 (__m512i __W, __mmask64 __U, __m512i __A)483{484return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,485(__v64qi)_mm512_abs_epi8(__A),486(__v64qi)__W);487}488489static __inline__ __m512i __DEFAULT_FN_ATTRS512490_mm512_maskz_abs_epi8 (__mmask64 __U, __m512i __A)491{492return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,493(__v64qi)_mm512_abs_epi8(__A),494(__v64qi)_mm512_setzero_si512());495}496497static __inline__ __m512i __DEFAULT_FN_ATTRS512498_mm512_abs_epi16 (__m512i __A)499{500return (__m512i)__builtin_elementwise_abs((__v32hi)__A);501}502503static __inline__ __m512i __DEFAULT_FN_ATTRS512504_mm512_mask_abs_epi16 (__m512i __W, __mmask32 __U, __m512i __A)505{506return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,507(__v32hi)_mm512_abs_epi16(__A),508(__v32hi)__W);509}510511static __inline__ __m512i __DEFAULT_FN_ATTRS512512_mm512_maskz_abs_epi16 (__mmask32 __U, __m512i __A)513{514return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,515(__v32hi)_mm512_abs_epi16(__A),516(__v32hi)_mm512_setzero_si512());517}518519static __inline__ __m512i __DEFAULT_FN_ATTRS512520_mm512_packs_epi32(__m512i __A, __m512i __B)521{522return (__m512i)__builtin_ia32_packssdw512((__v16si)__A, (__v16si)__B);523}524525static __inline__ __m512i __DEFAULT_FN_ATTRS512526_mm512_maskz_packs_epi32(__mmask32 __M, __m512i __A, __m512i __B)527{528return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,529(__v32hi)_mm512_packs_epi32(__A, __B),530(__v32hi)_mm512_setzero_si512());531}532533static __inline__ __m512i __DEFAULT_FN_ATTRS512534_mm512_mask_packs_epi32(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B)535{536return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,537(__v32hi)_mm512_packs_epi32(__A, __B),538(__v32hi)__W);539}540541static __inline__ __m512i __DEFAULT_FN_ATTRS512542_mm512_packs_epi16(__m512i __A, __m512i __B)543{544return (__m512i)__builtin_ia32_packsswb512((__v32hi)__A, (__v32hi) __B);545}546547static __inline__ __m512i __DEFAULT_FN_ATTRS512548_mm512_mask_packs_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)549{550return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,551(__v64qi)_mm512_packs_epi16(__A, __B),552(__v64qi)__W);553}554555static __inline__ __m512i __DEFAULT_FN_ATTRS512556_mm512_maskz_packs_epi16(__mmask64 __M, __m512i __A, __m512i __B)557{558return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,559(__v64qi)_mm512_packs_epi16(__A, __B),560(__v64qi)_mm512_setzero_si512());561}562563static __inline__ __m512i __DEFAULT_FN_ATTRS512564_mm512_packus_epi32(__m512i __A, __m512i __B)565{566return (__m512i)__builtin_ia32_packusdw512((__v16si) __A, (__v16si) __B);567}568569static __inline__ __m512i __DEFAULT_FN_ATTRS512570_mm512_maskz_packus_epi32(__mmask32 __M, __m512i __A, __m512i __B)571{572return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,573(__v32hi)_mm512_packus_epi32(__A, __B),574(__v32hi)_mm512_setzero_si512());575}576577static __inline__ __m512i __DEFAULT_FN_ATTRS512578_mm512_mask_packus_epi32(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B)579{580return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,581(__v32hi)_mm512_packus_epi32(__A, __B),582(__v32hi)__W);583}584585static __inline__ __m512i __DEFAULT_FN_ATTRS512586_mm512_packus_epi16(__m512i __A, __m512i __B)587{588return (__m512i)__builtin_ia32_packuswb512((__v32hi) __A, (__v32hi) __B);589}590591static __inline__ __m512i __DEFAULT_FN_ATTRS512592_mm512_mask_packus_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)593{594return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,595(__v64qi)_mm512_packus_epi16(__A, __B),596(__v64qi)__W);597}598599static __inline__ __m512i __DEFAULT_FN_ATTRS512600_mm512_maskz_packus_epi16(__mmask64 __M, __m512i __A, __m512i __B)601{602return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,603(__v64qi)_mm512_packus_epi16(__A, __B),604(__v64qi)_mm512_setzero_si512());605}606607static __inline__ __m512i __DEFAULT_FN_ATTRS512608_mm512_adds_epi8 (__m512i __A, __m512i __B)609{610return (__m512i)__builtin_elementwise_add_sat((__v64qs)__A, (__v64qs)__B);611}612613static __inline__ __m512i __DEFAULT_FN_ATTRS512614_mm512_mask_adds_epi8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)615{616return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,617(__v64qi)_mm512_adds_epi8(__A, __B),618(__v64qi)__W);619}620621static __inline__ __m512i __DEFAULT_FN_ATTRS512622_mm512_maskz_adds_epi8 (__mmask64 __U, __m512i __A, __m512i __B)623{624return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,625(__v64qi)_mm512_adds_epi8(__A, __B),626(__v64qi)_mm512_setzero_si512());627}628629static __inline__ __m512i __DEFAULT_FN_ATTRS512630_mm512_adds_epi16 (__m512i __A, __m512i __B)631{632return (__m512i)__builtin_elementwise_add_sat((__v32hi)__A, (__v32hi)__B);633}634635static __inline__ __m512i __DEFAULT_FN_ATTRS512636_mm512_mask_adds_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)637{638return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,639(__v32hi)_mm512_adds_epi16(__A, __B),640(__v32hi)__W);641}642643static __inline__ __m512i __DEFAULT_FN_ATTRS512644_mm512_maskz_adds_epi16 (__mmask32 __U, __m512i __A, __m512i __B)645{646return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,647(__v32hi)_mm512_adds_epi16(__A, __B),648(__v32hi)_mm512_setzero_si512());649}650651static __inline__ __m512i __DEFAULT_FN_ATTRS512652_mm512_adds_epu8 (__m512i __A, __m512i __B)653{654return (__m512i)__builtin_elementwise_add_sat((__v64qu) __A, (__v64qu) __B);655}656657static __inline__ __m512i __DEFAULT_FN_ATTRS512658_mm512_mask_adds_epu8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)659{660return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,661(__v64qi)_mm512_adds_epu8(__A, __B),662(__v64qi)__W);663}664665static __inline__ __m512i __DEFAULT_FN_ATTRS512666_mm512_maskz_adds_epu8 (__mmask64 __U, __m512i __A, __m512i __B)667{668return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,669(__v64qi)_mm512_adds_epu8(__A, __B),670(__v64qi)_mm512_setzero_si512());671}672673static __inline__ __m512i __DEFAULT_FN_ATTRS512674_mm512_adds_epu16 (__m512i __A, __m512i __B)675{676return (__m512i)__builtin_elementwise_add_sat((__v32hu) __A, (__v32hu) __B);677}678679static __inline__ __m512i __DEFAULT_FN_ATTRS512680_mm512_mask_adds_epu16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)681{682return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,683(__v32hi)_mm512_adds_epu16(__A, __B),684(__v32hi)__W);685}686687static __inline__ __m512i __DEFAULT_FN_ATTRS512688_mm512_maskz_adds_epu16 (__mmask32 __U, __m512i __A, __m512i __B)689{690return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,691(__v32hi)_mm512_adds_epu16(__A, __B),692(__v32hi)_mm512_setzero_si512());693}694695static __inline__ __m512i __DEFAULT_FN_ATTRS512696_mm512_avg_epu8 (__m512i __A, __m512i __B)697{698return (__m512i)__builtin_ia32_pavgb512((__v64qi)__A, (__v64qi)__B);699}700701static __inline__ __m512i __DEFAULT_FN_ATTRS512702_mm512_mask_avg_epu8 (__m512i __W, __mmask64 __U, __m512i __A,703__m512i __B)704{705return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,706(__v64qi)_mm512_avg_epu8(__A, __B),707(__v64qi)__W);708}709710static __inline__ __m512i __DEFAULT_FN_ATTRS512711_mm512_maskz_avg_epu8 (__mmask64 __U, __m512i __A, __m512i __B)712{713return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,714(__v64qi)_mm512_avg_epu8(__A, __B),715(__v64qi)_mm512_setzero_si512());716}717718static __inline__ __m512i __DEFAULT_FN_ATTRS512719_mm512_avg_epu16 (__m512i __A, __m512i __B)720{721return (__m512i)__builtin_ia32_pavgw512((__v32hi)__A, (__v32hi)__B);722}723724static __inline__ __m512i __DEFAULT_FN_ATTRS512725_mm512_mask_avg_epu16 (__m512i __W, __mmask32 __U, __m512i __A,726__m512i __B)727{728return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,729(__v32hi)_mm512_avg_epu16(__A, __B),730(__v32hi)__W);731}732733static __inline__ __m512i __DEFAULT_FN_ATTRS512734_mm512_maskz_avg_epu16 (__mmask32 __U, __m512i __A, __m512i __B)735{736return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,737(__v32hi)_mm512_avg_epu16(__A, __B),738(__v32hi) _mm512_setzero_si512());739}740741static __inline__ __m512i __DEFAULT_FN_ATTRS512742_mm512_max_epi8 (__m512i __A, __m512i __B)743{744return (__m512i)__builtin_elementwise_max((__v64qs) __A, (__v64qs) __B);745}746747static __inline__ __m512i __DEFAULT_FN_ATTRS512748_mm512_maskz_max_epi8 (__mmask64 __M, __m512i __A, __m512i __B)749{750return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,751(__v64qi)_mm512_max_epi8(__A, __B),752(__v64qi)_mm512_setzero_si512());753}754755static __inline__ __m512i __DEFAULT_FN_ATTRS512756_mm512_mask_max_epi8 (__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)757{758return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,759(__v64qi)_mm512_max_epi8(__A, __B),760(__v64qi)__W);761}762763static __inline__ __m512i __DEFAULT_FN_ATTRS512764_mm512_max_epi16 (__m512i __A, __m512i __B)765{766return (__m512i)__builtin_elementwise_max((__v32hi) __A, (__v32hi) __B);767}768769static __inline__ __m512i __DEFAULT_FN_ATTRS512770_mm512_maskz_max_epi16 (__mmask32 __M, __m512i __A, __m512i __B)771{772return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,773(__v32hi)_mm512_max_epi16(__A, __B),774(__v32hi)_mm512_setzero_si512());775}776777static __inline__ __m512i __DEFAULT_FN_ATTRS512778_mm512_mask_max_epi16 (__m512i __W, __mmask32 __M, __m512i __A,779__m512i __B)780{781return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,782(__v32hi)_mm512_max_epi16(__A, __B),783(__v32hi)__W);784}785786static __inline__ __m512i __DEFAULT_FN_ATTRS512787_mm512_max_epu8 (__m512i __A, __m512i __B)788{789return (__m512i)__builtin_elementwise_max((__v64qu)__A, (__v64qu)__B);790}791792static __inline__ __m512i __DEFAULT_FN_ATTRS512793_mm512_maskz_max_epu8 (__mmask64 __M, __m512i __A, __m512i __B)794{795return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,796(__v64qi)_mm512_max_epu8(__A, __B),797(__v64qi)_mm512_setzero_si512());798}799800static __inline__ __m512i __DEFAULT_FN_ATTRS512801_mm512_mask_max_epu8 (__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)802{803return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,804(__v64qi)_mm512_max_epu8(__A, __B),805(__v64qi)__W);806}807808static __inline__ __m512i __DEFAULT_FN_ATTRS512809_mm512_max_epu16 (__m512i __A, __m512i __B)810{811return (__m512i)__builtin_elementwise_max((__v32hu)__A, (__v32hu)__B);812}813814static __inline__ __m512i __DEFAULT_FN_ATTRS512815_mm512_maskz_max_epu16 (__mmask32 __M, __m512i __A, __m512i __B)816{817return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,818(__v32hi)_mm512_max_epu16(__A, __B),819(__v32hi)_mm512_setzero_si512());820}821822static __inline__ __m512i __DEFAULT_FN_ATTRS512823_mm512_mask_max_epu16 (__m512i __W, __mmask32 __M, __m512i __A, __m512i __B)824{825return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,826(__v32hi)_mm512_max_epu16(__A, __B),827(__v32hi)__W);828}829830static __inline__ __m512i __DEFAULT_FN_ATTRS512831_mm512_min_epi8 (__m512i __A, __m512i __B)832{833return (__m512i)__builtin_elementwise_min((__v64qs) __A, (__v64qs) __B);834}835836static __inline__ __m512i __DEFAULT_FN_ATTRS512837_mm512_maskz_min_epi8 (__mmask64 __M, __m512i __A, __m512i __B)838{839return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,840(__v64qi)_mm512_min_epi8(__A, __B),841(__v64qi)_mm512_setzero_si512());842}843844static __inline__ __m512i __DEFAULT_FN_ATTRS512845_mm512_mask_min_epi8 (__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)846{847return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,848(__v64qi)_mm512_min_epi8(__A, __B),849(__v64qi)__W);850}851852static __inline__ __m512i __DEFAULT_FN_ATTRS512853_mm512_min_epi16 (__m512i __A, __m512i __B)854{855return (__m512i)__builtin_elementwise_min((__v32hi) __A, (__v32hi) __B);856}857858static __inline__ __m512i __DEFAULT_FN_ATTRS512859_mm512_maskz_min_epi16 (__mmask32 __M, __m512i __A, __m512i __B)860{861return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,862(__v32hi)_mm512_min_epi16(__A, __B),863(__v32hi)_mm512_setzero_si512());864}865866static __inline__ __m512i __DEFAULT_FN_ATTRS512867_mm512_mask_min_epi16 (__m512i __W, __mmask32 __M, __m512i __A, __m512i __B)868{869return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,870(__v32hi)_mm512_min_epi16(__A, __B),871(__v32hi)__W);872}873874static __inline__ __m512i __DEFAULT_FN_ATTRS512875_mm512_min_epu8 (__m512i __A, __m512i __B)876{877return (__m512i)__builtin_elementwise_min((__v64qu)__A, (__v64qu)__B);878}879880static __inline__ __m512i __DEFAULT_FN_ATTRS512881_mm512_maskz_min_epu8 (__mmask64 __M, __m512i __A, __m512i __B)882{883return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,884(__v64qi)_mm512_min_epu8(__A, __B),885(__v64qi)_mm512_setzero_si512());886}887888static __inline__ __m512i __DEFAULT_FN_ATTRS512889_mm512_mask_min_epu8 (__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)890{891return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,892(__v64qi)_mm512_min_epu8(__A, __B),893(__v64qi)__W);894}895896static __inline__ __m512i __DEFAULT_FN_ATTRS512897_mm512_min_epu16 (__m512i __A, __m512i __B)898{899return (__m512i)__builtin_elementwise_min((__v32hu)__A, (__v32hu)__B);900}901902static __inline__ __m512i __DEFAULT_FN_ATTRS512903_mm512_maskz_min_epu16 (__mmask32 __M, __m512i __A, __m512i __B)904{905return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,906(__v32hi)_mm512_min_epu16(__A, __B),907(__v32hi)_mm512_setzero_si512());908}909910static __inline__ __m512i __DEFAULT_FN_ATTRS512911_mm512_mask_min_epu16 (__m512i __W, __mmask32 __M, __m512i __A, __m512i __B)912{913return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,914(__v32hi)_mm512_min_epu16(__A, __B),915(__v32hi)__W);916}917918static __inline__ __m512i __DEFAULT_FN_ATTRS512919_mm512_shuffle_epi8(__m512i __A, __m512i __B)920{921return (__m512i)__builtin_ia32_pshufb512((__v64qi)__A,(__v64qi)__B);922}923924static __inline__ __m512i __DEFAULT_FN_ATTRS512925_mm512_mask_shuffle_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)926{927return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,928(__v64qi)_mm512_shuffle_epi8(__A, __B),929(__v64qi)__W);930}931932static __inline__ __m512i __DEFAULT_FN_ATTRS512933_mm512_maskz_shuffle_epi8(__mmask64 __U, __m512i __A, __m512i __B)934{935return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,936(__v64qi)_mm512_shuffle_epi8(__A, __B),937(__v64qi)_mm512_setzero_si512());938}939940static __inline__ __m512i __DEFAULT_FN_ATTRS512941_mm512_subs_epi8 (__m512i __A, __m512i __B)942{943return (__m512i)__builtin_elementwise_sub_sat((__v64qs)__A, (__v64qs)__B);944}945946static __inline__ __m512i __DEFAULT_FN_ATTRS512947_mm512_mask_subs_epi8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)948{949return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,950(__v64qi)_mm512_subs_epi8(__A, __B),951(__v64qi)__W);952}953954static __inline__ __m512i __DEFAULT_FN_ATTRS512955_mm512_maskz_subs_epi8 (__mmask64 __U, __m512i __A, __m512i __B)956{957return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,958(__v64qi)_mm512_subs_epi8(__A, __B),959(__v64qi)_mm512_setzero_si512());960}961962static __inline__ __m512i __DEFAULT_FN_ATTRS512963_mm512_subs_epi16 (__m512i __A, __m512i __B)964{965return (__m512i)__builtin_elementwise_sub_sat((__v32hi)__A, (__v32hi)__B);966}967968static __inline__ __m512i __DEFAULT_FN_ATTRS512969_mm512_mask_subs_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)970{971return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,972(__v32hi)_mm512_subs_epi16(__A, __B),973(__v32hi)__W);974}975976static __inline__ __m512i __DEFAULT_FN_ATTRS512977_mm512_maskz_subs_epi16 (__mmask32 __U, __m512i __A, __m512i __B)978{979return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,980(__v32hi)_mm512_subs_epi16(__A, __B),981(__v32hi)_mm512_setzero_si512());982}983984static __inline__ __m512i __DEFAULT_FN_ATTRS512985_mm512_subs_epu8 (__m512i __A, __m512i __B)986{987return (__m512i)__builtin_elementwise_sub_sat((__v64qu) __A, (__v64qu) __B);988}989990static __inline__ __m512i __DEFAULT_FN_ATTRS512991_mm512_mask_subs_epu8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)992{993return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,994(__v64qi)_mm512_subs_epu8(__A, __B),995(__v64qi)__W);996}997998static __inline__ __m512i __DEFAULT_FN_ATTRS512999_mm512_maskz_subs_epu8 (__mmask64 __U, __m512i __A, __m512i __B)1000{1001return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,1002(__v64qi)_mm512_subs_epu8(__A, __B),1003(__v64qi)_mm512_setzero_si512());1004}10051006static __inline__ __m512i __DEFAULT_FN_ATTRS5121007_mm512_subs_epu16 (__m512i __A, __m512i __B)1008{1009return (__m512i)__builtin_elementwise_sub_sat((__v32hu) __A, (__v32hu) __B);1010}10111012static __inline__ __m512i __DEFAULT_FN_ATTRS5121013_mm512_mask_subs_epu16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)1014{1015return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1016(__v32hi)_mm512_subs_epu16(__A, __B),1017(__v32hi)__W);1018}10191020static __inline__ __m512i __DEFAULT_FN_ATTRS5121021_mm512_maskz_subs_epu16 (__mmask32 __U, __m512i __A, __m512i __B)1022{1023return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1024(__v32hi)_mm512_subs_epu16(__A, __B),1025(__v32hi)_mm512_setzero_si512());1026}10271028static __inline__ __m512i __DEFAULT_FN_ATTRS5121029_mm512_permutex2var_epi16(__m512i __A, __m512i __I, __m512i __B)1030{1031return (__m512i)__builtin_ia32_vpermi2varhi512((__v32hi)__A, (__v32hi)__I,1032(__v32hi)__B);1033}10341035static __inline__ __m512i __DEFAULT_FN_ATTRS5121036_mm512_mask_permutex2var_epi16(__m512i __A, __mmask32 __U, __m512i __I,1037__m512i __B)1038{1039return (__m512i)__builtin_ia32_selectw_512(__U,1040(__v32hi)_mm512_permutex2var_epi16(__A, __I, __B),1041(__v32hi)__A);1042}10431044static __inline__ __m512i __DEFAULT_FN_ATTRS5121045_mm512_mask2_permutex2var_epi16(__m512i __A, __m512i __I, __mmask32 __U,1046__m512i __B)1047{1048return (__m512i)__builtin_ia32_selectw_512(__U,1049(__v32hi)_mm512_permutex2var_epi16(__A, __I, __B),1050(__v32hi)__I);1051}10521053static __inline__ __m512i __DEFAULT_FN_ATTRS5121054_mm512_maskz_permutex2var_epi16(__mmask32 __U, __m512i __A, __m512i __I,1055__m512i __B)1056{1057return (__m512i)__builtin_ia32_selectw_512(__U,1058(__v32hi)_mm512_permutex2var_epi16(__A, __I, __B),1059(__v32hi)_mm512_setzero_si512());1060}10611062static __inline__ __m512i __DEFAULT_FN_ATTRS5121063_mm512_mulhrs_epi16(__m512i __A, __m512i __B)1064{1065return (__m512i)__builtin_ia32_pmulhrsw512((__v32hi)__A, (__v32hi)__B);1066}10671068static __inline__ __m512i __DEFAULT_FN_ATTRS5121069_mm512_mask_mulhrs_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)1070{1071return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1072(__v32hi)_mm512_mulhrs_epi16(__A, __B),1073(__v32hi)__W);1074}10751076static __inline__ __m512i __DEFAULT_FN_ATTRS5121077_mm512_maskz_mulhrs_epi16(__mmask32 __U, __m512i __A, __m512i __B)1078{1079return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1080(__v32hi)_mm512_mulhrs_epi16(__A, __B),1081(__v32hi)_mm512_setzero_si512());1082}10831084static __inline__ __m512i __DEFAULT_FN_ATTRS5121085_mm512_mulhi_epi16(__m512i __A, __m512i __B)1086{1087return (__m512i)__builtin_ia32_pmulhw512((__v32hi) __A, (__v32hi) __B);1088}10891090static __inline__ __m512i __DEFAULT_FN_ATTRS5121091_mm512_mask_mulhi_epi16(__m512i __W, __mmask32 __U, __m512i __A,1092__m512i __B)1093{1094return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1095(__v32hi)_mm512_mulhi_epi16(__A, __B),1096(__v32hi)__W);1097}10981099static __inline__ __m512i __DEFAULT_FN_ATTRS5121100_mm512_maskz_mulhi_epi16(__mmask32 __U, __m512i __A, __m512i __B)1101{1102return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1103(__v32hi)_mm512_mulhi_epi16(__A, __B),1104(__v32hi)_mm512_setzero_si512());1105}11061107static __inline__ __m512i __DEFAULT_FN_ATTRS5121108_mm512_mulhi_epu16(__m512i __A, __m512i __B)1109{1110return (__m512i)__builtin_ia32_pmulhuw512((__v32hi) __A, (__v32hi) __B);1111}11121113static __inline__ __m512i __DEFAULT_FN_ATTRS5121114_mm512_mask_mulhi_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)1115{1116return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1117(__v32hi)_mm512_mulhi_epu16(__A, __B),1118(__v32hi)__W);1119}11201121static __inline__ __m512i __DEFAULT_FN_ATTRS5121122_mm512_maskz_mulhi_epu16 (__mmask32 __U, __m512i __A, __m512i __B)1123{1124return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1125(__v32hi)_mm512_mulhi_epu16(__A, __B),1126(__v32hi)_mm512_setzero_si512());1127}11281129static __inline__ __m512i __DEFAULT_FN_ATTRS5121130_mm512_maddubs_epi16(__m512i __X, __m512i __Y) {1131return (__m512i)__builtin_ia32_pmaddubsw512((__v64qi)__X, (__v64qi)__Y);1132}11331134static __inline__ __m512i __DEFAULT_FN_ATTRS5121135_mm512_mask_maddubs_epi16(__m512i __W, __mmask32 __U, __m512i __X,1136__m512i __Y) {1137return (__m512i)__builtin_ia32_selectw_512((__mmask32) __U,1138(__v32hi)_mm512_maddubs_epi16(__X, __Y),1139(__v32hi)__W);1140}11411142static __inline__ __m512i __DEFAULT_FN_ATTRS5121143_mm512_maskz_maddubs_epi16(__mmask32 __U, __m512i __X, __m512i __Y) {1144return (__m512i)__builtin_ia32_selectw_512((__mmask32) __U,1145(__v32hi)_mm512_maddubs_epi16(__X, __Y),1146(__v32hi)_mm512_setzero_si512());1147}11481149static __inline__ __m512i __DEFAULT_FN_ATTRS5121150_mm512_madd_epi16(__m512i __A, __m512i __B) {1151return (__m512i)__builtin_ia32_pmaddwd512((__v32hi)__A, (__v32hi)__B);1152}11531154static __inline__ __m512i __DEFAULT_FN_ATTRS5121155_mm512_mask_madd_epi16(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) {1156return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,1157(__v16si)_mm512_madd_epi16(__A, __B),1158(__v16si)__W);1159}11601161static __inline__ __m512i __DEFAULT_FN_ATTRS5121162_mm512_maskz_madd_epi16(__mmask16 __U, __m512i __A, __m512i __B) {1163return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,1164(__v16si)_mm512_madd_epi16(__A, __B),1165(__v16si)_mm512_setzero_si512());1166}11671168static __inline__ __m256i __DEFAULT_FN_ATTRS5121169_mm512_cvtsepi16_epi8 (__m512i __A) {1170return (__m256i) __builtin_ia32_pmovswb512_mask ((__v32hi) __A,1171(__v32qi)_mm256_setzero_si256(),1172(__mmask32) -1);1173}11741175static __inline__ __m256i __DEFAULT_FN_ATTRS5121176_mm512_mask_cvtsepi16_epi8 (__m256i __O, __mmask32 __M, __m512i __A) {1177return (__m256i) __builtin_ia32_pmovswb512_mask ((__v32hi) __A,1178(__v32qi)__O,1179__M);1180}11811182static __inline__ __m256i __DEFAULT_FN_ATTRS5121183_mm512_maskz_cvtsepi16_epi8 (__mmask32 __M, __m512i __A) {1184return (__m256i) __builtin_ia32_pmovswb512_mask ((__v32hi) __A,1185(__v32qi) _mm256_setzero_si256(),1186__M);1187}11881189static __inline__ __m256i __DEFAULT_FN_ATTRS5121190_mm512_cvtusepi16_epi8 (__m512i __A) {1191return (__m256i) __builtin_ia32_pmovuswb512_mask ((__v32hi) __A,1192(__v32qi) _mm256_setzero_si256(),1193(__mmask32) -1);1194}11951196static __inline__ __m256i __DEFAULT_FN_ATTRS5121197_mm512_mask_cvtusepi16_epi8 (__m256i __O, __mmask32 __M, __m512i __A) {1198return (__m256i) __builtin_ia32_pmovuswb512_mask ((__v32hi) __A,1199(__v32qi) __O,1200__M);1201}12021203static __inline__ __m256i __DEFAULT_FN_ATTRS5121204_mm512_maskz_cvtusepi16_epi8 (__mmask32 __M, __m512i __A) {1205return (__m256i) __builtin_ia32_pmovuswb512_mask ((__v32hi) __A,1206(__v32qi) _mm256_setzero_si256(),1207__M);1208}12091210static __inline__ __m256i __DEFAULT_FN_ATTRS5121211_mm512_cvtepi16_epi8 (__m512i __A) {1212return (__m256i) __builtin_ia32_pmovwb512_mask ((__v32hi) __A,1213(__v32qi) _mm256_undefined_si256(),1214(__mmask32) -1);1215}12161217static __inline__ __m256i __DEFAULT_FN_ATTRS5121218_mm512_mask_cvtepi16_epi8 (__m256i __O, __mmask32 __M, __m512i __A) {1219return (__m256i) __builtin_ia32_pmovwb512_mask ((__v32hi) __A,1220(__v32qi) __O,1221__M);1222}12231224static __inline__ __m256i __DEFAULT_FN_ATTRS5121225_mm512_maskz_cvtepi16_epi8 (__mmask32 __M, __m512i __A) {1226return (__m256i) __builtin_ia32_pmovwb512_mask ((__v32hi) __A,1227(__v32qi) _mm256_setzero_si256(),1228__M);1229}12301231static __inline__ void __DEFAULT_FN_ATTRS5121232_mm512_mask_cvtepi16_storeu_epi8 (void * __P, __mmask32 __M, __m512i __A)1233{1234__builtin_ia32_pmovwb512mem_mask ((__v32qi *) __P, (__v32hi) __A, __M);1235}12361237static __inline__ void __DEFAULT_FN_ATTRS5121238_mm512_mask_cvtsepi16_storeu_epi8 (void * __P, __mmask32 __M, __m512i __A)1239{1240__builtin_ia32_pmovswb512mem_mask ((__v32qi *) __P, (__v32hi) __A, __M);1241}12421243static __inline__ void __DEFAULT_FN_ATTRS5121244_mm512_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask32 __M, __m512i __A)1245{1246__builtin_ia32_pmovuswb512mem_mask ((__v32qi *) __P, (__v32hi) __A, __M);1247}12481249static __inline__ __m512i __DEFAULT_FN_ATTRS5121250_mm512_unpackhi_epi8(__m512i __A, __m512i __B) {1251return (__m512i)__builtin_shufflevector((__v64qi)__A, (__v64qi)__B,12528, 64+8, 9, 64+9,125310, 64+10, 11, 64+11,125412, 64+12, 13, 64+13,125514, 64+14, 15, 64+15,125624, 64+24, 25, 64+25,125726, 64+26, 27, 64+27,125828, 64+28, 29, 64+29,125930, 64+30, 31, 64+31,126040, 64+40, 41, 64+41,126142, 64+42, 43, 64+43,126244, 64+44, 45, 64+45,126346, 64+46, 47, 64+47,126456, 64+56, 57, 64+57,126558, 64+58, 59, 64+59,126660, 64+60, 61, 64+61,126762, 64+62, 63, 64+63);1268}12691270static __inline__ __m512i __DEFAULT_FN_ATTRS5121271_mm512_mask_unpackhi_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {1272return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,1273(__v64qi)_mm512_unpackhi_epi8(__A, __B),1274(__v64qi)__W);1275}12761277static __inline__ __m512i __DEFAULT_FN_ATTRS5121278_mm512_maskz_unpackhi_epi8(__mmask64 __U, __m512i __A, __m512i __B) {1279return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,1280(__v64qi)_mm512_unpackhi_epi8(__A, __B),1281(__v64qi)_mm512_setzero_si512());1282}12831284static __inline__ __m512i __DEFAULT_FN_ATTRS5121285_mm512_unpackhi_epi16(__m512i __A, __m512i __B) {1286return (__m512i)__builtin_shufflevector((__v32hi)__A, (__v32hi)__B,12874, 32+4, 5, 32+5,12886, 32+6, 7, 32+7,128912, 32+12, 13, 32+13,129014, 32+14, 15, 32+15,129120, 32+20, 21, 32+21,129222, 32+22, 23, 32+23,129328, 32+28, 29, 32+29,129430, 32+30, 31, 32+31);1295}12961297static __inline__ __m512i __DEFAULT_FN_ATTRS5121298_mm512_mask_unpackhi_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {1299return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1300(__v32hi)_mm512_unpackhi_epi16(__A, __B),1301(__v32hi)__W);1302}13031304static __inline__ __m512i __DEFAULT_FN_ATTRS5121305_mm512_maskz_unpackhi_epi16(__mmask32 __U, __m512i __A, __m512i __B) {1306return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1307(__v32hi)_mm512_unpackhi_epi16(__A, __B),1308(__v32hi)_mm512_setzero_si512());1309}13101311static __inline__ __m512i __DEFAULT_FN_ATTRS5121312_mm512_unpacklo_epi8(__m512i __A, __m512i __B) {1313return (__m512i)__builtin_shufflevector((__v64qi)__A, (__v64qi)__B,13140, 64+0, 1, 64+1,13152, 64+2, 3, 64+3,13164, 64+4, 5, 64+5,13176, 64+6, 7, 64+7,131816, 64+16, 17, 64+17,131918, 64+18, 19, 64+19,132020, 64+20, 21, 64+21,132122, 64+22, 23, 64+23,132232, 64+32, 33, 64+33,132334, 64+34, 35, 64+35,132436, 64+36, 37, 64+37,132538, 64+38, 39, 64+39,132648, 64+48, 49, 64+49,132750, 64+50, 51, 64+51,132852, 64+52, 53, 64+53,132954, 64+54, 55, 64+55);1330}13311332static __inline__ __m512i __DEFAULT_FN_ATTRS5121333_mm512_mask_unpacklo_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {1334return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,1335(__v64qi)_mm512_unpacklo_epi8(__A, __B),1336(__v64qi)__W);1337}13381339static __inline__ __m512i __DEFAULT_FN_ATTRS5121340_mm512_maskz_unpacklo_epi8(__mmask64 __U, __m512i __A, __m512i __B) {1341return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,1342(__v64qi)_mm512_unpacklo_epi8(__A, __B),1343(__v64qi)_mm512_setzero_si512());1344}13451346static __inline__ __m512i __DEFAULT_FN_ATTRS5121347_mm512_unpacklo_epi16(__m512i __A, __m512i __B) {1348return (__m512i)__builtin_shufflevector((__v32hi)__A, (__v32hi)__B,13490, 32+0, 1, 32+1,13502, 32+2, 3, 32+3,13518, 32+8, 9, 32+9,135210, 32+10, 11, 32+11,135316, 32+16, 17, 32+17,135418, 32+18, 19, 32+19,135524, 32+24, 25, 32+25,135626, 32+26, 27, 32+27);1357}13581359static __inline__ __m512i __DEFAULT_FN_ATTRS5121360_mm512_mask_unpacklo_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {1361return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1362(__v32hi)_mm512_unpacklo_epi16(__A, __B),1363(__v32hi)__W);1364}13651366static __inline__ __m512i __DEFAULT_FN_ATTRS5121367_mm512_maskz_unpacklo_epi16(__mmask32 __U, __m512i __A, __m512i __B) {1368return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1369(__v32hi)_mm512_unpacklo_epi16(__A, __B),1370(__v32hi)_mm512_setzero_si512());1371}13721373static __inline__ __m512i __DEFAULT_FN_ATTRS5121374_mm512_cvtepi8_epi16(__m256i __A)1375{1376/* This function always performs a signed extension, but __v32qi is a char1377which may be signed or unsigned, so use __v32qs. */1378return (__m512i)__builtin_convertvector((__v32qs)__A, __v32hi);1379}13801381static __inline__ __m512i __DEFAULT_FN_ATTRS5121382_mm512_mask_cvtepi8_epi16(__m512i __W, __mmask32 __U, __m256i __A)1383{1384return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1385(__v32hi)_mm512_cvtepi8_epi16(__A),1386(__v32hi)__W);1387}13881389static __inline__ __m512i __DEFAULT_FN_ATTRS5121390_mm512_maskz_cvtepi8_epi16(__mmask32 __U, __m256i __A)1391{1392return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1393(__v32hi)_mm512_cvtepi8_epi16(__A),1394(__v32hi)_mm512_setzero_si512());1395}13961397static __inline__ __m512i __DEFAULT_FN_ATTRS5121398_mm512_cvtepu8_epi16(__m256i __A)1399{1400return (__m512i)__builtin_convertvector((__v32qu)__A, __v32hi);1401}14021403static __inline__ __m512i __DEFAULT_FN_ATTRS5121404_mm512_mask_cvtepu8_epi16(__m512i __W, __mmask32 __U, __m256i __A)1405{1406return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1407(__v32hi)_mm512_cvtepu8_epi16(__A),1408(__v32hi)__W);1409}14101411static __inline__ __m512i __DEFAULT_FN_ATTRS5121412_mm512_maskz_cvtepu8_epi16(__mmask32 __U, __m256i __A)1413{1414return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1415(__v32hi)_mm512_cvtepu8_epi16(__A),1416(__v32hi)_mm512_setzero_si512());1417}141814191420#define _mm512_shufflehi_epi16(A, imm) \1421((__m512i)__builtin_ia32_pshufhw512((__v32hi)(__m512i)(A), (int)(imm)))14221423#define _mm512_mask_shufflehi_epi16(W, U, A, imm) \1424((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \1425(__v32hi)_mm512_shufflehi_epi16((A), \1426(imm)), \1427(__v32hi)(__m512i)(W)))14281429#define _mm512_maskz_shufflehi_epi16(U, A, imm) \1430((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \1431(__v32hi)_mm512_shufflehi_epi16((A), \1432(imm)), \1433(__v32hi)_mm512_setzero_si512()))14341435#define _mm512_shufflelo_epi16(A, imm) \1436((__m512i)__builtin_ia32_pshuflw512((__v32hi)(__m512i)(A), (int)(imm)))143714381439#define _mm512_mask_shufflelo_epi16(W, U, A, imm) \1440((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \1441(__v32hi)_mm512_shufflelo_epi16((A), \1442(imm)), \1443(__v32hi)(__m512i)(W)))144414451446#define _mm512_maskz_shufflelo_epi16(U, A, imm) \1447((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \1448(__v32hi)_mm512_shufflelo_epi16((A), \1449(imm)), \1450(__v32hi)_mm512_setzero_si512()))14511452static __inline__ __m512i __DEFAULT_FN_ATTRS5121453_mm512_sllv_epi16(__m512i __A, __m512i __B)1454{1455return (__m512i)__builtin_ia32_psllv32hi((__v32hi) __A, (__v32hi) __B);1456}14571458static __inline__ __m512i __DEFAULT_FN_ATTRS5121459_mm512_mask_sllv_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)1460{1461return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1462(__v32hi)_mm512_sllv_epi16(__A, __B),1463(__v32hi)__W);1464}14651466static __inline__ __m512i __DEFAULT_FN_ATTRS5121467_mm512_maskz_sllv_epi16(__mmask32 __U, __m512i __A, __m512i __B)1468{1469return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1470(__v32hi)_mm512_sllv_epi16(__A, __B),1471(__v32hi)_mm512_setzero_si512());1472}14731474static __inline__ __m512i __DEFAULT_FN_ATTRS5121475_mm512_sll_epi16(__m512i __A, __m128i __B)1476{1477return (__m512i)__builtin_ia32_psllw512((__v32hi) __A, (__v8hi) __B);1478}14791480static __inline__ __m512i __DEFAULT_FN_ATTRS5121481_mm512_mask_sll_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B)1482{1483return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1484(__v32hi)_mm512_sll_epi16(__A, __B),1485(__v32hi)__W);1486}14871488static __inline__ __m512i __DEFAULT_FN_ATTRS5121489_mm512_maskz_sll_epi16(__mmask32 __U, __m512i __A, __m128i __B)1490{1491return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1492(__v32hi)_mm512_sll_epi16(__A, __B),1493(__v32hi)_mm512_setzero_si512());1494}14951496static __inline__ __m512i __DEFAULT_FN_ATTRS5121497_mm512_slli_epi16(__m512i __A, unsigned int __B)1498{1499return (__m512i)__builtin_ia32_psllwi512((__v32hi)__A, (int)__B);1500}15011502static __inline__ __m512i __DEFAULT_FN_ATTRS5121503_mm512_mask_slli_epi16(__m512i __W, __mmask32 __U, __m512i __A,1504unsigned int __B)1505{1506return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1507(__v32hi)_mm512_slli_epi16(__A, __B),1508(__v32hi)__W);1509}15101511static __inline__ __m512i __DEFAULT_FN_ATTRS5121512_mm512_maskz_slli_epi16(__mmask32 __U, __m512i __A, unsigned int __B)1513{1514return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1515(__v32hi)_mm512_slli_epi16(__A, __B),1516(__v32hi)_mm512_setzero_si512());1517}15181519#define _mm512_bslli_epi128(a, imm) \1520((__m512i)__builtin_ia32_pslldqi512_byteshift((__v8di)(__m512i)(a), (int)(imm)))15211522static __inline__ __m512i __DEFAULT_FN_ATTRS5121523_mm512_srlv_epi16(__m512i __A, __m512i __B)1524{1525return (__m512i)__builtin_ia32_psrlv32hi((__v32hi)__A, (__v32hi)__B);1526}15271528static __inline__ __m512i __DEFAULT_FN_ATTRS5121529_mm512_mask_srlv_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)1530{1531return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1532(__v32hi)_mm512_srlv_epi16(__A, __B),1533(__v32hi)__W);1534}15351536static __inline__ __m512i __DEFAULT_FN_ATTRS5121537_mm512_maskz_srlv_epi16(__mmask32 __U, __m512i __A, __m512i __B)1538{1539return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1540(__v32hi)_mm512_srlv_epi16(__A, __B),1541(__v32hi)_mm512_setzero_si512());1542}15431544static __inline__ __m512i __DEFAULT_FN_ATTRS5121545_mm512_srav_epi16(__m512i __A, __m512i __B)1546{1547return (__m512i)__builtin_ia32_psrav32hi((__v32hi)__A, (__v32hi)__B);1548}15491550static __inline__ __m512i __DEFAULT_FN_ATTRS5121551_mm512_mask_srav_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)1552{1553return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1554(__v32hi)_mm512_srav_epi16(__A, __B),1555(__v32hi)__W);1556}15571558static __inline__ __m512i __DEFAULT_FN_ATTRS5121559_mm512_maskz_srav_epi16(__mmask32 __U, __m512i __A, __m512i __B)1560{1561return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1562(__v32hi)_mm512_srav_epi16(__A, __B),1563(__v32hi)_mm512_setzero_si512());1564}15651566static __inline__ __m512i __DEFAULT_FN_ATTRS5121567_mm512_sra_epi16(__m512i __A, __m128i __B)1568{1569return (__m512i)__builtin_ia32_psraw512((__v32hi) __A, (__v8hi) __B);1570}15711572static __inline__ __m512i __DEFAULT_FN_ATTRS5121573_mm512_mask_sra_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B)1574{1575return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1576(__v32hi)_mm512_sra_epi16(__A, __B),1577(__v32hi)__W);1578}15791580static __inline__ __m512i __DEFAULT_FN_ATTRS5121581_mm512_maskz_sra_epi16(__mmask32 __U, __m512i __A, __m128i __B)1582{1583return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1584(__v32hi)_mm512_sra_epi16(__A, __B),1585(__v32hi)_mm512_setzero_si512());1586}15871588static __inline__ __m512i __DEFAULT_FN_ATTRS5121589_mm512_srai_epi16(__m512i __A, unsigned int __B)1590{1591return (__m512i)__builtin_ia32_psrawi512((__v32hi)__A, (int)__B);1592}15931594static __inline__ __m512i __DEFAULT_FN_ATTRS5121595_mm512_mask_srai_epi16(__m512i __W, __mmask32 __U, __m512i __A,1596unsigned int __B)1597{1598return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1599(__v32hi)_mm512_srai_epi16(__A, __B),1600(__v32hi)__W);1601}16021603static __inline__ __m512i __DEFAULT_FN_ATTRS5121604_mm512_maskz_srai_epi16(__mmask32 __U, __m512i __A, unsigned int __B)1605{1606return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1607(__v32hi)_mm512_srai_epi16(__A, __B),1608(__v32hi)_mm512_setzero_si512());1609}16101611static __inline__ __m512i __DEFAULT_FN_ATTRS5121612_mm512_srl_epi16(__m512i __A, __m128i __B)1613{1614return (__m512i)__builtin_ia32_psrlw512((__v32hi) __A, (__v8hi) __B);1615}16161617static __inline__ __m512i __DEFAULT_FN_ATTRS5121618_mm512_mask_srl_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B)1619{1620return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1621(__v32hi)_mm512_srl_epi16(__A, __B),1622(__v32hi)__W);1623}16241625static __inline__ __m512i __DEFAULT_FN_ATTRS5121626_mm512_maskz_srl_epi16(__mmask32 __U, __m512i __A, __m128i __B)1627{1628return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1629(__v32hi)_mm512_srl_epi16(__A, __B),1630(__v32hi)_mm512_setzero_si512());1631}16321633static __inline__ __m512i __DEFAULT_FN_ATTRS5121634_mm512_srli_epi16(__m512i __A, unsigned int __B)1635{1636return (__m512i)__builtin_ia32_psrlwi512((__v32hi)__A, (int)__B);1637}16381639static __inline__ __m512i __DEFAULT_FN_ATTRS5121640_mm512_mask_srli_epi16(__m512i __W, __mmask32 __U, __m512i __A,1641unsigned int __B)1642{1643return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1644(__v32hi)_mm512_srli_epi16(__A, __B),1645(__v32hi)__W);1646}16471648static __inline__ __m512i __DEFAULT_FN_ATTRS5121649_mm512_maskz_srli_epi16(__mmask32 __U, __m512i __A, int __B)1650{1651return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1652(__v32hi)_mm512_srli_epi16(__A, (unsigned int)__B),1653(__v32hi)_mm512_setzero_si512());1654}16551656#define _mm512_bsrli_epi128(a, imm) \1657((__m512i)__builtin_ia32_psrldqi512_byteshift((__v8di)(__m512i)(a), (int)(imm)))16581659static __inline__ __m512i __DEFAULT_FN_ATTRS5121660_mm512_mask_mov_epi16 (__m512i __W, __mmask32 __U, __m512i __A)1661{1662return (__m512i) __builtin_ia32_selectw_512 ((__mmask32) __U,1663(__v32hi) __A,1664(__v32hi) __W);1665}16661667static __inline__ __m512i __DEFAULT_FN_ATTRS5121668_mm512_maskz_mov_epi16 (__mmask32 __U, __m512i __A)1669{1670return (__m512i) __builtin_ia32_selectw_512 ((__mmask32) __U,1671(__v32hi) __A,1672(__v32hi) _mm512_setzero_si512 ());1673}16741675static __inline__ __m512i __DEFAULT_FN_ATTRS5121676_mm512_mask_mov_epi8 (__m512i __W, __mmask64 __U, __m512i __A)1677{1678return (__m512i) __builtin_ia32_selectb_512 ((__mmask64) __U,1679(__v64qi) __A,1680(__v64qi) __W);1681}16821683static __inline__ __m512i __DEFAULT_FN_ATTRS5121684_mm512_maskz_mov_epi8 (__mmask64 __U, __m512i __A)1685{1686return (__m512i) __builtin_ia32_selectb_512 ((__mmask64) __U,1687(__v64qi) __A,1688(__v64qi) _mm512_setzero_si512 ());1689}16901691static __inline__ __m512i __DEFAULT_FN_ATTRS5121692_mm512_mask_set1_epi8 (__m512i __O, __mmask64 __M, char __A)1693{1694return (__m512i) __builtin_ia32_selectb_512(__M,1695(__v64qi)_mm512_set1_epi8(__A),1696(__v64qi) __O);1697}16981699static __inline__ __m512i __DEFAULT_FN_ATTRS5121700_mm512_maskz_set1_epi8 (__mmask64 __M, char __A)1701{1702return (__m512i) __builtin_ia32_selectb_512(__M,1703(__v64qi) _mm512_set1_epi8(__A),1704(__v64qi) _mm512_setzero_si512());1705}17061707static __inline__ __mmask64 __DEFAULT_FN_ATTRS _mm512_kunpackd(__mmask64 __A,1708__mmask64 __B) {1709return (__mmask64) __builtin_ia32_kunpckdi ((__mmask64) __A,1710(__mmask64) __B);1711}17121713static __inline__ __mmask32 __DEFAULT_FN_ATTRS1714_mm512_kunpackw (__mmask32 __A, __mmask32 __B)1715{1716return (__mmask32) __builtin_ia32_kunpcksi ((__mmask32) __A,1717(__mmask32) __B);1718}17191720static __inline __m512i __DEFAULT_FN_ATTRS5121721_mm512_loadu_epi16 (void const *__P)1722{1723struct __loadu_epi16 {1724__m512i_u __v;1725} __attribute__((__packed__, __may_alias__));1726return ((const struct __loadu_epi16*)__P)->__v;1727}17281729static __inline__ __m512i __DEFAULT_FN_ATTRS5121730_mm512_mask_loadu_epi16 (__m512i __W, __mmask32 __U, void const *__P)1731{1732return (__m512i) __builtin_ia32_loaddquhi512_mask ((const __v32hi *) __P,1733(__v32hi) __W,1734(__mmask32) __U);1735}17361737static __inline__ __m512i __DEFAULT_FN_ATTRS5121738_mm512_maskz_loadu_epi16 (__mmask32 __U, void const *__P)1739{1740return (__m512i) __builtin_ia32_loaddquhi512_mask ((const __v32hi *) __P,1741(__v32hi)1742_mm512_setzero_si512 (),1743(__mmask32) __U);1744}17451746static __inline __m512i __DEFAULT_FN_ATTRS5121747_mm512_loadu_epi8 (void const *__P)1748{1749struct __loadu_epi8 {1750__m512i_u __v;1751} __attribute__((__packed__, __may_alias__));1752return ((const struct __loadu_epi8*)__P)->__v;1753}17541755static __inline__ __m512i __DEFAULT_FN_ATTRS5121756_mm512_mask_loadu_epi8 (__m512i __W, __mmask64 __U, void const *__P)1757{1758return (__m512i) __builtin_ia32_loaddquqi512_mask ((const __v64qi *) __P,1759(__v64qi) __W,1760(__mmask64) __U);1761}17621763static __inline__ __m512i __DEFAULT_FN_ATTRS5121764_mm512_maskz_loadu_epi8 (__mmask64 __U, void const *__P)1765{1766return (__m512i) __builtin_ia32_loaddquqi512_mask ((const __v64qi *) __P,1767(__v64qi)1768_mm512_setzero_si512 (),1769(__mmask64) __U);1770}17711772static __inline void __DEFAULT_FN_ATTRS5121773_mm512_storeu_epi16 (void *__P, __m512i __A)1774{1775struct __storeu_epi16 {1776__m512i_u __v;1777} __attribute__((__packed__, __may_alias__));1778((struct __storeu_epi16*)__P)->__v = __A;1779}17801781static __inline__ void __DEFAULT_FN_ATTRS5121782_mm512_mask_storeu_epi16 (void *__P, __mmask32 __U, __m512i __A)1783{1784__builtin_ia32_storedquhi512_mask ((__v32hi *) __P,1785(__v32hi) __A,1786(__mmask32) __U);1787}17881789static __inline void __DEFAULT_FN_ATTRS5121790_mm512_storeu_epi8 (void *__P, __m512i __A)1791{1792struct __storeu_epi8 {1793__m512i_u __v;1794} __attribute__((__packed__, __may_alias__));1795((struct __storeu_epi8*)__P)->__v = __A;1796}17971798static __inline__ void __DEFAULT_FN_ATTRS5121799_mm512_mask_storeu_epi8 (void *__P, __mmask64 __U, __m512i __A)1800{1801__builtin_ia32_storedquqi512_mask ((__v64qi *) __P,1802(__v64qi) __A,1803(__mmask64) __U);1804}18051806static __inline__ __mmask64 __DEFAULT_FN_ATTRS5121807_mm512_test_epi8_mask (__m512i __A, __m512i __B)1808{1809return _mm512_cmpneq_epi8_mask (_mm512_and_epi32 (__A, __B),1810_mm512_setzero_si512());1811}18121813static __inline__ __mmask64 __DEFAULT_FN_ATTRS5121814_mm512_mask_test_epi8_mask (__mmask64 __U, __m512i __A, __m512i __B)1815{1816return _mm512_mask_cmpneq_epi8_mask (__U, _mm512_and_epi32 (__A, __B),1817_mm512_setzero_si512());1818}18191820static __inline__ __mmask32 __DEFAULT_FN_ATTRS5121821_mm512_test_epi16_mask (__m512i __A, __m512i __B)1822{1823return _mm512_cmpneq_epi16_mask (_mm512_and_epi32 (__A, __B),1824_mm512_setzero_si512());1825}18261827static __inline__ __mmask32 __DEFAULT_FN_ATTRS5121828_mm512_mask_test_epi16_mask (__mmask32 __U, __m512i __A, __m512i __B)1829{1830return _mm512_mask_cmpneq_epi16_mask (__U, _mm512_and_epi32 (__A, __B),1831_mm512_setzero_si512());1832}18331834static __inline__ __mmask64 __DEFAULT_FN_ATTRS5121835_mm512_testn_epi8_mask (__m512i __A, __m512i __B)1836{1837return _mm512_cmpeq_epi8_mask (_mm512_and_epi32 (__A, __B), _mm512_setzero_si512());1838}18391840static __inline__ __mmask64 __DEFAULT_FN_ATTRS5121841_mm512_mask_testn_epi8_mask (__mmask64 __U, __m512i __A, __m512i __B)1842{1843return _mm512_mask_cmpeq_epi8_mask (__U, _mm512_and_epi32 (__A, __B),1844_mm512_setzero_si512());1845}18461847static __inline__ __mmask32 __DEFAULT_FN_ATTRS5121848_mm512_testn_epi16_mask (__m512i __A, __m512i __B)1849{1850return _mm512_cmpeq_epi16_mask (_mm512_and_epi32 (__A, __B),1851_mm512_setzero_si512());1852}18531854static __inline__ __mmask32 __DEFAULT_FN_ATTRS5121855_mm512_mask_testn_epi16_mask (__mmask32 __U, __m512i __A, __m512i __B)1856{1857return _mm512_mask_cmpeq_epi16_mask (__U, _mm512_and_epi32 (__A, __B),1858_mm512_setzero_si512());1859}18601861static __inline__ __mmask64 __DEFAULT_FN_ATTRS5121862_mm512_movepi8_mask (__m512i __A)1863{1864return (__mmask64) __builtin_ia32_cvtb2mask512 ((__v64qi) __A);1865}18661867static __inline__ __mmask32 __DEFAULT_FN_ATTRS5121868_mm512_movepi16_mask (__m512i __A)1869{1870return (__mmask32) __builtin_ia32_cvtw2mask512 ((__v32hi) __A);1871}18721873static __inline__ __m512i __DEFAULT_FN_ATTRS5121874_mm512_movm_epi8 (__mmask64 __A)1875{1876return (__m512i) __builtin_ia32_cvtmask2b512 (__A);1877}18781879static __inline__ __m512i __DEFAULT_FN_ATTRS5121880_mm512_movm_epi16 (__mmask32 __A)1881{1882return (__m512i) __builtin_ia32_cvtmask2w512 (__A);1883}18841885static __inline__ __m512i __DEFAULT_FN_ATTRS5121886_mm512_broadcastb_epi8 (__m128i __A)1887{1888return (__m512i)__builtin_shufflevector((__v16qi) __A, (__v16qi) __A,18890, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,18900, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,18910, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,18920, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);1893}18941895static __inline__ __m512i __DEFAULT_FN_ATTRS5121896_mm512_mask_broadcastb_epi8 (__m512i __O, __mmask64 __M, __m128i __A)1897{1898return (__m512i)__builtin_ia32_selectb_512(__M,1899(__v64qi) _mm512_broadcastb_epi8(__A),1900(__v64qi) __O);1901}19021903static __inline__ __m512i __DEFAULT_FN_ATTRS5121904_mm512_maskz_broadcastb_epi8 (__mmask64 __M, __m128i __A)1905{1906return (__m512i)__builtin_ia32_selectb_512(__M,1907(__v64qi) _mm512_broadcastb_epi8(__A),1908(__v64qi) _mm512_setzero_si512());1909}19101911static __inline__ __m512i __DEFAULT_FN_ATTRS5121912_mm512_mask_set1_epi16 (__m512i __O, __mmask32 __M, short __A)1913{1914return (__m512i) __builtin_ia32_selectw_512(__M,1915(__v32hi) _mm512_set1_epi16(__A),1916(__v32hi) __O);1917}19181919static __inline__ __m512i __DEFAULT_FN_ATTRS5121920_mm512_maskz_set1_epi16 (__mmask32 __M, short __A)1921{1922return (__m512i) __builtin_ia32_selectw_512(__M,1923(__v32hi) _mm512_set1_epi16(__A),1924(__v32hi) _mm512_setzero_si512());1925}19261927static __inline__ __m512i __DEFAULT_FN_ATTRS5121928_mm512_broadcastw_epi16 (__m128i __A)1929{1930return (__m512i)__builtin_shufflevector((__v8hi) __A, (__v8hi) __A,19310, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,19320, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);1933}19341935static __inline__ __m512i __DEFAULT_FN_ATTRS5121936_mm512_mask_broadcastw_epi16 (__m512i __O, __mmask32 __M, __m128i __A)1937{1938return (__m512i)__builtin_ia32_selectw_512(__M,1939(__v32hi) _mm512_broadcastw_epi16(__A),1940(__v32hi) __O);1941}19421943static __inline__ __m512i __DEFAULT_FN_ATTRS5121944_mm512_maskz_broadcastw_epi16 (__mmask32 __M, __m128i __A)1945{1946return (__m512i)__builtin_ia32_selectw_512(__M,1947(__v32hi) _mm512_broadcastw_epi16(__A),1948(__v32hi) _mm512_setzero_si512());1949}19501951static __inline__ __m512i __DEFAULT_FN_ATTRS5121952_mm512_permutexvar_epi16 (__m512i __A, __m512i __B)1953{1954return (__m512i)__builtin_ia32_permvarhi512((__v32hi)__B, (__v32hi)__A);1955}19561957static __inline__ __m512i __DEFAULT_FN_ATTRS5121958_mm512_maskz_permutexvar_epi16 (__mmask32 __M, __m512i __A,1959__m512i __B)1960{1961return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,1962(__v32hi)_mm512_permutexvar_epi16(__A, __B),1963(__v32hi)_mm512_setzero_si512());1964}19651966static __inline__ __m512i __DEFAULT_FN_ATTRS5121967_mm512_mask_permutexvar_epi16 (__m512i __W, __mmask32 __M, __m512i __A,1968__m512i __B)1969{1970return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,1971(__v32hi)_mm512_permutexvar_epi16(__A, __B),1972(__v32hi)__W);1973}19741975#define _mm512_alignr_epi8(A, B, N) \1976((__m512i)__builtin_ia32_palignr512((__v64qi)(__m512i)(A), \1977(__v64qi)(__m512i)(B), (int)(N)))19781979#define _mm512_mask_alignr_epi8(W, U, A, B, N) \1980((__m512i)__builtin_ia32_selectb_512((__mmask64)(U), \1981(__v64qi)_mm512_alignr_epi8((A), (B), (int)(N)), \1982(__v64qi)(__m512i)(W)))19831984#define _mm512_maskz_alignr_epi8(U, A, B, N) \1985((__m512i)__builtin_ia32_selectb_512((__mmask64)(U), \1986(__v64qi)_mm512_alignr_epi8((A), (B), (int)(N)), \1987(__v64qi)(__m512i)_mm512_setzero_si512()))19881989#define _mm512_dbsad_epu8(A, B, imm) \1990((__m512i)__builtin_ia32_dbpsadbw512((__v64qi)(__m512i)(A), \1991(__v64qi)(__m512i)(B), (int)(imm)))19921993#define _mm512_mask_dbsad_epu8(W, U, A, B, imm) \1994((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \1995(__v32hi)_mm512_dbsad_epu8((A), (B), (imm)), \1996(__v32hi)(__m512i)(W)))19971998#define _mm512_maskz_dbsad_epu8(U, A, B, imm) \1999((__m512i)__builtin_ia32_selectw_512((__mmask32)(U), \2000(__v32hi)_mm512_dbsad_epu8((A), (B), (imm)), \2001(__v32hi)_mm512_setzero_si512()))20022003static __inline__ __m512i __DEFAULT_FN_ATTRS5122004_mm512_sad_epu8 (__m512i __A, __m512i __B)2005{2006return (__m512i) __builtin_ia32_psadbw512 ((__v64qi) __A,2007(__v64qi) __B);2008}20092010#undef __DEFAULT_FN_ATTRS5122011#undef __DEFAULT_FN_ATTRS20122013#endif201420152016