CoCalc -- elfnix_tls.aarch64.S

GitHub Repository: freebsd/freebsd-src
Path: blob/main/contrib/llvm-project/compiler-rt/lib/orc/elfnix_tls.aarch64.S
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//===-- elfnix_tlv.aarch64.s ---------------------------------------*- ASM -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file is a part of the ORC runtime support library.
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//
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//===----------------------------------------------------------------------===//
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// The content of this file is aarch64-only
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#if defined(__arm64__) || defined(__aarch64__)
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#define REGISTER_SAVE_SPACE_SIZE     32 * 24
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        .text
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  // returns address of TLV in x0, all other registers preserved
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  // TODO: add fast-path for repeat access
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  .globl ___orc_rt_elfnix_tlsdesc_resolver
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___orc_rt_elfnix_tlsdesc_resolver:
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        sub  sp,  sp, #REGISTER_SAVE_SPACE_SIZE
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        stp x29, x30, [sp, #16 * 1]
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        stp x27, x28, [sp, #16 * 2]
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        stp x25, x26, [sp, #16 * 3]
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        stp x23, x24, [sp, #16 * 4]
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        stp x21, x22, [sp, #16 * 5]
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        stp x19, x20, [sp, #16 * 6]
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        stp x17, x18, [sp, #16 * 7]
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        stp x15, x16, [sp, #16 * 8]
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        stp x13, x14, [sp, #16 * 9]
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        stp x11, x12, [sp, #16 * 10]
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        stp  x9, x10, [sp, #16 * 11]
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        stp  x7,  x8, [sp, #16 * 12]
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        stp  x5,  x6, [sp, #16 * 13]
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        stp  x3,  x4, [sp, #16 * 14]
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        stp  x1,  x2, [sp, #16 * 15]
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        stp q30, q31, [sp, #32 * 8]
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        stp q28, q29, [sp, #32 * 9]
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        stp q26, q27, [sp, #32 * 10]
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        stp q24, q25, [sp, #32 * 11]
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        stp q22, q23, [sp, #32 * 12]
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        stp q20, q21, [sp, #32 * 13]
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        stp q18, q19, [sp, #32 * 14]
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        stp q16, q17, [sp, #32 * 15]
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        stp q14, q15, [sp, #32 * 16]
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        stp q12, q13, [sp, #32 * 17]
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        stp q10, q11, [sp, #32 * 18]
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        stp  q8,  q9, [sp, #32 * 19]
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        stp  q6,  q7, [sp, #32 * 20]
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        stp  q4,  q5, [sp, #32 * 21]
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        stp  q2,  q3, [sp, #32 * 22]
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        stp  q0,  q1, [sp, #32 * 23]
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        mrs x1, TPIDR_EL0 // get thread pointer
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        bl ___orc_rt_elfnix_tlsdesc_resolver_impl
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        ldp  q0,  q1, [sp, #32 * 23]
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        ldp  q2,  q3, [sp, #32 * 22]
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        ldp  q4,  q5, [sp, #32 * 21]
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        ldp  q6,  q7, [sp, #32 * 20]
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        ldp  q8,  q9, [sp, #32 * 19]
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        ldp q10, q11, [sp, #32 * 18]
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        ldp q12, q13, [sp, #32 * 17]
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        ldp q14, q15, [sp, #32 * 16]
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        ldp q16, q17, [sp, #32 * 15]
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        ldp q18, q19, [sp, #32 * 14]
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        ldp q20, q21, [sp, #32 * 13]
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        ldp q22, q23, [sp, #32 * 12]
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        ldp q24, q25, [sp, #32 * 11]
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        ldp q26, q27, [sp, #32 * 10]
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        ldp q28, q29, [sp, #32 * 9]
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        ldp q30, q31, [sp, #32 * 8]
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        ldp  x1,  x2, [sp, #16 * 15]
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        ldp  x3,  x4, [sp, #16 * 14]
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        ldp  x5,  x6, [sp, #16 * 13]
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        ldp  x7,  x8, [sp, #16 * 12]
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        ldp  x9, x10, [sp, #16 * 11]
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        ldp x11, x12, [sp, #16 * 10]
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        ldp x13, x14, [sp, #16 * 9]
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        ldp x15, x16, [sp, #16 * 8]
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        ldp x17, x18, [sp, #16 * 7]
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        ldp x19, x20, [sp, #16 * 6]
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        ldp x21, x22, [sp, #16 * 5]
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        ldp x23, x24, [sp, #16 * 4]
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        ldp x25, x26, [sp, #16 * 3]
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        ldp x27, x28, [sp, #16 * 2]
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        ldp x29, x30, [sp, #16 * 1]
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        add  sp,  sp, #REGISTER_SAVE_SPACE_SIZE
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        ret
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#endif // defined(__arm64__) || defined(__aarch64__)
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