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GitHub Repository: freebsd/freebsd-src
 Path: blob/main/contrib/llvm-project/lldb/source/Utility/ARM64_DWARF_Registers.h
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//===-- ARM64_DWARF_Registers.h ---------------------------------*- C++ -*-===//

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//

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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.

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// See https://llvm.org/LICENSE.txt for license information.

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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception

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//

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//===----------------------------------------------------------------------===//

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#ifndef LLDB_SOURCE_UTILITY_ARM64_DWARF_REGISTERS_H

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#define LLDB_SOURCE_UTILITY_ARM64_DWARF_REGISTERS_H

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#include "lldb/lldb-private.h"

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namespace arm64_dwarf {

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enum {

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  x0 = 0,

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  x1,

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  x2,

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  x3,

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  x4,

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  x5,

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  x6,

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  x7,

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  x8,

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  x9,

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  x10,

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  x11,

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  x12,

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  x13,

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  x14,

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  x15,

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  x16,

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  x17,

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  x18,

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  x19,

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  x20,

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  x21,

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  x22,

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  x23,

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  x24,

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  x25,

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  x26,

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  x27,

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  x28,

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  x29 = 29,

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  fp = x29,

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  x30 = 30,

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  lr = x30,

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  x31 = 31,

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  sp = x31,

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  pc = 32,

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  cpsr = 33,

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  // 34-45 reserved

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  // 64-bit SVE Vector granule pseudo register

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  vg = 46,

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  // VG ́8-bit SVE first fault register

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  ffr = 47,

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  // VG x ́8-bit SVE predicate registers

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  p0 = 48,

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  p1,

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  p2,

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  p3,

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  p4,

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  p5,

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  p6,

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  p7,

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  p8,

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  p9,

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  p10,

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  p11,

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  p12,

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  p13,

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  p14,

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  p15,

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  // V0-V31 (128 bit vector registers)

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  v0 = 64,

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  v1,

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  v2,

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  v3,

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  v4,

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  v5,

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  v6,

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  v7,

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  v8,

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  v9,

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  v10,

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  v11,

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  v12,

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  v13,

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  v14,

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  v15,

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  v16,

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  v17,

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  v18,

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  v19,

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  v20,

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  v21,

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  v22,

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  v23,

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  v24,

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  v25,

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  v26,

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  v27,

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  v28,

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  v29,

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  v30,

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  v31,

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  // VG ́64-bit SVE vector registers

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  z0 = 96,

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  z1,

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  z2,

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  z3,

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  z4,

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  z5,

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  z6,

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  z7,

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  z8,

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  z9,

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  z10,

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  z11,

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  z12,

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  z13,

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  z14,

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  z15,

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  z16,

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  z17,

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  z18,

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  z19,

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  z20,

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  z21,

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  z22,

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  z23,

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  z24,

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  z25,

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  z26,

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  z27,

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  z28,

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  z29,

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  z30,

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  z31

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};

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} // namespace arm64_dwarf

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#endif // LLDB_SOURCE_UTILITY_ARM64_DWARF_REGISTERS_H

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