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GitHub Repository: freebsd/freebsd-src
Path: blob/main/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/AVRFixupKinds.h
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//===-- AVRFixupKinds.h - AVR Specific Fixup Entries ------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_AVR_FIXUP_KINDS_H
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#define LLVM_AVR_FIXUP_KINDS_H
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#include "llvm/MC/MCFixup.h"
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namespace llvm {
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namespace AVR {
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/// The set of supported fixups.
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///
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/// Although most of the current fixup types reflect a unique relocation
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/// one can have multiple fixup types for a given relocation and thus need
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/// to be uniquely named.
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///
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/// \note This table *must* be in the same order of
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/// MCFixupKindInfo Infos[AVR::NumTargetFixupKinds]
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/// in `AVRAsmBackend.cpp`.
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enum Fixups {
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/// A 32-bit AVR fixup.
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fixup_32 = FirstTargetFixupKind,
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/// A 7-bit PC-relative fixup for the family of conditional
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/// branches which take 7-bit targets (BRNE,BRGT,etc).
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fixup_7_pcrel,
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/// A 12-bit PC-relative fixup for the family of branches
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/// which take 12-bit targets (RJMP,RCALL,etc).
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/// \note Although the fixup is labelled as 13 bits, it
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/// is actually only encoded in 12. The reason for
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/// The nonmenclature is that AVR branch targets are
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/// rightshifted by 1, because instructions are always
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/// aligned to 2 bytes, so the 0'th bit is always 0.
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/// This way there is 13-bits of precision.
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fixup_13_pcrel,
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/// A 16-bit address.
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fixup_16,
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/// A 16-bit program memory address.
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fixup_16_pm,
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/// Replaces the 8-bit immediate with another value.
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fixup_ldi,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the lower 8 bits of a 16-bit value (bits 0-7).
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fixup_lo8_ldi,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a 16-bit value (bits 8-15).
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fixup_hi8_ldi,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a 24-bit value (bits 16-23).
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fixup_hh8_ldi,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a 32-bit value (bits 24-31).
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fixup_ms8_ldi,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the lower 8 bits of a negated 16-bit value (bits 0-7).
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fixup_lo8_ldi_neg,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a negated 16-bit value (bits 8-15).
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fixup_hi8_ldi_neg,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a negated 24-bit value (bits 16-23).
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fixup_hh8_ldi_neg,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a negated 32-bit value (bits 24-31).
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fixup_ms8_ldi_neg,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the lower 8 bits of a 16-bit program memory address value (bits 0-7).
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fixup_lo8_ldi_pm,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a 16-bit program memory address value (bits
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/// 8-15).
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fixup_hi8_ldi_pm,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a 24-bit program memory address value (bits
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/// 16-23).
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fixup_hh8_ldi_pm,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the lower 8 bits of a negated 16-bit program memory address value
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/// (bits 0-7).
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fixup_lo8_ldi_pm_neg,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a negated 16-bit program memory address value
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/// (bits 8-15).
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fixup_hi8_ldi_pm_neg,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a negated 24-bit program memory address value
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/// (bits 16-23).
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fixup_hh8_ldi_pm_neg,
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/// A 22-bit fixup for the target of a `CALL k` or `JMP k` instruction.
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fixup_call,
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fixup_6,
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/// A symbol+addr fixup for the `LDD <x>+<n>, <r>" family of instructions.
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fixup_6_adiw,
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fixup_lo8_ldi_gs,
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fixup_hi8_ldi_gs,
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fixup_8,
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fixup_8_lo8,
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fixup_8_hi8,
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fixup_8_hlo8,
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fixup_diff8,
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fixup_diff16,
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fixup_diff32,
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fixup_lds_sts_16,
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/// A 6-bit port address.
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fixup_port6,
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/// A 5-bit port address.
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fixup_port5,
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// Marker
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LastTargetFixupKind,
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NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
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};
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namespace fixups {
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/// Adjusts the value of a branch target.
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/// All branch targets in AVR are rightshifted by 1 to take advantage
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/// of the fact that all instructions are aligned to addresses of size
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/// 2, so bit 0 of an address is always 0. This gives us another bit
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/// of precision.
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/// \param [in,out] val The target to adjust.
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template <typename T> inline void adjustBranchTarget(T &val) { val >>= 1; }
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} // end of namespace fixups
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} // namespace AVR
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} // namespace llvm
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#endif // LLVM_AVR_FIXUP_KINDS_H
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